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At least 289 records · Page 16

On the passage of high-level pulsed radio frequency interference through a nonlinear satellite transponder

Attention is given to the uncoded bit error rate (BER) performance of a satellite communications system whose modulation scheme is binary PSK and whose transponder contains an arbitrary amplitude nonlinearity, all in the presence of high level pulsed radio frequency interference (RFI). A general approach is presented for direct BER evaluations, in contrast to other approaches which may employ SNR suppression factors. The computed results are based on arbitrarily specified RFI scenarios, in the presence of hard limiter, clipper, or blanker amplitude nonlinearities. Performance curves demonstrate the superiority of an appropriately chosen blanker when the RFI environment is most severe. The results obtained also pertain to the sensitivity of performance to the information bit rate, signal power variations, and the ratio of CW to noise content. The CW effects are found to be the most severe.

Weinberg, A.↗

Computer Simulation Results and Analysis for a Root-Raised Cosine Filter Design using Canonical Signed Digits

Filters implemented using Canonical Signed-Digit (CSD) number representation for the coefficients have been studied for many years as an efficient way to increase the speed and reduce the hardware complexity. A simple and very effective method for designing a CSD filter with a specific set of filter parameters has been investigated and its simulation results are presented here. In order to optimize filter coefficients into the corresponding CSD numbers, the Minimum Mean Square Error (MMSE) criterion is used. Furthermore, an attempt is made to improve frequency response of the CSD filter by allocating an extra non-zero digit for normalized coefficients exceeding one-half. Due to limited filter aperture width in examples presented here, the frequency response of CSD filter as the number of non-zero digits in a CSD code increases is not affected much. A root-raised cosine filter model is employed as a base line for this design approach. Finally, the CSD filter simulation results and a hardware complexity comparison with a conventional filter are also shown along with the eye diagrams an Bit-Error-Rate (BER) performance curves.

Kim, Heechul↗

The performance of trellis-coded MDPSK with multiple symbol detection

The idea of using a multiple (more than two) symbol observation interval to improve error probability performance is applied to differential detection of trellis-coded multiple phase-shift keying (MPSK) over an additive white Gaussian noise (AWGN) channel. An equivalent Euclidean distance measure per trellis branch is determined for this detection scheme. This is used to define an augmented (larger multiplicity) trellis code whose distance measure is the conventional squared Euclidean distance typical of conventional trellis-coded modulation on the AWGN. Such an augmented multiple trellis code is a convenient mathematical tool for simplifying the analysis. Results are obtained by a combination of analysis (upper Chernoff bounds and asymptotic large-SNR approximations) and computer simulation. It is shown that only a slight increase (e.g., one symbol) in the length of the observation interval will provide a significant improvement in bit error probability performance.

Divsalar, Dariush↗

Comparative study on the performance of power and bandwidth efficient modulations in LMSS under fading and interference

Aspects of error performance of various power and bandwidth efficient modulations for the land mobile satellite systems (LMSS) were investigated under multipath fading and interferences by using Monte-Carlo simulation. A differential detection for 16QAM (quadrature amplitude modulation) was proposed to cope with Ricean fading and Doppler shift. Computer simulation results show that the performance of 16QAM with differential detection is as good as that of 16PSK with coherent detection and 3 dB better than that of 16PSK with differential detection, although it degrades by about 4.5 dB as compared to 16QAM with coherent detection under an additive white Gaussian noise (AWGN) channel. For the nonlinear channels, 16QAM with modified signal constellations is introduced and analyzed. The simulation results show that the modified 16QAM exhibits a gain of 2.5 dB over 16PSK under traveling-wave tube nonlinearity, and about 4 dB gain over 16PSK at the bit error rate of 10 exp -5 under AWGN. Computer simulation results for modified 16 QAM under cochannel interference and adjacent-channel interference are also presented.

Liu, Jian↗

NuQKD: A Modular Quantum Key Distribution Simulation Framework for Engineering Applications

Abstract An experimental Quantum Key Distribution (QKD) implementation requires advanced costly hardware, unavailable in most research environments, making protocol testing and performance evaluation complicated. This has been a major motivation for the development of QKD simulation frameworks, to allow researchers to obtain insight before proceeding into practical implementations. Several simulators have been introduced over the recent years. However, only four are publicly available, only one of which models equipment imperfections. Currently, no open‐source simulator includes all following capabilities: channel attenuation modelling, equipment imperfections and effects on key rates, estimation of elapsed time during classical and quantum‐ channel processes, use of truly random binary sequences for qubits and measurement bases, shared ‐bit fraction customization. In this paper, we present NuQKD, an open‐ source modular, intuitive simulator, featuring all the above capabilities. NuQKD establishes communication between two computer terminals, accepts custom user inputs (iterations, raw key size, attacker interception rate etc.) and evaluates the sifted key, Quantum Bit Error Rate (QBER), elapsed communication time, and more. NuQKD capabilities include optical fiber and free ‐space simulation, modeling of equipment/channel imperfections, bitstrings from True Random Number Generators, decoy‐state protocol support, and automated evaluation of performance metrics. We expect NuQKD to enable convenient and accurate representation of actual experimental conditions.

Gkouliaras, Konstantinos↗

Properties of the new $ \mathcal{N} $ = 1 AdS 4 vacuum of maximal supergravity

The recent comprehensive numerical study of critical points of the scalar potential of four-dimensional N = 8, SO(8) gauged supergravity using Machine Learning software in [1] has led to a discovery of a new N = 1 vacuum with a triality-invariant SO(3) symmetry. Guided by the numerical data for that point, we obtain a consistent SO(3) × Z 2 -invariant truncation of the N = 8 theory to an N = 1 supergravity with three chiral multiplets. Critical points of the truncated scalar potential include both the N = 1 point as well as two new non-supersymmetric and perturbatively unstable points not found by previous searches. Studying the structure of the submanifold of SO(3) × Z 2 -invariant supergravity scalars, we find that it has a simple interpretation as a submanifold of the 14-dimensional Z $3\atop{2}$ -invariant scalar manifold (SU(1, 1)/U(1)) 7 , for which we find a rather remarkable superpotential whose structure matches the single bit error correcting (7, 4) Hamming code. This 14-dimensional scalar manifold contains approximately one quarter of the known critical points. We also show that there exists a smooth supersymmetric domain wall which interpolates between the new N = 1 AdS4 solution and the maximally supersymmetric AdS4 vacuum. Using holography, this result indicates the existence of an N = 1 RG flow from the ABJM SCFT to a new strongly interacting conformal fixed point in the IR.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

A superconducting nanowire binary shift register

We present a design for a superconducting nanowire binary shift register, which stores digital states in the form of circulating supercurrents in high-kinetic-inductance loops. Adjacent superconducting loops are connected with nanocryotrons, three-terminal electrothermal switches, and fed with an alternating two-phase clock to synchronously transfer the digital state between the loops. A two-loop serial-input shift register was fabricated with thin-film NbN and a bit error rate of less than 10 –4 was achieved, when operated at a maximum clock frequency of 83 MHz and in an out-of-plane magnetic field of up to 6 mT. A shift register based on this technology offers an integrated solution for low-power readout of superconducting nanowire single photon detector arrays and is capable of interfacing directly with room-temperature electronics and operating unshielded in high magnetic field environments.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

A nanocryotron memory and logic family

The development of superconducting electronics based on nanocryotrons has been limited so far to few device circuits, in part due to the lack of standard and robust logic cells. Here, we introduce and experimentally demonstrate designs for a set of nanocryotron-based building blocks that can be configured and combined to implement memory and logic functions. The devices were fabricated by patterning a single superconducting layer of niobium nitride and measured in liquid helium on a wide range of operating points. The tests show 10 - 4 bit error rates with above ± 20 % margins up to 50 MHz and the possibility of operating under the effect of an out-of-plane 36 mT magnetic field, with ± 30 % margins at 10 MHz. Additionally, we designed and measured an equivalent delay-flip-flop made of two memory cells to show the possibility of combining multiple building blocks to make larger circuits. These blocks may constitute a solid foundation for the development of nanocryotron logic circuits and finite-state machines with potential applications in the integrated processing and control of superconducting nanowire single-photon detectors.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Influence of birefringent fibre joints on the visibility drift in a Mach – Zehnder interferometer

It is shown that imperfect joints of linear birefringent fibres in a fibre interferometer may result in an uncontrolled visibility drift under varying environmental conditions even with a standard phase matching device. As an example, a double Mach – Zehnder interferometer is considered, which is employed in schemes of quantum key distribution. Results of numerical simulation demonstrate the standard deviation of the quantum bit error rate (QBER), which is comparable to an average QBER value. (paper)

36 MATERIALS SCIENCE↗

Transmission of Images on High-Temperature Nuclear-Grade Metallic Pipe with Ultrasonic Elastic Waves

Transmission of information using elastic ultrasonic waves on existing metallic pipes provides an alternative communication option for a nuclear facility. The advantages of this approach consist of transmitting information through barriers, such as the containment building wall, with minimal modification of the existing hardware. Because bit rates on the order of kilobits per second are achievable, relatively large volumes of data, such as images, can be transmitted. A viable candidate for an ultrasonic communication channel is a stainless steel pipe of the chemical volume control system (CVCS) that penetrates through the reactor containment building wall through a sealed tunnel. To study ultrasonic communication under simulated nuclear facility conditions of high temperature, a test article was developed by installing heating tapes, temperature controllers, and thermal insulation on a laboratory CVCS-like stainless steel pipe. High temperature and radiation-resilient lithium niobate ultrasonic transducers were utilized for information transmission on the heated pipe. The amplitude shift keying (ASK) digital communication protocol was developed and implemented in a GNU Radio software-defined radio environment. A root-raised-cosine filter was introduced to suppress ultrasonic transducer ringing and thus reduce inter-symbol interference. This resulted in the enhancement of the data transmission bit rate compared to information encoding with square pulses. Demonstrations of communication at high temperature included transmission of a 90-KB image at the bit rate of 10 Kbps with a bit error rate of 10 -3 across a 6-ft-long straight pipe heated up to 230 degrees C. Additional preliminary studies were conducted to evaluate ultrasonic communication system resilience to environmental degradation and damage.

42 ENGINEERING↗

The Octopus processor for the CMS L1 muon trigger for High Luminosity LHC

The upgraded L1 muon trigger system of the CMS experiment in the High Luminosity Large Hadron Collider is based on custom processors featuring large Field Programmable Gate Arrays (FPGAs) connected by large numbers of optical links. These provide the I/O bandwidth and power necessary to process the complex algorithms used during the collection of physics data. The design and performance requirements of these processors creates significant challenges in signal integrity, power delivery, and thermal management. In this paper we describe the Octopus processor, featuring a large Xilinx Virtex Ultrascale+ FPGA and up to 128 links interfaced to optics through high quality twin-ax copper cables. Results on signal integrity at 25 Gb/s and the first demonstration of 50+ Gb/s links with pluggable optics in CMS are also shown, demonstrating bit error rates below 10 –15 at a 95% confidence level. The thermal performance is measured inside an Advanced-TCA crate with acceptable thermal margins up to 200 W of chip power. Future improvements are mentioned, potentially allowing operation at up to 300 W.

Instruments & Instrumentation↗

Development of a test system for data links of the ATLAS Inner Tracker (ITk) upgrade silicon pixel detector

This contribution introduces a novel test system developed to evaluate the signal transmission quality in high-speed data links for the 2026 Inner Tracker (ITk) upgrade of the ATLAS experiment. Using an FPGA-based data acquisition (DAQ) framework, the setup can run simultaneous Bit Error Rate (BER) tests for up to 64 channels and generate virtual eye diagrams, for qualifying the ∼26k electrical links at the ATLAS ITk data rate of 1.28 Gb/s. The paper includes results from system calibration, yielding its contribution to the measured losses, and preliminary results from tests of prototype and pre-production assemblies of on-detector links of the three ATLAS ITk Pixel subsystems.

47 OTHER INSTRUMENTATION↗

Hyperentangled Time-Bin and Polarization Quantum Key Distribution

Fiber-based quantum communication networks are currently limited without quantum repeaters. Satellite-based quantum links have been proposed to extend the network domain. Here, we develop a quantum communication system, suitable for realistic satellite-to-ground communication. With this system, we execute an entanglement-based quantum key distribution (QKD) protocol developed by Bennett, Brassard, and Mermin (BBM92), achieving quantum bit-error rates (QBERs) below 2% in all bases. More importantly, we demonstrate low-QBER execution of a higher-dimensional hyperentanglement-based QKD protocol, using photons simultaneously entangled in polarization and time bin, leading to significantly higher secure key rates, at the cost of increased technical complexity and system size. We show that our protocol is suitable for a space-to-ground link, after incorporating Doppler-shift compensation, and verify its security using a rigorous finite-key analysis. Additionally, we discuss system-engineering considerations relevant to those and other quantum communication protocols and their dependence on what photonic degrees of freedom are utilized.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

A 24-Channel Digitizer With a JESD204B-Compliant Serial Interface for High-Speed Detectors

In this report a 24-channel application-specific integrated circuit (ASIC) for the readout of high-speed CMOS active pixel sensors for charged particle detection is presented. The chip comprises 24 preamplifiers, 24 distinct 12-bit, 25 MSPS Pipelined analog-to-digital converters (ADCs) with self-calibration, an internal phase-locked loop (PLL), and a 3 Gbps serial interface that conforms to the JESD204B standard. To simplify interfacing with a variety of sensors, the ASIC also includes an automatic offset calibration loop. The high level of integration of the ASIC reduces overall system cost and area, and exploiting the signal characteristics of the image sensor allows the ADC to be optimized for reduced power dissipation. The use of an integrated serializer and an industry standard protocol simplifies integration of the ASIC into a complete camera system. The ASIC, called the High-Speed Image Preprocessor Targeted for Electron Readout, or HIPSTER, with a die area of 64.26 mm 2 , is packaged in a 480-ball grid array (BGA) and is fabricated in 180-nm CMOS technology. HIPSTER achieves typical differential nonlinearity (DNL) < 0.55 LSB, input-referred thermal noise of $114.5 μV-rms, and a bit error rate (BER) of better than 10-14. The power dissipation is 98 mW/channel.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Understanding GPU Memory Corruption at Extreme Scale: The Summit Case Study

GPU memory corruption and in particular double-bit errors (DBEs) remain one of the least understood aspects of HPC system reliability. Albeit rare, their occurrences always lead to job termination and can potentially cost thousands of node-hours, either from wasted computations or as the overhead from regular checkpointing needed to minimize the losses. As supercomputers and their components simultaneously grow in scale, density, failure rates, and environmental footprint, the efficiency of HPC operations becomes both an imperative and a challenge. We examine DBEs using system telemetry data and logs collected from the Summit supercomputer, equipped with 27,648 Tesla V100 GPUs with 2nd-generation high-bandwidth memory (HBM2). Using exploratory data analysis and statistical learning, we extract several insights about memory reliability in such GPUs. We find that GPUs with prior DBE occurrences are prone to experience them again due to otherwise harmless factors, correlate this phenomenon with GPU placement, and suggest manufacturing variability as a factor. On the general population of GPUs, we link DBEs to short- and long-term high power consumption modes while finding no significant correlation with higher temperatures. We also show that the workload type can be a factor in memory’s propensity to corruption.

Oles, Vlad↗

SMC 2021 : Analyzing Resource Utilization and User Behavior on Titan Supercomputer

Resource utilization statistics of submitted jobs on a supercomputer can help us understand how users from various scientific domains use HPC platforms and better design a job scheduler. We explore to generate insight regarding workload distribution and usage pattern domains from job scheduler trace, GPU failure information, and project-specific information collected from Titan supercomputer. Furthermore, we want to know how the scheduler performance varies over time and how the users' scheduling behavior changes following a system failure. These observations have the potential to provide valuable insight, which is helpful to prepare for system failures. These practices will help us develop and apply novel machine learning algorithms in understanding system behavior, requirement, and better scheduling of HPC systems. There are two datasets, RUR and GPU. RUR: This dataset is the job scheduler traces collected from the Titan supercomputerfrom 01/01/2015 to 07/31/2019 (2015.csv - 2019.csv). These were collected usingResource Utilization Report (RUR), a Cray-developed resource-usage data collectionand reporting system. It contains the usage information of its critical resources (CPU,Memory, GPU, and I/O) of each running job on Titan during that period [2]. ProjectAreas: Every job is associated with a project ID. TheProjectAreas.csvdatasetprovides a mapping of the project ID to its domain science. GPU: There have been some hardware-related issues in the GPUs in Titan that caused some GPUs to fail, sometimes irrecoverably during some job runs. This dataset provides information regarding these failures during the execution of the submitted jobs. GPUs on Titan are uniquely identified by a serial number (SN), and they are installed in a location. A GPU can be installed in a location, then removed from that location following a failure, and then re-installed in a different location after fixing the problem. If the failure can't be recovered, the GPU might be removed entirely from Titan. There are two prominent types of failures that resulted in the removal of GPUs from Titan: Double Bit Error (DBE) and Out of the Bus (OTB). The dataset (gc_full.csv) has the following fields: 1. SN : Serial number of a GPU 2. location : The location where it is installed 3. insert : The time when it was inserted into that location 4. remove : The time when it was removed from that location 5. duration : Amount of time the GPU spent in this location 6. out : If the device was taken out entirely w/o a re-installment into a new location. 7. event : If the GPU was taken out entirely, the reason for its removal. To learn more about this dataset, please refer to the git repositoryhttps://github.com/olcf/TitanGPULifeand the related publication [1]. References [1] George Ostrouchov, Don Maxwell, Rizwan A Ashraf, Christian Engelmann, MallikarjunShankar, and James H Rogers. Gpu lifetimes on titan supercomputer: Survival analysisand reliability. InSC20: International Conference for High Performance Computing,Networking, Storage and Analysis, pages 1-14. IEEE, 2020. [2] Feiyi Wang, Sarp Oral, Satyabrata Sen, and Neena Imam. Learning from five-yearresource-utilization data of titan system. In2019 IEEE International Conference onCluster Computing (CLUSTER), pages 1-6. IEEE, 2019.

42 ENGINEERING↗

SMC 2021 Data Challenge: Analyzing Resource Utilization and User Behavior on Titan Supercomputer

Resource utilization statistics of submitted jobs on a supercomputer can help us understand how users from various scientific domains use HPC platforms and better design a job scheduler. We explore to generate insight regarding workload distribution and usage pattern domains from job scheduler trace, GPU failure information, and project-specific information collected from Titan supercomputer. Furthermore, we want to know how the scheduler performance varies over time and how the users' scheduling behavior changes following a system failure. These observations have the potential to provide valuable insight, which is helpful to prepare for system failures. These practices will help us develop and apply novel machine learning algorithms in understanding system behavior, requirement, and better scheduling of HPC systems. There are two datasets, RUR and GPU: RUR dataset is the job scheduler traces collected from the Titan supercomputer from 01/01/2015 to 07/31/2019 (2015.csv - 2019.csv). These were collected using resource Utilization Report (RUR), a Cray-developed resource-usage data collection and reporting system. It contains the usage information of its critical resources (CPU, Memory, GPU, and I/O) of each running job on Titan during that period (https://ieeexplore.ieee.org/abstract/document/8891001). It includes ProjectAreas as additional information, every job is associated with a project ID. TheProjectAreas.csv dataset provides a mapping of the project ID to its domain science. GPU dataset has information regarding GPU failure on Titan. There have been some hardware-related issues in the GPUs in Titan that caused some GPUs to fail, sometimes irrecoverably during some job runs. This dataset provides information regarding these failures during the execution of the submitted jobs. GPUs on Titan are uniquely identified by a serial number (SN), and they are installed in a location. A GPU can be installed in a location, then removed from that location following a failure, and then re-installed in a different location after fixing the problem. If the failure can't be recovered, the GPU might be removed entirely from Titan. There are two prominent types of failures that resulted in the removal of GPUs from Titan: Double Bit Error (DBE) and Out of the Bus (OTB). The dataset (gc_full.csv) has seven attributes, we provided a short description of these attributes in the ReadMe file. To learn more about this dataset, please refer to the git repository https://github.com/olcf/TitanGPULife and the related publication (https://ieeexplore.ieee.org/abstract/document/9355319).

42 ENGINEERING↗

Entanglement-based quantum digital signatures over a deployed campus network

The quantum digital signature protocol offers a replacement for most aspects of public-key digital signatures ubiquitous in today’s digital world. A major advantage of a quantum-digital-signatures protocol is that it can have information-theoretic security, whereas public-key cryptography cannot. Here we demonstrate and characterize hardware to implement entanglement-based quantum digital signatures over our campus network. Over 25 hours, we collect measurements on our campus network, where we measure sufficiently low quantum bit error rates (<5% in most cases) which in principle enable quantum digital signatures at over 50 km as shown through rigorous simulation accompanied by a noise model developed specifically for our implementation. These results show quantum digital signatures can be successfully employed over deployed fiber. Moreover, our reported method provides great flexibility in the number of users, but with reduced entanglement rate per user. Finally, while the current implementation of our entanglement-based approach has a low signature rate, feasible upgrades would significantly increase the signature rate.

97 MATHEMATICS AND COMPUTING↗