SEARCH · Engineering Papers

Results for “Microprocessors”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

SourceResearch connectionFrom yearThrough year

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 289 records · Page 16

All sources NASA NTRS DOE OSTI

NASA NTRS2007

Circuit and Method for Communication Over DC Power Line

A circuit and method for transmitting and receiving on-off-keyed (OOK) signals with fractional signal-to-noise ratios uses available high-temperature silicon- on-insulator (SOI) components to move computational, sensing, and actuation abilities closer to high-temperature or high-ionizing radiation environments such as vehicle engine compartments, deep-hole drilling environments, industrial control and monitoring of processes like smelting, and operations near nuclear reactors and in space. This device allows for the networking of multiple, like nodes to each other and to a central processor. It can do this with nothing more than the already in-situ power wiring of the system. The device s microprocessor allows it to make intelligent decisions within the vehicle operational loop and to effect control outputs to its associated actuators. The figure illustrates how each node converts digital serial data to OOK 18-kHz in transmit mode and vice-versa in receive mode; though operations at lower frequencies or up to a megahertz are within reason using this method and these parts. This innovation s technique modulates a DC power bus with millivolt-level signals through a MOSFET (metal oxide semiconductor field effect transistor) and resistor by OOK. It receives and demodulates this signal from the DC power bus through capacitive coupling at high temperature and in high ionizing radiation environments. The demodulation of the OOK signal is accomplished by using an asynchronous quadrature detection technique realized by a quasi-discrete Fourier transform through use of the quadrature components (0 and 90 phases) of the carrier frequency as generated by the microcontroller and as a function of the selected crystal frequency driving its oscillator. The detected signal is rectified using an absolute-value circuit containing no diodes (diodes being non-operational at high temperatures), and only operational amplifiers. The absolute values of the two phases of the received signal are then summed and hard limited (digitized) by comparing them to a reference level and are then input into a microprocessor as a serial bit stream. The quasi-discrete Fourier transform is performed in high-temperature components (operational amplifiers, analog switches, resistors, and capacitors). The demodulated signal is a serial data stream that is input to the UART (universal asynchronous receiver transmitter) receiver pin of the microprocessor. The OOK of the carrier frequency uses the output of the UART pin as an enabling signal that drives the gate of the MOSFET. Logic low bits enable the carrier frequency (realized by using the 0 phase signal from the microcontroller, though either phase may be used) to be DC-coupled to the power supply bus through a current-limiting resistor mounted between the MOSFET drain and the supply rail. The presence of logic lows on the power supply rail is realized by carrier bursts while logic highs are realized by the absence of bursts.

Krasowski, Michael J.↗

NASA NTRS1976

Development of single cell protectors for sealed silver-zinc cells, phase 1

A single cell protector (SCP) assembly capable of protecting a single silver-zinc (Ag Zn) battery cell was designed, fabricated, and tested. The SCP provides cell-level protection against overcharge and overdischarge by a bypass circuit. The bypass circuit consists of a magnetic-latching relay that is controlled by the high and low-voltage limit comparators. Although designed specifically for secondary Ag-Zn cells, the SCP is flexible enough to be adapted to other rechargeable cells. Eighteen SCPs were used in life testing of an 18-cell battery. The cells were sealed Ag-Zn system with inorganic separators. For comparison, another 18-cell battery was subjected to identical life test conditions, but with battery-level protection rather than cell-level. An alternative approach to the SCP design in the form of a microprocessor-based system was conceptually designed. The comparison of SCP and microprocessor approaches is also presented and a preferred approach for Ag-Zn battery protection is discussed.

Imamura, M. S.↗

NASA NTRS1975

Recent advances in strapdown inertial navigation

The computational requirements and basic features of strapdown gyroscopes for inertial navigation are discussed. Strapdown navigators currently require 20 to 50% of the available time of a minicomputer with a capability of several hundred thousand operations per second; memory requirements are 2000 to 3000 16-bit words. A system in which these computational demands are met by three limited capability microcomputers is described. A technique using dedicated microprocessors in the place of analog electronics in the gyroscope control loops is discussed, and attention is given to applications of microprocessor technology in redundant strapdown navigation systems and associated flight control systems.

Napjus, G. A.↗

NASA NTRS1975

The revolution in data gathering systems

This paper gives a review of the data-acquisition systems used in NASA's wind tunnels from the 1950's to the present as a basis for assessing the impact of minicomputers and microcomputers on data acquisition and processing. The operation and disadvantages of wind-tunnel data systems are summarized for the period before 1950, the early 1950's, the early and late 1960's, and the early 1970's. Some significant advances discussed include the use or development of solid-state components, minicomputer systems, large central computers, on-line data processing, autoranging DC amplifiers, MOS-FET multiplexers, MSI and LSI logic, computer-controlled programmable amplifiers, solid-state remote multiplexing, integrated circuits, and microprocessors. The distributed system currently in use with the 40-ft by 80-ft wind tunnel at Ames Research Center is described in detail. The expected employment of distributed systems and microprocessors in the next decade is noted.

Cambra, J. M.↗

NASA NTRS1976

Programmable data collection platform study

The results of a feasibility study incorporating microprocessors in data collection platforms in described. An introduction to microcomputer hardware and software concepts is provided. The influence of microprocessor technology on the design of programmable data collection platform hardware is discussed. A standard modular PDCP design capable of meeting the design goals is proposed, and the process of developing PDCP programs is examined. A description of design and construction of the UT PDCP development system is given.

Source record↗

NASA NTRS1977

Nuclear Science Symposium, 23rd, Scintillation and Semiconductor Counter Symposium, 15th, and Nuclear Power Systems Symposium, 8th, New Orleans, La., October 20-22, 1976, Proceedings

The volume includes papers on semiconductor radiation detectors of various types, components of radiation detection and dosimetric systems, digital and microprocessor equipment in nuclear industry and science, and a wide variety of applications of nuclear radiation detectors. Semiconductor detectors of X-rays, gamma radiation, heavy ions, neutrons, and other nuclear particles, plastic scintillator arrays, drift chambers, spark wire chambers, and radiation dosimeter systems are reported on. Digital and analog conversion systems, digital data and control systems, microprocessors, and their uses in scientific research and nuclear power plants are discussed. Large-area imaging and biomedical nucleonic instrumentation, nuclear power plant safeguards, reactor instrumentation, nuclear power plant instrumentation, space instrumentation, and environmental instrumentation are dealt with. Individual items are announced in this issue.

Wagner, L. J.↗

NASA NTRS1977

The sun-tracking control of solar collectors using high-performance step motors

Sun-tracking solar energy-focusing devices involving a central receiver, thermionic conversion, or a distributed solar thermal collector system are described. The Perkins solar collector uses a fixed focal point about which an 18 m-diameter parabolic dish moves on tracks. The elevation axis also moves on a circular track. A microprocessor manipulates sun sensor information and sun ephemeris data to ensure correct placement. Stepper motors are digital devices which provide direct interface with digital electronics and a wide dynamic range, and could easily be associated with the microprocessors. Design philosophy, performance criteria, wind load analysis, and control system requirements are also discussed.

Hughes, R. O.↗

NASA NTRS1977

The indirect binary n-cube array

The array is built from a large number (hundreds or thousands) of microprocessors or microcomputers linked through a switching network into an indirect binary n-cube array. Control is two level, the array operating synchronously, or in lock step, at the higher level, and with the broadcast commands being locally interpreted into rewritable microinstruction streams in the microprocessors and in the switch control units. The key to the design is the switching array. By properly programming it, the array can be made into a wide variety of virtual arrays which are well adapted to a wide range of applications. It is believed that the flexibility of the switching array can be used to obtain fault avoidance, which appears necessary in any highly parallel design.

Pease, M. C.↗

NASA NTRS1978

Stand-alone development system using a KIM-1 microcomputer module

A small microprocessor-based system designed to: contain all or most of the interface hardware, designed to be easy to access and modify the hardware, to be capable of being strapped to the seat of a small general aviation aircraft, and to be independent of the aircraft power system is described. The system is used to develop a low cost Loran C sensor processor, but is designed such that the Loran interface boards may be removed and other hardware interfaces inserted into the same connectors. This flexibility is achieved through memory-mapping techniques into the microprocessor.

Nickum, J. D.↗

NASA NTRS1978

Application of digital control to a magnetic model suspension and balance model

The feasibility of using a digital computer for performing the automatic control functions for a magnetic suspension and balance system (MSBS) for use with wind tunnel models was investigated. Modeling was done using both a prototype MSBS and a one dimensional magnetic balance. A microcomputer using the Intel 8080 microprocessor is described and results are given using this microprocessor to control the one dimensional balance. Hybrid simulations for one degree of freedom of the MSBS were also performed and are reported. It is concluded that use of a digital computer to control the MSBS is eminently feasible and should extend both the accuracy and utility of the system.

Luh, P. B.↗

NASA NTRS1978

A video display interface for the LORAN-C navigation receiver development system

A microprocessor-based development system was designed and fabricated for prototype test of navigation receiver designs. During use of this system in the development of low-cost LORAN-C receiver/processor concepts, the limitations of the integral KIM-1 display were severely felt. It was to augment this numerical display that the video character display was produced. The circuit design presented meets the need for a flexible-format display capable of driving a small standard video monitor with only minimal demands upon microprocessor memory and MPU cycles.

Fischer, J. P.↗

NASA NTRS1978

RS-600 programmable controller: Solar heating and cooling

Three identical microprocessor control subsystems were developed which can be used in heating, heating and cooling, and/or hot water systems for single family, multifamily, or commercial applications. The controller incorporates a low cost, highly reliable (all solid state) microprocessor which can be easily reprogrammed.

Source record↗

NASA NTRS1977

A programmable microcomputer for real time speech processing

The implementation of a programmable microprocessor for real time speech processing is described. The design of a fast special-purpose computer operating at 150 nsec per instruction time reduces the problem of speech encoding and decoding to a software problem. Each instruction is a twelve-bit word, and the information conveyed by a word is explained. The microprocessor is controlled by two clocks - the A/D clock, or input sampling clock, which loads the digital input into the input register and presets the counter to a value set by the external switches; and the instruction clock, or system clock, which operates at 6 MHz. At this system clock rate and a sampling clock rate of 30 KHz, 200 instructions can be executed between samples, and for many speech encoding and decoding algorithms, 200 instructions are more than enough. The microcomputer is being used to test various delta modulator encoding algorithms.

Apelewicz, T.↗

NASA NTRS1978

On-board landmark navigation and attitude reference parallel processor system

An approach to autonomous navigation and attitude reference for earth observing spacecraft is described along with the landmark identification technique based on a sequential similarity detection algorithm (SSDA). Laboratory experiments undertaken to determine if better than one pixel accuracy in registration can be achieved consistent with onboard processor timing and capacity constraints are included. The SSDA is implemented using a multi-microprocessor system including synchronization logic and chip library. The data is processed in parallel stages, effectively reducing the time to match the small known image within a larger image as seen by the onboard image system. Shared memory is incorporated in the system to help communicate intermediate results among microprocessors. The functions include finding mean values and summation of absolute differences over the image search area. The hardware is a low power, compact unit suitable to onboard application with the flexibility to provide for different parameters depending upon the environment.

Gilbert, L. E.↗

NASA NTRS1979

Multispectral imaging and analysis system

Arrays of charge coupled devices or linear detector arrays simultaneously obtain spectral reflectance data of different wavelengths for a target area. Several accommodating a particular bandwidth, are individually associated with each array. Data from the arrays are read out in parallel and applied to a computer or microprocessor for processing. The microprocessor serves to analyze the data in real time and if possible, in accordance with hard-wired algorithms. The data are then displayed as an image on an appropriate display unit and also recorded for further use. The display system may be operationally connected to receive a terrain image such that the target area and the analyzed spectral reflectance data are superimposed and simultaneously displayed.

Goetz, A. F. H.↗

NASA NTRS1978

Turbojet blade vibration data acquisition design and feasibility testing

A turbojet blade vibration data acquisition system was designed to allow the measurement of blade vibration. The data acquisition system utilizing 96 microprocessors to gather data from optical probes, store, sort and transmit to the central computer is described. Areas of high technical risk were identified and a two-microprocessor system was breadboarded and tested to investigate these areas. Results show that the system was feasible and that low technical risk would be involved in proceeding with the complete system fabrication.

Frarey, J. L.↗

NASA NTRS1979

A programmable power processor for a 25-kW power module

A discussion of the power processor for an electrical power system for a 25-kW Power Module that could support the Space Shuttle program during the 1980's and 1990's and which could be a stepping stone to future large space power systems is presented. Trades that led to the selection of a microprocessor-controlled power processor are briefly discussed. Emphasis is given to the power processing equipment that uses a microprocessor to provide versatility that allows multiple use and to provide for future growth by reprogramming output voltage to a higher level (to 120 V from 30 V). Efficiency data from a breadboard programmable power processor are presented, and component selection and design considerations are also discussed.

Lanier, R., Jr.↗

NASA NTRS1978

Effect of various features on the life cycle cost of the timing/synchronization subsystem of the DCS digital communications network

The effect on the life cycle cost of the timing subsystem was examined, when these optional features were included in various combinations. The features included mutual control, directed control, double-ended reference links, independence of clock error measurement and correction, phase reference combining, self-organization, smoothing for link and nodal dropouts, unequal reference weightings, and a master in a mutual control network. An overall design of a microprocessor-based timing subsystem was formulated. The microprocessor (8080) implements the digital filter portion of a digital phase locked loop, as well as other control functions such as organization of the network through communication with processors at neighboring nodes.

Kimsey, D. B.↗