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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 289 records · Page 16
All sourcesNASA NTRSDOE OSTI
DOE OSTI2022

A Multi-Objective Approach for Optimizing Edge-Based Resource Allocation Using TOPSIS

Existing approaches for allocating resources on edge environments are inefficient and lack the support of heterogeneous edge devices, which in turn fail to optimize the dependency on cloud infrastructures or datacenters. To this extent, we propose in this paper OpERA, a multi-layered edge-based resource allocation optimization framework that supports heterogeneous and seamless execution of offloadable tasks across edge, fog, and cloud computing layers and architectures. By capturing offloadable task requirements, OpERA is capable of identifying suitable resources within nearby edge or fog layers, thus optimizing the execution process. Throughout the paper, we present results which show the effectiveness of our proposed optimization strategy in terms of reducing costs, minimizing energy consumption, and promoting other residual gains in terms of processing computations, network bandwidth, and task execution time. We also demonstrate that by optimizing resource allocation in computation offloading, it is then possible to increase the likelihood of successful task offloading, particularly for computationally intensive tasks that are becoming integral as part of many IoT applications such robotic surgery, autonomous driving, smart city monitoring device grids, and deep learning tasks. The evaluation of our OpERA optimization algorithm reveals that the TOPSIS MCDM technique effectively identifies optimal compute resources for processing offloadable tasks, with a 96% success rate. Moreover, the results from our experiments with a diverse range of use cases show that our OpERA optimization strategy can effectively reduce energy consumption by up to 88%, and operational costs by 76%, by identifying relevant compute resources.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2022

Embedded, Real-Time, and Distributed Traveling Wave Fault Location Method Using Graph Convolutional Neural Networks

This work proposes and develops an implementation of a fault location method to provide a fast and resilient protection scheme for power distribution systems. The method analyzes the transient dynamics of traveling waves (TWs) to generate features using the discrete wavelet transform (DWT), which are then used to train several graph convolutional network (GCN) models. Faults are simulated in the IEEE 34-node system, which is divided into three protection zones (PZs). The goal is to identify the PZ in which the fault occurs. The GCN models create a distributed protection scheme, as all nodes are able to retrieve a prediction. Given that message-passing between nodes occurs both during training and in the execution of the model, the resiliency of such schemes to communication losses was analyzed and demonstrated. One of the models, which only uses voltage measurements, was implemented on a Texas Instruments F28379D development board. The execution times were monitored to assess the speed of the protection scheme. It is shown that the proposed method can be executed in approximately a millisecond, which is comparable to existing TW protection in the transmission system. For experimental purposes, a DWT-based detection method is employed. A design of a setup to playback TWs using two development boards is also addressed.

Jiménez-Aparicio, Miguel (ORCID:000000016864461X)↗
DOE OSTI2020

Predicting Emission Source Terms in a Reduced-Order Fire Spread Model—Part 1: Particulate Emissions

A simple, easy-to-evaluate, surrogate model was developed for predicting the particle emission source term in wildfire simulations. In creating this model, we conceptualized wildfire as a series of flamelets, and using this concept of flamelets, we developed a one-dimensional model to represent the structure of these flamelets which then could be used to simulate the evolution of a single flamelet. A previously developed soot model was executed within this flamelet simulation which could produce a particle size distribution. Executing this flamelet simulation 1200 times with varying conditions created a data set of emitted particle size distributions to which simple rational equations could be tuned to predict a particle emission factor, mean particle size, and standard deviation of particle sizes. These surrogate models (the rational equation) were implemented into a reduced-order fire spread model, QUIC-Fire. Using QUIC-Fire, an ensemble of simulations were executed for grassland fires, southeast U.S. conifer forests, and western mountain conifer forests. Resulting emission factors from this ensemble were compared against field data for these fire classes with promising results. Also shown is a predicted averaged resulting particle size distribution with the bulk of particles produced to be on the order of 1 μm in size.

54 ENVIRONMENTAL SCIENCES↗
DOE OSTI2020

High Performance Computing Application I/O Traces

The dataset comprises trace files from high performance computing (HPC) simulations. The trace files contain records of every I/O operation executed by a simulation application run, including I/O operations from HDF5, MPI-IO, and POSIX and all of the parameters supplied to those operations, e.g. file name, offset, and flags. The traces are generated by executing a simulation application that is linked with the Recorder tracing tool (https://github.com/uiuc-hpc/Recorder). The Recorder trace tool intercepts the I/O calls made by the application, records the I/O trace record, and then calls the intended I/O call so that the operation executes.

Wang, C.↗
DOE OSTI2020

Monitor support on accelerated processing device

A technique for implementing synchronization monitors on an accelerated processing device (“APD”) is provided. Work on an APD includes workgroups that include one or more wavefronts. All wavefronts of a workgroup execute on a single compute unit. A monitor is a synchronization construct that allows workgroups to stall until a particular condition is met. Responsive to all wavefronts of a workgroup executing a wait instruction, the monitor coordinator records the workgroup in an “entry queue.” The workgroup begins saving its state to a general APD memory and, when such saving is complete, the monitor coordinator moves the workgroup to a “condition queue.” When the condition specified by the wait instruction is met, the monitor coordinator moves the workgroup to a “ready queue,” and, when sufficient resources are available on a compute unit, the APD schedules the ready workgroup for execution on a compute unit.

42 ENGINEERING↗
DOE OSTI2020

Checkpoint triggering in a computer system

According to an aspect, a method for triggering creation of a checkpoint in a computer system includes executing a task in a processing node of the computer system. A monitoring block size is determined for the checkpoint. A checkpoint interval is determined based on the monitoring block size, a checkpoint bandwidth, and a failure rate of the computer system. Based on determining that the checkpoint interval has elapsed, the checkpoint including state data of the task is created to enable restarting execution of the task upon a restart operation. The state data of the checkpoint is restored from a memory responsive to detecting an error condition at the processing node. Execution of the task is restarted in the processing node based on the state data restored from the memory.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2020

Controlling accesses to a branch prediction unit for sequences of fetch groups

An electronic device handles accesses of a branch prediction functional block when executing instructions in program code. The electronic device includes a processor having the branch prediction functional block that provides branch prediction information for control transfer instructions (CTIs) in the program code and a minimum predictor use (MPU) functional block. The MPU functional block determines, based on a record associated with a given fetch group of instructions, that a specified number of subsequent fetch groups of instructions that were previously determined to include no CTIs or conditional CTIs that were not taken are to be fetched for execution in sequence following the given fetch group. The MPU functional block then, when each of the specified number of the subsequent fetch groups is fetched and prepared for execution, prevents corresponding accesses of the branch prediction functional block for acquiring branch prediction information for instructions in that subsequent fetch group.

Agrawal, Varun↗
DOE OSTI2021

Methods, media, and systems for detecting attack on a digital processing device

Methods, media, and systems for detecting attack are provided. In some embodiments, the methods include: comparing at least part of a document to a static detection model; determining whether attacking code is included in the document based on the comparison of the document to the static detection model; executing at least part of the document; determining whether attacking code is included in the document based on the execution of the at least part of the document; and if attacking code is determined to be included in the document based on at least one of the comparison of the document to the static detection model and the execution of the at least part of the document, reporting the presence of an attack. In some embodiments, the methods include: selecting a data segment in at least one portion of an electronic document; determining whether the arbitrarily selected data segment can be altered without causing the electronic document to result in an error when processed by a corresponding program; in response to determining that the arbitrarily selected data segment can be altered, arbitrarily altering the data segment in the at least one portion of the electronic document to produce an altered electronic document; and determining whether the corresponding program produces an error state when the altered electronic document is processed by the corresponding program.

Stolfo, Salvatore J.↗
DOE OSTI2021

Hardware accelerated dynamic work creation on a graphics processing unit

A processor core is configured to execute a parent task that is described by a data structure stored in a memory. A coprocessor is configured to dispatch a child task to the at least one processor core in response to the coprocessor receiving a request from the parent task concurrently with the parent task executing on the at least one processor core. In some cases, the parent task registers the child task in a task pool and the child task is a future task that is configured to monitor a completion object and enqueue another task associated with the future task in response to detecting the completion object. The future task is configured to self-enqueue by adding a continuation future task to a continuation queue for subsequent execution in response to the future task failing to detect the completion object.

Gutierrez, Anthony↗
DOE OSTI2021

Enabling Design Space Exploration for RISC-V Secure Compute Environments

Cycle-level architectural simulation of Trusted Execution Environments (TEEs) can enable extensive design space exploration of these secure architectures. Existing architectural simulators which support TEEs are either based on hardware-level implementations or abstract analytic models. In this paper, we describe the implementation of the gem5 models necessary to run and evaluate the RISC- V-based open source TEE, Keystone, and we discuss how this simulation environment opens new avenues for designing and studying these trusted environments. We show that the Keystone simulations on gem5 exhibit similar performance as the previous hardware evaluations of Keystone. We also describe three simple example use cases (understanding the reason of trusted execution slowdown, performance of memory encryption, and micro-architecture impact on trusted execution performance) to demonstrate how the ability to simulate TEEs can provide useful information about their behavior in the existing form and also with enhanced designs.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

Accessing protected data by a high-performance computing cluster

A data protection system is provided that allows applications to access protected data in a way that restricts applications from outputting to unauthorized targets any unprotected data derived from the protected data and that ensures that the applications do not have access to a key that allows access to the unprotected data. The data protection system provides a policy server that may execute on a service node of a high performance computing system and a data encryption process that may execute on each compute node that is allocated to an application or batch job. The policy server maintains policies of entities specifying access control for protected data. The data encryption process generates a secure execution environment for an application process and interfaces with the policy server to retrieve keys for decrypting protected data in accordance with a policy, and it decrypts and provides the decrypted data to the application process.

Barnes, Peter↗
DOE OSTI2021

Neuromorphic computing architecture with dynamically accessible contexts

Various technologies pertaining to allocating computing resources of a neuromorphic computing system are described herein. Subgraphs of a neural algorithm graph to be executed by the neuromorphic computing system are identified. The subgraphs are each executed by a group of neuron circuits serially. Output data generated by execution of the subgraphs are provided to the same or a second group of neuron circuits at a same time or with associated timing data indicative of a time at which the output data was generated. The same or second group of neuron circuits performs one or more processing operations based upon the output data.

Aimone, James Bradley↗
DOE OSTI2021

Method and apparatus for asynchronous scheduling

A method and apparatus of asynchronous scheduling in a graphics device includes sending one or more instructions from an instruction scheduler to one or more instruction first-in/first-out (FIFO) devices. An instruction in the one or more FIFO devices is selected for execution by a single-instruction/multiple-data (SIMD) pipeline unit. It is determined whether all operands for the selected instruction are available for execution of the instruction, and if all the operands are available, the selected instruction is executed on the SIMD pipeline unit. The self-timed arithmetic pipeline unit (SIMD pipeline unit) is effectively encapsulated in a synchronous, (e.g., clocked by global clock), scheduler and register file environment.

Kalamatianos, John↗
DOE OSTI2022

Aquatic organism tracking devices, systems and associated methods

Aquatic organism tracking devices, systems and associated methods are described. According to one aspect, an aquatic organism tracking device includes a housing, a transducer coupled with the housing and configured to transmit a data transmission externally of the housing and an aquatic organism associated with the tracking device, a programmable oscillator coupled with the housing, and wherein the programmable oscillator is configured to generate a clock signal having a selected one of a plurality of different frequencies, processing circuitry coupled with the housing and configured to receive the clock signal from the programmable oscillator and to execute a plurality of executable instructions according to the clock signal, a power source coupled with the housing and configured to store electrical energy, and wherein the processing circuitry is configured to control the provision of the electrical energy from the power source to the transducer to generate the data transmission as a result of the execution of the instructions.

Deng, Z. Daniel↗
DOE OSTI2022

System and method for remote detection and location of gas leaks

A system for monitoring for a gas leak from a gas containing structure is disclosed. The system includes a lens that directs an image of a scene of interest through an optical filter onto a detector. The filter is associated with the lens and the filter has one or more passbands that passes wavelengths which match one or more emission or reflectively wavelengths of the gas being monitored. A detector receives the image after the image passes through the lens and the filter. The detector generates image data representing the scene including the gas containing structure. A processor is configured to process the image data by executing machine executable code stored on a memory. The machine executable code processes the image data to identify turbulence flows in the image data such that turbulence flow indicates a gas leak, and generate and send an alert in response to the identification of a turbulence flow.

O'Neill, Mary D.↗
DOE OSTI2022

Atomic operations in a large scale distributed computing network

Techniques for executing an atomic command in a distributed computing network are provided. A core cluster, including a plurality of processing cores that do not natively issue atomic commands to the distributed computing network, is coupled to a translation unit. To issue an atomic command, a core requests a location in the translation unit to write an opcode and operands for the atomic command. The translation unit identifies a location (a “window”) that is not in use by another atomic command and indicates the location to the processing core. The processing core writes the opcode and operands into the window and indicates to the translation unit that the atomic command is ready. The translation generates an atomic command and issues the command to the distributed computing network for execution. After execution, the distributed computing network provides a response to the translation unit, which provides that response to the core.

Lackey, Jr., Stanley A.↗
DOE OSTI2022

Cooperative workgroup scheduling and context prefetching based on predicted modification of signal values

A first workgroup is preempted in response to threads in the first workgroup executing a first wait instruction including a first value of a signal and a first hint indicating a type of modification for the signal. The first workgroup is scheduled for execution on a processor core based on a first context after preemption in response to the signal having the first value. A second workgroup is scheduled for execution on the processor core based on a second context in response to preempting the first workgroup and in response to the signal having a second value. A third context it is prefetched into registers of the processor core based on the first hint and the second value. The first context is stored in a first portion of the registers and the second context is prefetched into a second portion of the registers prior to preempting the first workgroup.

Dutu, Alexandru↗
DOE OSTI2022

Controlling accesses to a branch prediction unit for sequences of fetch groups

An electronic device is described that handles control transfer instructions (CTIs) when executing instructions in program code. The electronic device has a processor that includes a branch prediction functional block and a sequential fetch logic functional block. The sequential fetch logic functional block determines, based on a record associated with a CTI, that a specified number of fetch groups of instructions that were previously determined to include no CTIs are to be fetched for execution in sequence following the CTI. When each of the specified number of fetch groups is fetched and prepared for execution, the sequential fetch logic prevents corresponding accesses of the branch prediction functional block for acquiring branch prediction information for instructions in that fetch group.

Yalavarti, Adithya↗