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At least 289 records · Page 16
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

A circuit-generated quantum subspace algorithm for the variational quantum eigensolver

Recent research has shown that wavefunction evolution in real and imaginary time can generate quantum subspaces with significant utility for obtaining accurate ground state energies. Inspired by these methods, we propose combining quantum subspace techniques with the variational quantum eigensolver (VQE). In our approach, the parameterized quantum circuit is divided into a series of smaller subcircuits. The sequential application of these subcircuits to an initial state generates a set of wavefunctions that we use as a quantum subspace to obtain high-accuracy groundstate energies. We call this technique the circuit subspace variational quantum eigensolver (CSVQE) algorithm. By benchmarking CSVQE on a range of quantum chemistry problems, we show that it can achieve significant error reduction in the best case compared to conventional VQE, particularly for poorly optimized circuits, greatly improving convergence rates. Furthermore, we demonstrate that when applied to circuits trapped at local minima, CSVQE can produce energies close to the global minimum of the energy landscape, making it a potentially powerful tool for diagnosing local minima.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2024

Learning linear optical circuits with coherent states

We analyze the energy and training data requirements for supervised learning of an M-mode linear optical circuit by minimizing an empirical risk defined solely from the action of the circuit on coherent states. When the linear optical circuit acts non-trivially only on k < M unknown modes (i.e. a linear optical k-junta), we provide an energy-efficient, adaptive algorithm that identifies the junta set and learns the circuit. We compare two schemes for allocating a total energy, E, to the learning algorithm. In the first scheme, each of the T random training coherent states has energy E/T. In the second scheme, a single random MT-mode coherent state with energy E is partitioned into T training coherent states. The latter scheme exhibits a polynomial advantage in training data size sufficient for convergence of the empirical risk to the full risk due to concentration of measure on the $(2MT-1)$-sphere. Specifically, generalization bounds for both schemes are proven, which indicate that for ε-approximation of the full risk by the empirical risk with high probability, $O(E^{2/3}M^{2/3}/\epsilon^{2/3})$ training states are sufficient for the first scheme and $O(E^{1/3}M^{1/3}/\epsilon^{2/3})$ training states are sufficient for the second scheme.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2021

Large gradients via correlation in random parameterized quantum circuits

Scaling of variational quantum algorithms to large problem sizes requires efficient optimization of random parameterized quantum circuits. For such circuits with uncorrelated parameters, the presence of exponentially vanishing gradients in cost function landscapes is an obstacle to optimization by gradient descent methods. In this work, we prove that reducing the dimensionality of the parameter space by utilizing circuit modules containing spatially or temporally correlated gate layers can allow one to circumvent the vanishing gradient phenomenon. Here, examples are drawn from random separable circuits and asymptotically optimal variational versions of Grover's algorithm based on the quantum alternating operator ansatz. In the latter scenario, our bounds on cost function variation imply a transition between vanishing gradients and efficient trainability as the number of layers is increased toward $\mathcal{O}\left({2}^{n/2}\right)$, the optimal oracle complexity of quantum unstructured search.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2021

Adaptive pruning-based optimization of parameterized quantum circuits

Abstract Variational hybrid quantum–classical algorithms are powerful tools to maximize the use of noisy intermediate-scale quantum devices. While past studies have developed powerful and expressive ansatze, their near-term applications have been limited by the difficulty of optimizing in the vast parameter space. In this work, we propose a heuristic optimization strategy for such ansatze used in variational quantum algorithms, which we call ‘parameter-efficient circuit training (PECT)’. Instead of optimizing all of the ansatz parameters at once, PECT launches a sequence of variational algorithms, in which each iteration of the algorithm activates and optimizes a subset of the total parameter set. To update the parameter subset between iterations, we adapt the Dynamic Sparse Reparameterization scheme which was originally proposed for training deep convolutional neural networks. We demonstrate PECT for the Variational Quantum Eigensolver, in which we benchmark unitary coupled-cluster ansatze including UCCSD and k -UpCCGSD, as well as the Low-Depth Circuit Ansatz (LDCA), to estimate ground state energies of molecular systems. We additionally use a layerwise variant of PECT to optimize a hardware-efficient circuit for the Sycamore processor to estimate the ground state energy densities of the one-dimensional Fermi-Hubbard model. From our numerical data, we find that PECT can enable optimizations of certain ansatze that were previously difficult to converge and more generally can improve the performance of variational algorithms by reducing the optimization runtime and/or the depth of circuits that encode the solution candidate(s).

Physics↗
DOE OSTI2022

Fast decay of classification error in variational quantum circuits

Variational quantum circuits (VQCs) have shown great potential in near-term applications. However, the discriminative power of a VQC, in connection to its circuit architecture and depth, is not understood. To unleash the genuine discriminative power of a VQC, we propose a VQC system with the optimal classical post-processing—maximum-likelihood estimation on measuring all VQC output qubits. Via extensive numerical simulations, we find that the error of VQC quantum data classification typically decays exponentially with the circuit depth, when the VQC architecture is extensive—the number of gates does not shrink with the circuit depth. This fast error suppression ends at the saturation towards the ultimate Helstrom limit of quantum state discrimination. On the other hand, non-extensive VQCs such as quantum convolutional neural networks are sub-optimal and fail to achieve the Helstrom limit, demonstrating a trade-off between ansatz complexity and classification performance in general. To achieve the best performance for a given VQC, the optimal classical post-processing is crucial even for a binary classification problem. To simplify VQCs for near-term implementations, we find that utilizing the symmetry of the input properly can improve the performance, while oversimplification can lead to degradation.

Zhang, Bingzhi↗
DOE OSTI2024

Building spatial symmetries into parameterized quantum circuits for faster training

Abstract Practical success of quantum learning models hinges on having a suitable structure for the parameterized quantum circuit. Such structure is defined both by the types of gates employed and by the correlations of their parameters. While much research has been devoted to devising adequate gate-sets, typically respecting some symmetries of the problem, very little is known about how their parameters should be structured. In this work, we show that an ideal parameter structure naturally emerges when carefully considering spatial symmetries (i.e. the symmetries that are permutations of parts of the system under study). Namely, we consider the automorphism group of the problem Hamiltonian, leading us to develop a circuit construction that is equivariant under this symmetry group. The benefits of our novel circuitstructure, called ORB, are numerically probed in several ground-state problems. We find a consistent improvement (in terms of circuit depth, number of parameters required, and gradient magnitudes) compared to literature circuit constructions.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2023

Prolonging genetic circuit stability through adaptive evolution of overlapping genes

Abstract The development of synthetic biological circuits that maintain functionality over application-relevant time scales remains a significant challenge. Here, we employed synthetic overlapping sequences in which one gene is encoded or ‘entangled’ entirely within an alternative reading frame of another gene. In this design, the toxin-encoding relE was entangled within ilvA, which encodes threonine deaminase, an enzyme essential for isoleucine biosynthesis. A functional entanglement construct was obtained upon modification of the ribosome-binding site of the internal relE gene. Using this optimized design, we found that the selection pressure to maintain functional IlvA stabilized the production of burdensome RelE for >130 generations, which compares favorably with the most stable kill-switch circuits developed to date. This stabilizing effect was achieved through a complete alteration of the allowable landscape of mutations such that mutations inactivating the entangled genes were disfavored. Instead, the majority of lineages accumulated mutations within the regulatory region of ilvA. By reducing baseline relE expression, these more ‘benign’ mutations lowered circuit burden, which suppressed the accumulation of relE-inactivating mutations, thereby prolonging kill-switch function. Overall, this work demonstrates the utility of sequence entanglement paired with an adaptive laboratory evolution campaign to increase the evolutionary stability of burdensome synthetic circuits.

59 BASIC BIOLOGICAL SCIENCES↗
DOE OSTI2025

Logical error rates for the surface code under a mixed coherent and stochastic circuit-level noise model inspired by trapped ions

With fault-tolerant quantum computing (FTQC) on the horizon, it is critical to understand sources of logical errors in plausible hardware implementations of quantum error-correcting codes. Detailed error modeling of computational instructions on particular FTQC architectures will enable the better prediction of error propagation in FT-encoded quantum circuits while revealing where greater attention is needed in hardware design. In this work, we consider logical error rates for the surface code implemented on a hypothetical grid-based trapped-ion quantum charge-coupled device architecture. Specifically, we construct logical channels for the idling surface code and examine its diamond error under a mixed coherent and stochastic circuit-level noise model inspired by trapped ions. We include the coherent dephasing noise that is known to accumulate during physical qubit idling and transport in these systems, determining idling and transport durations using the time-resolved output of an open-source trapped-ion surface code compiler. To estimate expectation values of logical Pauli observables following hardware circuits containing non-Clifford sources of noise, we utilize a Monte Carlo technique to sample from an underlying quasiprobability distribution of Clifford circuits that we independently simulate in a phase-sensitive fashion. We verify error suppression up to code distance 𝑑 = 11 at coherent dephasing rates near and below those of current-generation trapped-ion quantum computers and find that logical error rates align with those of analogous fully stochastic simulations in this regime. Exploring higher dephasing rates at 𝑑 = 3−5, we find evidence for growing coherent rotations about all three logical Pauli axes, increased diagonal logical error process matrix elements relative to those of stochastic simulations, and a reduced dephasing rate threshold. Overall, our work paves a way toward realistic hardware emulation of small fault-tolerant quantum processes, e.g., members of an FTQC instruction set.

Quantum benchmarking↗
DOE OSTI2022

Optimized low-depth quantum circuits for molecular electronic structure using a separable-pair approximation

We present a classically tractable model that leads to optimized low-depth quantum circuits leveraging separable-pair approximations. The obtained circuits are well suited as a baseline circuit for emerging quantum hardware and can, in the long term, provide significantly improved initial states for quantum algorithms. The associated wave functions can be represented with linear memory requirement, which allows classical optimization of the circuits and naturally defines a minimum benchmark for quantum algorithms. In this work we employ directly determined pair-natural orbitals within a basis-set-free approach. This leads to accurate representation of the one- and many-body parts for weakly correlated systems and we explicitly illustrate how the model can be integrated into other quantum algorithms for stronger correlated systems.

74 ATOMIC AND MOLECULAR PHYSICS↗
DOE OSTI2024

Benchmarking characterization methods for noisy quantum circuits

Effective methods for characterizing the noise in quantum computing devices are essential for programming and debugging circuit performance. Existing approaches vary in the information obtained as well as the amount of quantum and classical resources required, with more information generally requiring more resources. Here we benchmark the characterization methods of gate set tomography, Pauli channel noise reconstruction, and empirical direct characterization for developing models that describe noisy quantum circuit performance on a 27-qubit superconducting transmon device. We evaluate these models by comparing the accuracy of noisy circuit simulations with the corresponding experimental observations. Here, we find that the agreement of noise model to experiment does not correlate with the information gained by characterization and that the underlying circuit strongly influences the best choice of characterization approach. Empirical direct characterization scales best of the methods we tested and produced the most accurate characterizations across our benchmarks.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2020

ADMX SLIC: Results from a Superconducting $\textit{LC}$ Circuit Investigating Cold Axions

Axions are a promising cold dark matter candidate. Haloscopes, which use the conversion of axions to photons in the presence of a magnetic field to detect axions, are the basis of microwave cavity searches such as the Axion Dark Matter eXperiment (ADMX). To search for lighter, low frequency axions in the sub-2 × 10 –7 eV (50 MHz) range, a tunable lumped-element $\textit{LC}$ circuit has been proposed. For the first time, through ADMX SLIC (Superconducting $\textit{LC}$ Circuit Investigating Cold Axions), a resonant $\textit{LC}$ circuit was used to probe this region of axion mass-coupling space. The detector used a superconducting $\textit{LC}$ circuit with piezoelectric driven capacitive tuning. The axion mass and corresponding frequency ranges 1.7498–1.7519 × 10 –7 eV (42.31–42.36 MHz), 1.7734–1.7738 × 10 –7 eV (42.88–42.89 MHz), and 1.8007–1.8015 × 10 –7 eV (43.54–43.56 MHz) were covered at magnetic fields of 4.5 T, 5.0 T, and 7.0 T, respectively. Exclusion results from the search data, for coupling below 10 –12 GeV –1 , are presented.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2021

Mitigating Depolarizing Noise on Quantum Computers with Noise-Estimation Circuits

A significant problem for current quantum computers is noise. While there are many distinct noise channels, the depolarizing noise model often appropriately describes average noise for large circuits involving many qubits and gates. We present a method to mitigate the depolarizing noise by first estimating its rate with a noise-estimation circuit and then correcting the output of the target circuit using the estimated rate. The method is experimentally validated on the simulation of the Heisenberg model. We find that our approach in combination with readout-error correction, randomized compiling, and zero-noise extrapolation produces results close to exact results even for circuits containing hundreds of CNOT gates.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2024

Acceptor-Induced Bulk Dielectric Loss in Superconducting Circuits on Silicon

The performance of superconducting quantum circuits is primarily limited by dielectric loss due to interactions with two-level systems (TLSs). State-of-the-art circuits with engineered material interfaces are approaching a limit where dielectric loss from bulk substrates plays an important role. However, a microscopic understanding of dielectric loss in crystalline substrates is still lacking. In this work, we show that boron acceptors in silicon constitute a TLS bath that leads to an energy dissipation channel for superconducting circuits. We discuss how the electronic structure of boron acceptors leads to an effective TLS response in silicon. We sweep the boron concentration in silicon and demonstrate the bulk dielectric loss limit from boron acceptors. We show that boron-induced dielectric loss can be reduced in a magnetic field due to the spin-orbit structure of boron. This work provides the first detailed microscopic description of a TLS bath for superconducting circuits and demonstrates the need for ultrahigh-purity substrates for next-generation superconducting quantum processors.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2022

A Fast-Response High-Accuracy Overvoltage Protection Circuit for Soft-Switching Current-Source Converters

Although voltage-source converters (VSCs) have been a focus of research for decades and are widely applied in numerous applications, they face great challenges in short-circuit failures, high dv/dt and electromagnetic interference (EMI), especially using wide bandgap devices. Instead, current-source converters (CSCs) are attracting increasing attention in recent years owing to their friendliness to short-circuit faults, improved EMI, etc. For CSCs, overvoltage is the most catastrophic failure since the semiconductor devices can hardly withstand an overvoltage for a short pulse. In this paper, a fast-response high-accuracy overvoltage protection (OVP) circuit is proposed to protect CSCs from overvoltage damage. It also features a small form factor, good noise-immunity, friendly retrofit capability, and no need for active switches. In this paper, the operating principle and design guideline of the proposed OVP circuit is introduced. Its effectiveness is validated in soft-switching solid-state transformer (S4T) at 500 V. In experiments, the voltage detection error of less than 5% and a propagation delay of fewer than 400 ns have been achieved.

30 DIRECT ENERGY CONVERSION↗
DOE OSTI2024

Grid Forming Inverter With Increased Short-Circuit Contribution to Address Inverter-Based Microgrid Protection Challenges

Substantial differences in fault levels between grid-tied and islanded modes is one of the primary challenges of microgrid protection. During grid-tied mode, the bulk grid provides significant short-circuit, while during islanded operation the short-circuit magnitude is small due to inverter-based resources limiting their current output close to nominal ratings. Consequently, conventional distribution protection strategies based on overcurrent cannot reliably protect microgrids when operating in islanded mode. Fuses and circuit breakers are particularly affected because of their inverse characteristics. Presently, the absence of affordable solutions for protecting microgrids in islanded mode leads to microgrids shutting down during electrical faults. The contribution of this article is two-fold. The first innovation proposes specific hardware modifications to grid-forming inverters to increase their short-circuit current during electrical faults. The second innovation introduces a novel control strategy designed to preserve control stability margins even when the grid-filter saturates, ensuring sinusoidal output currents under normal and fault conditions. Through experimental results, the inverter with the proposed modifications can provide more than three-times its nominal current during electrical faults. For the prototype testbed, this was sufficient to enable the use of traditional legacy overcurrent protection, achieving the fuse-to-relay and relay-to-relay minimum coordination time for the line-to-ground, line-to-line to ground, and three-phase electrical faults.

42 ENGINEERING↗
DOE OSTI2023

Superconducting Hyperdimensional Associative Memory Circuit for Scalable Machine Learning

Here we propose a generalized architecture for the first rapid-single-flux-quantum (RSFQ) associative memory circuit. The circuit employs hyperdimensional computing (HDC), a machine learning (ML) paradigm utilizing vectors with dimensionality in the thousands to represent information. HDC designs have small memory footprints, simple computations, and simple training algorithms compared to superconducting neural network accelerators (SNNAs), making them a better option for scalable SFQ machine learning (ML) solutions. The proposed superconducting HDC (SHDC) circuit uses entirely on-chip RSFQ memory which is tightly integrated with logic, operates at 33.3 GHz, is applicable to general ML tasks, and is manufacturable at practically useful scales given current SFQ fabrication limits. Tailored to a language recognition task, SHDC consists of ~ 2-20 M Josephson junctions (JJs) and consumes up to three times less power than an analogous CMOS HDC circuit while achieving 78-84% higher throughput. SHDC is capable of outperforming the state of the art RSFQ SNNA, SuperNPU, by 48-99% for all benchmark NN architectures tested while occupying up to 90% less area and consuming up to nine times less power. To the best of the authors' knowledge, SHDC is currently the only superconducting ML approach feasible at practically useful scales for real-world ML tasks and capable of online learning.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2023

Quantum Noise Mitigation: Introducing the Robust Quantum Circuit Scheduler for Enhanced Fidelity and Throughput

Undoubtedly, quantum computing offers valuable acceleration for solving intricate problems. One of the primary hurdles lies in executing large-scale quantum applications on backend machines. Qubit noise, among other factors, dramatically influences the execution process. Implementing effective scheduling techniques for quantum circuits is crucial for practical quantum computing and preventing excessive waiting times. The quantum realm is distinct from classical computing in terms of optimization, performance, utilization, and waiting periods. Consequently, the parameters and components of quantum circuit scheduling diverge from those of classical computing. This paper presents Quantum Noise Mitigation: Introducing the Robust Quantum Circuit Scheduler for Enhanced Fidelity and Throughput, a straightforward yet effective scheduling framework and policy that enhances noise resilience, throughput, and the fidelity of quantum circuits. Drawing inspiration from classical methods, our scheduling approach incorporates additional constraints tailored for quantum logic. The outcome demonstrates a substantial improvement in fidelity and resource management, which is vital for real-world quantum applications.

Baheri, Betis↗
DOE OSTI2023

Temperature-Dependent Sheet and Contact Resistivity Measurements on Ag and Ag-Ni Circuit Pastes

The metal circuits and brazes used in electronic, energy conversion, and/or energy storage devices often have difficulty wetting and adhering to ceramic and/or ceramic-passivated metal substrates. Here, a novel Particle Interlayer Directed Wetting and Spreading (PIDWAS) technique is demonstrated that utilizes screen printing, the low wetting angle of silver on nickel, and the high work of adhesion between nickel and various ceramics to produce well-adhered, self-assembled silver patterns on ceramic and/or stainless-steel substrates not normally wet by silver. The resulting Ag-Ni circuits have higher sapphire adhesion strengths (up to 30 MPa on sapphire), higher densities (>97% on sapphire), and similar high-temperature electronic resistivities to those made using commercially-available Heraeus C8710 or DAD-87 silver circuit pastes. Similarly, Ag-Ni brazes between a variety of ceramic and/or stainless-steel substrates have better microstructural stability with rapid thermal cycling, reduction-oxidation cycling, and dual atmosphere isothermal aging than conventional Ag-CuO brazes. In addition, the residual Ni in these Ag-Ni circuits and brazes can be used to chemically getter surface segregated Al, ensuring low contact resistances on a variety of chromia- and/or alumina-passivated stainless steels. Reference: [1] Hu G, Zhou Q, Bhatlawande A, Park J, Termuhlen R, Ma Y, Bieler TR, Yu HC, Qi Y, Hogan T & Nicholas JD. Patterned Nickel Interlayers for Enhanced Silver Wetting, Spreading and Adhesion on Ceramic Substrates. Scripta Materialia, 2021; 196, 113767. 10.1016/j.scriptamat.2021.113767 [2] Park J, Phongpreecha T, Nicholas JD & Qi Y. Enhanced Liquid Metal Wetting on Oxide Surfaces via Patterned Particles. Acta Materialia, 2020; 199, 551-560. 10.1016/j.actamat.2020.08.037

Bhatlawande, Aishwarya↗