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At least 289 records · Page 16

Space Induced Discharge Model to Be Used on Interface Circuit Vulnerability Assessment

Charging can occur in space due to plasma and high energy particles. Charging is especially severe in certain earth orbits such as geostationary orbit, medium earth orbit and highly inclined orbit. A spacecraft that travels to other planets such as Jupiter also encounters high level of charging due to Jupiter’s radiation belt. The major concern for spacecraft operation due to charging is the survival of sensitive electrical circuits. Dielectrics and floating metal can charge up and discharge onto interface circuits. The electrical circuits need to be evaluated for survival from the electrostatic-discharge (ESD) threat. Both ESD induced upset and damage need to be assessed. The interface circuits are often located inside a shielded unit in the spacecraft structure or a shielded vault with sufficient radiation shielding to avoid surface and internal charging. The materials external to the highly shielded area can charge up and discharge onto wires that can directly dissipate the ESD onto the interface circuits. Figure 1 shows a possible discharge mechanism onto the interfacing circuits. If the wire has an external shield or a coaxial line, some or most of the discharge can flow on the shield to chassis ground. There is always coupling from external discharge. If the wire has no shield, the discharge flows onto the interface circuit. Fig. 1 Possible discharge paths onto the interface circuits. The purpose of this article is to address how to model the ESD threat to be used as the discharge source onto the interface circuit based on the electron beam test data. Different models are needed for different impedances associated with the interface circuits. Once those models are derived, one needs to analyze the interface circuit with the corresponding model using an electrical simulation tool. Then, the circuit’s front-end components can be assessed for damage and upset. Upset is highly dependent on the circuit operation and system requirements, and thus it is not addressed any further. Damage of electrical parts is often rated under Human-Body-Model (HBM) ESD. One can utilize this industry-wide available information to assess the damage vulnerability due to space discharges. However, the HBM waveform does not always match the discharge waveform. To estimate the damage vulnerability of the circuit and set margin, one needs to compare the equivalent energy delivered to the victim between a HBM discharge and the results from an ESD source model based on actual discharges. This paper presents such a comparison for a few select cases.

Xie, Julie↗

Hybrid Oscillator-Qubit Quantum Processors: Instruction Set Architectures, Abstract Machine Models, and Applications

This tutorial offers a pedagogical guide to hybrid quantum processors that integrate discrete-variable (DV) qubits and continuous-variable (CV) oscillators. Aimed at computer scientists, engineers, and physicists, it provides an overview of the experimental, algorithmic, and architectural aspects of this novel and rapidly developing hardware model. Experimental realizations of this model include superconducting, trapped-ion, and neutral-atom platforms. By combining DV and CV components, hybrid oscillator-qubit processors enable a powerful new paradigm that offers complementary strengths for quantum control, error correction, computation, and simulation. Working toward the goal of a full-stack system connecting applications to CV-DV hardware, we define and formulate abstract machine models and instruction set architectures. These essential abstractions enable codesign of hardware and software, and resource estimation for exploring the potential of current and future hardware for computational and simulation tasks. Using these abstractions, we present both new and existing examples that illustrate the benefits of hybrid CV-DV processors relative to traditional DV-only hardware in computation as well as quantum simulation of physical models. Examples include algorithms for transferring states between DV and CV systems, performing the quantum Fourier transform, and simulation of lattice gauge theories. Relative to qubit-only hardware, the bosonic degrees of freedom natively available in hybrid architectures can substantially reduce the circuit complexity of simulations for physical models containing bosons. A key technique is the extension of quantum signal processing ideas to CV-DV systems. This work is intended to serve as a timely and comprehensive guide to this relatively unexplored yet promising approach to quantum computation and to provide a road map to guide future development.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗

Initial Testing of the Stainless Steel NaK-Cooled Circuit (SNaKC)

An actively pumped alkali metal flow circuit, designed and fabricated at the NASA Marshall Space Flight Center, is currently undergoing testing in the Early Flight Fission Test Facility (EFF-TF). Sodium potassium (NaK) was selected as the primary coolant. Basic circuit components include: simulated reactor core, NaK to gas heat exchanger, electromagnetic liquid metal pump, liquid metal flowmeter, load/drain reservoir, expansion reservoir, test section, and instrumentation. Operation of the circuit is based around the 37-pin partial-array core (pin and flow path dimensions are the same as those in a full core), designed to operate at 33 kWt. This presentation addresses the construction, fill and initial testing of the Stainless Steel NaK-Cooled Circuit (SNaKC).

Garber, Anne↗

Overcoming the Critical Shortage of STEM - Prepared Secondary Students Through Modeling and Simulation

In developing understanding of technological systems - modeling and simulation tools aid significantly in the learning and visualization processes. In design courses we sketch , extrude, shape, refine and animate with virtual tools in 3D. Final designs are built using a 3D printer. Aspiring architects create spaces with realistic materials and lighting schemes rendered on model surfaces to create breathtaking walk-throughs of virtual spaces. Digital Electronics students design systems that address real-world needs. Designs are simulated in virtual circuits to provide proof of concept before physical construction. This vastly increases students' ability to design and build complex systems. We find students using modeling and simulation in the learning process, assimilate information at a much faster pace and engage more deeply in learning. As Pre-Engineering educators within the Career and Technical Education program at our school division's Technology Academy our task is to help learners in their quest to develop deep understanding of complex technological systems in a variety of engineering disciplines. Today's young learners have vast opportunities to learn with tools that many of us only dreamed about a decade or so ago when we were engaged in engineering and other technical studies. Today's learner paints with a virtual brush - scenes that can aid significantly in the learning and visualization processes. Modeling and simulation systems have become the new standard tool set in the technical classroom [1-5]. Modeling and simulation systems are now applied as feedback loops in the learning environment. Much of the study of behavior change through the use of feedback loops can be attributed to Stanford Psychologist Alfred Bandura. "Drawing on several education experiments involving children, Bandura observed that giving individuals a clear goal and a means to evaluate their progress toward that goal greatly increased the likelihood that they would achieve it."

Spencer, Thomas↗

Analog Quantum Simulation of the Dynamics of Open Quantum Systems with Quantum Dots and Microelectronic Circuits

We introduce a general setup for the analog quantum simulation of the dynamics of open quantum systems based on semiconductor quantum dots electrically connected to a chain of quantum RLC electronic circuits. The dots are chosen to be in the regime of spin-charge hybridization to enhance their sensitivity to the RLC circuits while mitigating the detrimental effects of unwanted noise. In this context, we establish an experimentally realizable map between the hybrid system and a qubit coupled to thermal harmonic environments of arbitrary complexity that enables the analog quantum simulation of open quantum systems. We assess the utility of the simulator by numerically exact emulations that indicate that the experimental setup can faithfully mimic the intended target even in the presence of its natural inherent noise. We further provide a detailed analysis of the physical requirements on the quantum dots and the RLC circuits needed to experimentally realize this proposal that indicates that the simulator can be created with existing technology. The approach can exactly capture the effects of highly structured non-Markovian quantum environments typical of photosynthesis and chemical dynamics, and offer clear potential advantages over conventional and even quantum computation. The proposal opens a general path for effective quantum dynamics simulations based on semiconductor quantum dots.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Simulation and measurement of melting effects on metal sheets caused by direct lightning strikes

Direct lightning strikes melt metal parts of various systems, like fuel and propellant tanks of rockets and airplanes, at the point of strike. Responsible for this melting are the impulse current and, if occurring, the long duration current, both carrying a remarkable charge Q. For studying these meltings the simulation in the laboratory has to be based on the parameters of natural lightnings. International standards exist defining certain threat levels of natural lightnings and giving possible generator circuits for the simulation. The melting caused by both types of lightning currents show different appearance. Their characteristics, their differences in melting and heating of metal sheets are investigated. Nevertheless the simulation of lightning in the laboratory is imperfect. While natural lightning is a discharge without a counter electrode, the simulation always demands a close counter electrode. The influence of this counter electrode is studied.

Kern, Alexander↗

Implementation of interconnect simulation tools in spice

Accurate computer simulation of high speed digital computer circuits and communication circuits requires a multimode approach to simulate both the devices and the interconnects between devices. Classical circuit analysis algorithms (lumped parameter) are needed for circuit devices and the network formed by the interconnected devices. The interconnects, however, have to be modeled as transmission lines which incorporate electromagnetic field analysis. An approach to writing a multimode simulator is to take an existing software package which performs either lumped parameter analysis or field analysis and add the missing type of analysis routines to the package. In this work a traditionally lumped parameter simulator, SPICE, is modified so that it will perform lossy transmission line analysis using a different model approach. Modifying SPICE3E2 or any other large software package is not a trivial task. An understanding of the programming conventions used, simulation software, and simulation algorithms is required. This thesis was written to clarify the procedure for installing a device into SPICE3E2. The installation of three devices is documented and the installations of the first two provide a foundation for installation of the lossy line which is the third device. The details of discussions are specific to SPICE, but the concepts will be helpful when performing installations into other circuit analysis packages.

Satsangi, H.↗

Washout circuit design for multi-degrees-of-freedom moving base simulators.

A mathematical framework is presented for designing logic to accept motion-dependent parameters from a simulation, attenuating them ('washing them out'), and generating appropriately limited drive signals. This framework is sufficiently general to encompass six-degree-of-freedom simulators with large motion capability. Emphasis is placed on preserving certain motion cue relations (such as those that would be observed in coordinated flight). Strategies for simulating side forces via tilts are shown. Finally, several specific circuits are shown. These circuits have proven to be readily adaptable to a variety of moving-base simulators.

Conrad, B.↗

First-Order SPICE Modeling of Extreme-Temperature 4H-SiC JFET Integrated Circuits

A separate submission to this conference reports that 4H-SiC Junction Field Effect Transistor (JFET) digital and analog Integrated Circuits (ICs) with two levels of metal interconnect have reproducibly demonstrated electrical operation at 500 C in excess of 1000 hours. While this progress expands the complexity and durability envelope of high temperature ICs, one important area for further technology maturation is the development of reasonably accurate and accessible computer-aided modeling and simulation tools for circuit design of these ICs. Towards this end, we report on development and verification of 25 C to 500 C SPICE simulation models of first order accuracy for this extreme-temperature durable 4H-SiC JFET IC technology. For maximum availability, the JFET IC modeling is implemented using the baseline-version SPICE NMOS LEVEL 1 model that is common to other variations of SPICE software and importantly includes the body-bias effect. The first-order accuracy of these device models is verified by direct comparison with measured experimental device characteristics.

JFET↗

Op-amp Gyrator Simulates High Q Inductor

Gyrator circuit consisting of dual operational amplifier and four resistors inverts impedance of capacitor to simulate inductor. Synthetic inductor has high Q factor, good stability, wide bandwidth, and easily determined value of inductance that is independent of frequency. It readily lends itself to integrated-circuit applications, including filter networks.

Sutherland, W. C.↗

Estimating the Probability of Electrical Short Circuits from Tin Whiskers

To comply with lead-free legislation, many manufacturers have converted from tin-lead to pure tin finishes of electronic components. However, pure tin finishes have a greater propensity to grow tin whiskers than tin-lead finishes. Since tin whiskers present an electrical short circuit hazard in electronic components, simulations have been developed to quantify the risk of said short circuits occurring. Existing risk simulations make the assumption that when a free tin whisker has bridged two adjacent exposed electrical conductors, the result is an electrical short circuit. This conservative assumption is made because shorting is a random event that had an unknown probability associated with it. Note however that due to contact resistance electrical shorts may not occur at lower voltage levels. In our first article we developed an empirical probability model for tin whisker shorting. In this paper, we develop a more comprehensive empirical model using a refined experiment with a larger sample size, in which we studied the effect of varying voltage on the breakdown of the contact resistance which leads to a short circuit. From the resulting data we estimated the probability distribution of an electrical short, as a function of voltage. In addition, the unexpected polycrystalline structure seen in the focused ion beam (FIB) cross section in the first experiment was confirmed in this experiment using transmission electron microscopy (TEM). The FIB was also used to cross section two card guides to facilitate the measurement of the grain size of each card guide's tin plating to determine its finish .

Courey, Karim J.↗

Estimating the Probability of Electrical Short Circuits from Tin Whiskers

To comply with lead-free legislation, many manufacturers have converted from tin-lead to pure tin finishes of electronic components. However, pure tin finishes have a greater propensity to grow tin whiskers than tin-lead finishes. Since tin whiskers present an electrical short circuit hazard in electronic components, simulations have been developed to quantify the risk of said short circuits occurring. Existing risk simulations make the assumption that when a free tin whisker has bridged two adjacent exposed electrical conductors, the result is an electrical short circuit. This conservative assumption is made because shorting is a random event that had an unknown probability associated with it. Note however that due to contact resistance electrical shorts may not occur at lower voltage levels. In our first article we developed an empirical probability model for tin whisker shorting. In this paper, we develop a more comprehensive empirical model using a refined experiment with a larger sample size, in which we studied the effect of varying voltage on the breakdown of the contact resistance which leads to a short circuit. From the resulting data we estimated the probability distribution of an electrical short, as a function of voltage.

Courey, Karim J.↗

Developing an Empirical Model for Estimating the Probability of Electrical Short Circuits from Tin Whiskers

To comply with lead-free legislation, many manufacturers have converted from tin-lead to pure tin finishes of electronic components. However, pure tin finishes have a greater propensity to grow tin whiskers than tin-lead finishes. Since tin whiskers present an electrical short circuit hazard in electronic components, simulations have been developed to quantify the risk of said short circuits occurring. Existing risk simulations make the assumption that when a free tin whisker has bridged two adjacent exposed electrical conductors, the result is an electrical short circuit. This conservative assumption is made because shorting is a random event that had an unknown probability associated with it. Note however that due to contact resistance electrical shorts may not occur at lower voltage levels. In our first article we developed an empirical probability model for tin whisker shorting. In this paper, we develop a more comprehensive empirical model using a refined experiment with a larger sample size, in which we studied the effect of varying voltage on the breakdown of the contact resistance which leads to a short circuit. From the resulting data we estimated the probability distribution of an electrical short, as a function of voltage. In addition, the unexpected polycrystalline structure seen in the focused ion beam (FIB) cross section in the first experiment was confirmed in this experiment using transmission electron microscopy (TEM). The FIB was also used to cross section two card guides to facilitate the measurement of the grain size of each card guide's tin plating to determine its finish.

Courey, Karim J.↗

Fault Detection, Isolation and Recovery (FDIR) Portable Liquid Oxygen Hardware Demonstrator

The Fault Detection, Isolation and Recovery (FDIR) hardware demonstration will highlight the effort being conducted by Constellation's Ground Operations (GO) to provide the Launch Control System (LCS) with system-level health management during vehicle processing and countdown activities. A proof-of-concept demonstration of the FDIR prototype established the capability of the software to provide real-time fault detection and isolation using generated Liquid Hydrogen data. The FDIR portable testbed unit (presented here) aims to enhance FDIR by providing a dynamic simulation of Constellation subsystems that feed the FDIR software live data based on Liquid Oxygen system properties. The LO2 cryogenic ground system has key properties that are analogous to the properties of an electronic circuit. The LO2 system is modeled using electrical components and an equivalent circuit is designed on a printed circuit board to simulate the live data. The portable testbed is also be equipped with data acquisition and communication hardware to relay the measurements to the FDIR application running on a PC. This portable testbed is an ideal capability to perform FDIR software testing, troubleshooting, training among others.

Oostdyk, Rebecca L.↗

Physical Compact Model for Three-Terminal SONOS Synaptic Circuit Element

A well-posed physics-based compact model for a three-terminal silicon–oxide–nitride–oxide–silicon (SONOS) synaptic circuit element is presented for use by neuromorphic circuit/system engineers. Based on technology computer aided design (TCAD) simulations of a SONOS device, the model contains a nonvolatile memristor with the state variable QM representing the memristor charge under the gate of the three-terminal element. By incorporating the exponential dependence of the memristance on QM and the applied bias V for the gate, the compact model agrees quantitatively with the results from TCAD simulations as well as experimental measurements for the drain current. The compact model is implemented through VerilogA in the circuit simulation package Cadence Spectre and reproduces the experimental training behavior for the source–drain conductance of a SONOS device after applying writing pulses ranging from –12 V to +11 V, with an accuracy higher than 90%.

42 ENGINEERING↗

Auto-BLAST (AutoBLAST) [SWR-20-93]

Battery life modeling often involves a lot of manual parameter fitting and is not easy for users to adopt the model and use it. To reduce the difficulties for users to adopt battery lifetime models, an automatic battery lifetime modeling analysis and simulation tool suite, Auto-BLAST, has been developed. Auto-BLAST includes a lithium-loss-base life model, a battery electric model, and an algorithm which automatically fits all key parameters in the electric and life models using user provided data. The models and algorithm are packaged into two user-friendly GUIs, Auto-LifeMod, for easy battery life prognostic model fitting and Auto-LifeSim, for easy battery lifetime simulation. The lithium-loss-based life model adopts a similar model framework that models degradations using aging rate models, using battery cycling data to predict battery degradation and expected lifetime. The electric model is an equivalent circuit model which simulates battery voltage responses based on current/power demand profiles. The auto-fitting algorithm uses the user-input data to generate custom battery life model(s). Two GUIs, wrapping around the life model and the auto-fitting algorithm, provide friendly interfaces for users to generate a life model and use it for case study. One GUI requires summary data from accelerated battery life degradation tests as an input and produces battery life models predicting (a) capacity degradation, and (b) resistance growth of the battery. The GUI displays the electrical model response and the input experimental data against the life model predictions with fitted model parameters and fitting error. The GUI also generates an output file to save the fitted model parameters. The second GUI uses the life model from the first GUI and a user-defined battery cycling profile to predict battery lifetime degradation and expected lifetime. Predicted capacity and resistance vs. time are plotted in the GUI and saved to output file. There is a user guide for both GUIs

Mishra, Partha↗

Ether of Orbifolds

The orbifold lattice has been proposed as a route to practical quantum simulation of Yang--Mills theory, with claims of exponential speedup over all known approaches. Through analytical derivations, Monte Carlo simulation, and explicit circuit construction, we identify compounding costs entirely absent in Kogut--Susskind formulations: a mass-dependent Trotter overhead that scales as $m^4$, non-singlet contamination that grows as $m^2$ and worsens with penalty terms, and a mandatory mass extrapolation. Monte Carlo simulations of SU(3) establish a universal scaling: the continuum limit forces $m^2 \propto 1/a$, binding the Trotter step to the lattice spacing through a cost unique to orbifolds. For a fiducial $10^3$ calculation, the orbifold is $10^4$--$10^{10}$ times more expensive than every published alternative. These results indicate that the claimed computational advantages do not at present survive quantitative scrutiny.

Lamm, Henry [Fermilab] (ORCID:0000000330330791)↗