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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 289 records · Page 16
All sourcesNASA NTRSDOE OSTI
DOE OSTI2023

Neutralization Short-Circuiting with Weak Electrolytes Erodes the Efficiency of Bipolar Membranes

Bipolar membranes (BPMs) are critical components of a variety of electrochemical energy technologies. Many electrochemical applications require the use of buffers to maintain stable, nonextreme pH environments, yet the impact of buffers or weak acids/bases on the electrochemical behavior of BPMs remains poorly understood. Here, our data for a cell containing weak electrolytes is consistent with internal pH gradients within the anion exchange membrane (AEM) or cation exchange membrane (CEM) component of the BPM that form via ionic short-circuiting processes at open-circuit. Short-circuiting results from the coupling of co-ion crossover and parasitic neutralization and leads to buffering of the bipolar interface. This phenomenon, which we term neutralization short-circuiting, serves to erode BPM efficiency by attenuating the open-circuit membrane voltage and introducing parasitic reverse bias currents associated with weak acid/base dissociation at the interface. These findings establish a mechanistic basis for the operation of BPM cells in the presence of weak acid/base electrolytes.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2015

Potential up-scaling of inkjet-printed devices for logical circuits in flexible electronics

Inkjet Technology is often mis-believed to be a deposition/patterning technology which is not meant for high fabrication throughput in the field of printed and flexible electronics. In this work, we report on the 1) printing, 2) fabrication yield and 3) characterization of exemplary simple devices e.g. capacitors, organic transistors etc. which are the basic building blocks for logical circuits. For this purpose, printing is performed first with a Proof of concept Inkjet printing system Dimatix Material Printer 2831 (DMP 2831) using 10 pL small print-heads and then with Dimatix Material Printer 3000 (DMP 3000) using 35 pL industrial print-heads (from Fujifilm Dimatix). Printing at DMP 3000 using industrial print-heads (in Sheet-to-sheet) paves the path towards industrialization which can be defined by printing in Roll-to-Roll format using industrial print-heads. This pavement can be termed as 'Bridging Platform'. This transfer to 'Bridging Platform' from 10 pL small print-heads to 35 pL industrial print-heads help the inkjet-printed devices to evolve on the basis of functionality and also in form of up-scaled quantities. The high printed quantities and yield of inkjet-printed devices justify the deposition reliability and potential to print circuits. This reliability is very much desired when it comes to printing of circuits e.g. inverters, ring oscillator and any other planned complex logical circuits which require devices e.g. organic transistors which needs to get connected in different staged levels. Also, the up-scaled inkjet-printed devices are characterized and they reflect a domain under which they can work to their optimal status. This status is much wanted for predicting the real device functionality and integration of them into a planned circuit.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2024

Quantum Circuit Cutting for Classical Shadows

Classical shadow tomography is a sample-efficient technique for characterizing quantum systems and predicting many of their properties. Circuit cutting is a technique for dividing large quantum circuits into smaller fragments that can be executed more robustly using fewer quantum resources. We introduce a divide-and-conquer circuit cutting method for estimating the expectation values of observables using classical shadows. We derive a general formula for making predictions using the classical shadows of circuit fragments from arbitrarily cut circuits and provide the sample complexity analysis for the case when observables factorize across fragments. Then, we numerically show that our divide-and-conquer method outperforms traditional uncut shadow tomography when estimating high-weight observables that act non-trivially on many qubits and discuss the mechanisms for this advantage.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

Robust implementation of generative modeling with parametrized quantum circuits

Although the performance of hybrid quantum-classical algorithms is highly dependent on the selection of the classical optimizer and the circuit ansätze, a robust and thorough assessment on-hardware of such features has been missing to date. From the optimizer perspective, the primary challenge lies in the solver’s stochastic nature, and their significant variance over the random initialization. Therefore, a robust comparison requires one to perform several training curves for each solver before one can reach conclusions about their typical performance. Since each of the training curves requires the execution of thousands of quantum circuits in the quantum computer, such a robust study remained a steep challenge for most hybrid platforms available today. In this work, we leverage on Rigetti’s Quantum Cloud Services (QCS™) to overcome this implementation barrier, and we study the on-hardware performance of the data-driven quantum circuit learning (DDQCL) for three different state-of-the-art classical solvers, and on two-different circuit ansätze associated to different entangling connectivity graphs for the same task. Additionally, we assess the gains in performance from varying circuit depths. To evaluate the typical performance associated with each of these settings in this benchmark study, we use at least five independent runs of DDQCL towards the generation of quantum generative models capable of capturing the patterns of the canonical Bars and Stripes dataset. In this experimental benchmarking, the gradient-free optimization algorithms show an outstanding performance compared to the gradient-based solver. In particular, one of them had better performance when handling the unavoidable noisy objective function to be minimized under experimental conditions.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2024

Qutrit circuits and algebraic relations: A pathway to efficient spin-1 Hamiltonian simulation

Quantum information processing has witnessed significant advancements through the application of qubit-based techniques within universal gate sets. Recently, exploration beyond the qubit paradigm to d -dimensional quantum units or qudits has opened new avenues for improving computational efficiency. This paper delves into the qudit-based approach, particularly addressing the challenges presented in the high-fidelity implementation of qudit-based circuits due to increased complexity. As an innovative approach towards enhancing qudit circuit fidelity, we explore algebraic relations, such as the Yang-Baxter-like turnover equation, which may enable circuit compression and optimization. The paper introduces the turnover relation for the three-qutrit time propagator and its potential use in reducing circuit depth. We further investigate whether this relation can be generalized for higher-dimensional quantum circuits, including a focused study on the one-dimensional spin-1 Heisenberg model. Our paper outlines both rigorous and numerically efficient approaches to potentially achieve this generalization, providing a foundation for further explorations in the field of qudit-based quantum computing.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

A Polynomial-Time Classical Algorithm for Noisy Quantum Circuits

We provide a polynomial-time classical algorithm for noisy quantum circuits. The algorithm computes the expectation value of any observable for any circuit, with a small average error over input states drawn from an ensemble (e.g., the computational basis). Our approach is based upon the intuition that noise exponentially damps nonlocal correlations relative to local correlations. This enables one to classically simulate a noisy quantum circuit by keeping track of only the dynamics of local quantum information. Our algorithm also enables sampling from the output distribution of a circuit in quasipolynomial time, so long as the distribution anticoncentrates. A number of implications are discussed, including a fundamental limit on the efficacy of noise mitigation strategies: For constant noise rates, any quantum circuit for which error mitigation succeeds in polynomial-time on most input states can also be classically simulated in polynomial-time on most input states. Our algorithms scale exponentially in the inverse noise rate, which is fundamental and makes them impractical for current quantum devices.

decoherence↗
DOE OSTI2023

Two Circuits for Directing and Controlling Ballistic Fluxons

Reversible logic schemes using flux solitons (fluxons) on long Josephson junctions (LJJs) have recently been proposed. The attraction of the fluxon is that it propagates ballistically along an LJJ until it encounters a change in the character of the LJJ, often a designed circuit element. Logic gates involve fluxons interacting with circuit elements and with other fluxons. However, testing of ballistic fluxon circuits requires other circuits outside the logic family to direct and control fluxon motion. Here we discuss two such non-reversible fluxon control circuits. First, the polarity filter gate is a simple non-reversible gate that allows one polarity of fluxon to pass, while reflecting the other polarity. In the off state both polarities reflect. Second, the polarity separator generalizes on the polarity filter concept and allows separation of the two fluxon polarities into different LJJs. We discuss simulations of these structures and possible applications.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2016

Temperature-Dependent Short-Circuit Capability of Silicon Carbide Power MOSFETs

Our paper presents a comprehensive short-circuit ruggedness evaluation and numerical investigation of up-to-date commercial silicon carbide (SiC) MOSFETs. The short-circuit capability of three types of commercial 1200-V SiC MOSFETs is tested under various conditions, with case temperatures from 25 to 200 degrees C and dc bus voltages from 400 to 750 V. It is found that the commercial SiC MOSFETs can withstand short-circuit current for only several microseconds with a dc bus voltage of 750 V and case temperature of 200 degrees C. Moreover, the experimental short-circuit behaviors are compared, and analyzed through numerical thermal dynamic simulation. Specifically, an electrothermal model is built to estimate the device internal temperature distribution, considering the temperature-dependent thermal properties of SiC material. Based on the temperature information, a leakage current model is derived to calculate the main leakage current components (i.e., thermal, diffusion, and avalanche generation currents). Finally, numerical results show that the short-circuit failure mechanisms of SiC MOSFETs can be thermal generation current induced thermal runaway or high-temperature-related gate oxide damage.

4H↗
DOE OSTI2022

A Laplace-Domain Circuit Model for Fault and Stability Analysis Considering Unbalanced Topology

For systems subject to unbalanced faults, analytical model building for stability assessment is a challenging task. This letter presents a straightforward modeling approach. A generalized dynamic circuit representation is achieved by use of the Laplacian transform variable s . Here, we translate the voltage and current relationship at the fault location into the relationship of three subsystems. The final circuit model is an interconnected sequence network with impedances in the Laplace domain. This circuit can be directly converted from a steady-state sequence network. This modeling procedure is illustrated by an example case of an induction motor served by a grid through a series compensated line. Electromagnetic transient simulation results demonstrate that sub-synchronous oscillations can be mitigated when a single-line to ground fault is applied at the motor terminal. Stability analysis results based on the dynamic circuit corroborate the simulation results. What's more, the derived circuit effortlessly reveals why unbalance can enhance stability.

42 ENGINEERING↗
NASA NTRS2018

Printed Circuit Board Inspection and Quality Control - PCB Failure Causes and Cures

This two day workshop will discuss a range of topics, including root cause analysis, physics-of-failure principles and failure mechanisms in printed circuit boards. Printed circuit boards (PCBs) are the baseline for electronics manufacturing upon which electronic components are mounted and formed into electronic systems. PCBs are used in a variety of electronic circuits from simple one-transistor amplifiers to large super computers. A PCB serves three main functions: 1) it provides the necessary mechanical support for the components in the circuit 2) it provides the necessary electrical interconnections, and 3) it bears some form of legend which identifies the components it carries. The failure modes on the PCBs can be categorized in a hierarchical structure, in which the mechanisms and causes are site or location dependant. Specimen preparation techniques, non-destructive and destructive analysis, and materials characterization will also be discussed. The first day of the workshop will present methodologies for identifying potential failure mechanisms in electronics based on the failure history and, systematic approaches to root cause analysis. The second day will cover failure analysis techniques geared towards various failure mechanisms, along with numerous component and PCB assembly failure analysis case studies that illustrate the techniques and analysis. Failure analysis case studies will be used to illustrate the techniques and analysis principles to arrive at the root cause(s) of field failures on printed circuit boards, active components, and assemblies.

Printed circuit boards↗
DOE OSTI2015

NREL/NASA Internal Short-Circuit Instigator in Lithium Ion Cells

NREL has developed a device to test one of the most challenging failure mechanisms of lithium-ion (Li-ion) batteries -- a battery internal short circuit. Many members of the technical community believe that this type of failure is caused by a latent flaw that results in a short circuit between electrodes during use. As electric car manufacturers turn to Li-ion batteries for energy storage, solving the short circuit problem becomes more important. To date, no reliable and practical method exists to create on-demand internal shorts in Li-ion cells that produce a response that is relevant to the ones produced by field failures. NREL and NASA have worked to establish an improved ISC cell-level test method that simulates an emergent internal short circuit, is capable of triggering the four types of cell internal shorts, and produces consistent and reproducible results. Internal short circuit device design is small, low-profile and implantable into Li-ion cells, preferably during assembly. The key component is an electrolyte-compatible phase change material (PCM). The ISC is triggered by heating the cell above PCM melting temperature (presently 40 degrees C -- 60 degrees C). In laboratory testing, the activated device can handle currents in excess of 300 A to simulate hard shorts (< 2 mohms). Phase change from non-conducting to conducting has been 100 percent successful during trigger tests.

25 ENERGY STORAGE↗
NASA NTRS2006

Testing and Qualifying Linear Integrated Circuits for Radiation Degradation in Space

This paper discusses mechanisms and circuit-related factors that affect the degradation of linear integrated circuits from radiation in space. For some circuits there is sufficient degradation to affect performance at total dose levels below 4 krad(Si) because the circuit design techniques require higher gain for the pnp transistors that are the most sensitive to radiation. Qualification methods are recommended that include displacement damage as well as ionization damage.

integrated circuit testing↗
DOE OSTI2019

Multi-segment Winding Application for Axial Short Circuit Force Reduction Under Tap Changer Operation in HTS Transformers

High-temperature superconducting (HTS) transformers have remarkable appealing advantages over conventional ones. But higher brittleness of HTS windings with respect to copper windings makes HTS transformers more vulnerable in short circuit and inrush current situations. During tap changer operation, appreciable asymmetry and non-uniform distribution of ampere-turn along the windings causes high axial component of short circuit forces and makes the situation more severe. In this paper, multi-segment winding method is employed for reduction of axial short circuit forces. An analytical method is presented for calculation of axial component of short circuit forces under tap changer operation. Analytical method shows that with utilizing HLHLHLH asymmetrical multi-segment windings, during tap changer operation, the axial component of short circuit forces reduces significantly. The results of the analytical method are compared with the results of finite element method (FEM) model simulations, and the consistency is demonstrated.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2017

Efficient quantum circuits for Szegedy quantum walks

A major advantage in using Szegedy’s formalism over discrete-time and continuous-time quantum walks lies in its ability to define a unitary quantum walk by quantizing a Markov chain on a directed or weighted graph. In this paper, we present a general scheme to construct efficient quantum circuits for Szegedy quantum walks that correspond to classical Markov chains possessing transformational symmetry in the columns of the transition matrix. In particular, the transformational symmetry criteria do not necessarily depend on the sparsity of the transition matrix, so this scheme can be applied to non-sparse Markov chains. Two classes of Markov chains that are amenable to this construction are cyclic permutations and complete bipartite graphs, for which we provide explicit efficient quantum circuit implementations. We also prove that our scheme can be applied to Markov chains formed by a tensor product. We also briefly discuss the implementation of Markov chains based on weighted interdependent networks. In addition, we apply this scheme to construct efficient quantum circuits simulating the Szegedy walks used in the quantum Pagerank algorithm for some classes of non-trivial graphs, providing a necessary tool for experimental demonstration of the quantum Pagerank algorithm. - Highlights: • A general theoretical framework for implementing Szegedy walks using quantum circuits. • Explicit efficient quantum circuit implementation of the Szegedy walk for several classes of graphs. • Efficient implementation of Szegedy walks for quantum page-ranking of a certain class of graphs.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2023

Determining circuit model parameters from operation data for PV system degradation analysis: $\mathrm{PVPRO}$

Physics-based circuit parameters like series and shunt resistance are essential to provide insights into the degradation status of photovoltaic (PV) arrays. However, calculating these parameters typically requires a full current-voltage characteristic (I-V curve), the acquisition of which involves specific measurement devices and costly methods. Thus, I-V curves of the PV system level are often not available. Here this paper proposes a methodology (PVPRO) to estimate these I-V curve parameters using only operation (string-level DC voltage and current) and weather data (irradiance and temperature). PVPRO first performs multi-stage data pre-processing to remove noisy data. Next, the time-series DC data are used to fit an equivalent circuit single-diode model (SDM) to estimate the circuit parameters by minimizing the differences between the measured and estimated values. In this way, the time evolutions of the SDM parameters are obtained. We evaluate PVPRO on synthetic datasets and find an excellent estimation of both SDM and the key I-V parameters (e.g., open-circuit voltage, short-circuit current, maximum power, etc.) with an average relative error of 0.55%. The performance, especially the extracted degradation rate of parameters, is robust to various measurement noises and the presence of faults. In addition, PVPRO is applied to a 271 kW PV field system. The relative error between the real and estimated operation voltage and current is less than 1%, suggesting that degradation trends are well captured. PVPRO represents a promising open-source tool to extract the time-series degradation trends of key PV parameters from routine operation data.

14 SOLAR ENERGY↗
DOE OSTI2022

Estimating the randomness of quantum circuit ensembles up to 50 qubits

Random quantum circuits have been utilized in the contexts of quantum supremacy demonstrations, variational quantum algorithms for chemistry and machine learning, and blackhole information. The ability of random circuits to approximate any random unitaries has consequences on their complexity, expressibility, and trainability. To study this property of random circuits, we develop numerical protocols for estimating the frame potential, the distance between a given ensemble and the exact randomness. Our tensor-network-based algorithm has polynomial complexity for shallow circuits and is high-performing using CPU and GPU parallelism. We study 1. local and parallel random circuits to verify the linear growth in complexity as stated by the Brown–Susskind conjecture, and; 2. hardware-efficient ansätze to shed light on its expressibility and the barren plateau problem in the context of variational algorithms. Our work shows that large-scale tensor network simulations could provide important hints toward open problems in quantum information science.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2020

Integrative Circuit-Host Modeling of a Genetic Switch in Varying Environments

Synthetic biology is advancing into a new phase where real-world applications are emphasized. There is hence an urgent need for mathematical modeling that can quantitatively describe the behaviors of genetic devices in natural, fluctuating environments. We utilize an integrative circuit-host modeling framework to examine the dynamics of a genetic switch and its host cell in varying environments. For both steady-state and transient cases, we find increasing nutrient reduces the bistability region of the phase space and eventually drives the switch from bistability to monostability. In response, cellular growth and proteome partitioning experience the same transition. Antibiotic perturbations cause the similar circuit and host responses as nutrient variations. However, one difference is the trend of growth rate, which augments with nutrient but declines with antibiotic levels. The framework provides a mechanistic scheme to account for both the dynamic and static characteristics of the circuit-host system upon environmental perturbations, underscoring the intimacy of gene circuits and their hosts and elucidating the complexity of circuit behaviors arising from environmental variations.

59 BASIC BIOLOGICAL SCIENCES↗
DOE OSTI2024

Design considerations of series type hybrid circuit breaker (S‐HCB)

Abstract The series‐type direct current (DC) hybrid circuit breaker (S‐HCB) concept was previously reported to offer better performance than solid‐state circuit breakers (SSCB) and hybrid circuit breakers (HCB). S‐HCB offers low conduction power loss like an HCB and ‐scale interruption time, which is even faster than an SSCB. It uses a pulse transformer to isolate the lower‐voltage high‐inductance power electronic circuit from the high‐voltage, low‐inductance main power loop. This paper provides analysis of the impact of the S‐HCB circuit components on the overall system performance and a scalable S‐HCB design guide for different DC system voltage and current ratings. In addition, system energy flow analysis is performed in the time domain to provide an understanding of how energy is delivered, dissipated, and released throughout the entire fault interruption process. The S‐HCB prototype was experimentally tested at 3 kV/30 A and 6 kV/150A with the results showing the interruption of the low fault current of 30 A and the high fault current of 150 A within 8 and maintaining the fault current at a near zero value for 300 to enable an arcless opening of a series mechanical switch. The key design challenges of S‐HCB at high voltage and high current ratings were discussed and possible solutions to mitigate those challenges were introduced.

Alashi, Mahmoud↗