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Execution time supports for adaptive scientific algorithms on distributed memory machines
Optimizations are considered that are required for efficient execution of code segments that consists of loops over distributed data structures. The PARTI (Parallel Automated Runtime Toolkit at ICASE) execution time primitives are designed to carry out these optimizations and can be used to implement a wide range of scientific algorithms on distributed memory machines. These primitives allow the user to control array mappings in a way that gives an appearance of shared memory. Computations can be based on a global index set. Primitives are used to carry out gather and scatter operations on distributed arrays. Communications patterns are derived at runtime, and the appropriate send and receive messages are automatically generated.
Execution time support for scientific programs on distributed memory machines
Optimizations are considered that are required for efficient execution of code segments that consists of loops over distributed data structures. The PARTI (Parallel Automated Runtime Toolkit at ICASE) execution time primitives are designed to carry out these optimizations and can be used to implement a wide range of scientific algorithms on distributed memory machines. These primitives allow the user to control array mappings in a way that gives an appearance of shared memory. Computations can be based on a global index set. Primitives are used to carry out gather and scatter operations on distributed arrays. Communications patterns are derived at runtime, and the appropriate send and receive messages are automatically generated.
PSC implementation and integration
Hardware and software design of the performance seeking control (PSC) for the NASA F-15 research aircraft are described. The hardware architecture, vehicle management system computer (VMSC), pilot interface, and PSC mode selection are discussed. The PSC software is distributed among the VMSC, central computer, digital electronic engine controls (DEEC's), and electronic air inlet controllers (EAIC's). The major PSC modules, VMSC logic, VMSC channel C memory requirements, VMSC channel C timing, and navigation control indicator (NCI) variables and where they are located are presented.
Smart material based multilayered microbeam structures for spatial self-deployment and reconfiguration: A residual stress approach
Alleviation of the potentially damaging effects induced by residual stresses was comprehensively investigated in previous research. Here, this paper, however, presents a spatially self-deployable and reconfigurable multilayered microbeam which takes advantage of residual stresses and shape memory effects. Reconfigurable mechanism of a typical four-layered microbeam composed of Pt\Ni 50 Ti 50 \Ni 50 Ti 50 \Pt is introduced, followed by analytical modeling of the maximum distance of the self-deployed gap as functions of variable structural and material parameters, including compressive residual stress in Pt layers and tensile residual stress in Ni 50 Ti 50 layers. Analytical solutions given by the static model agree well with the results obtained via finite element models (FEMs). Fabrication, characterization, and in-situ experiments were carried out to validate the feasibility of deployment of the as-released four-layered microbeam. The maximum distance of the gap was measured to be 41.39 μm at 20 °C, which could be increased to 51.73 μm thanks to controllable reconfiguration driven by shape memory effects. Theoretical analysis of such self-deployment and reconfiguration suggested a tensile residual stress increase by 52 MPa in Ni 50 Ti 50 layers. The multilayered microbeam structure with capabilities of self-deployment and reconfiguration offers great potential for various emerging applications, such as micro robotics, medical drug delivery devices, and intelligent chip scale spacecraft.
The effects of voice and manual control mode on dual task performance
Two fundamental principles of human performance, compatibility and resource competition, are combined with two structural dichotomies in the human information processing system, manual versus voice output, and left versus right cerebral hemisphere, in order to predict the optimum combination of voice and manual control with either hand, for time-sharing performance of a dicrete and continuous task. Eight right handed male subjected performed a discrete first-order tracking task, time-shared with an auditorily presented Sternberg Memory Search Task. Each task could be controlled by voice, or by the left or right hand, in all possible combinations except for a dual voice mode. When performance was analyzed in terms of a dual-task decrement from single task control conditions, the following variables influenced time-sharing efficiency in diminishing order of magnitude, (1) the modality of control, (discrete manual control of tracking was superior to discrete voice control of tracking and the converse was true with the memory search task), (2) response competition, (performance was degraded when both tasks were responded manually), (3) hemispheric competition, (performance degraded whenever two tasks were controlled by the left hemisphere) (i.e., voice or right handed control). The results confirm the value of predictive models invoice control implementation.
Rule-based mechanisms of learning for intelligent adaptive flight control
How certain aspects of human learning can be used to characterize learning in intelligent adaptive control systems is investigated. Reflexive and declarative memory and learning are described. It is shown that model-based systems-theoretic adaptive control methods exhibit attributes of reflexive learning, whereas the problem-solving capabilities of knowledge-based systems of artificial intelligence are naturally suited for implementing declarative learning. Issues related to learning in knowledge-based control systems are addressed, with particular attention given to rule-based systems. A mechanism for real-time rule-based knowledge acquisition is suggested, and utilization of this mechanism within the context of failure diagnosis for fault-tolerant flight control is demonstrated.
Artificial spin ice phase-change memory resistors
Abstract We present a proposal for realization of an electrical memory reminiscent of a memristor in connected Kagome artificial spin ice. We show that current flowing through the system alters the magnetic ensemble, which in turns controls the overall resistance thus leaving memory of current passage in the system. This introduces a current-dependent effect for a dynamic resistive state. We simulate a spin-induced thermal phase-change mechanism, and an athermal domain-wall spin inversion. In both cases we observe electrical memory behavior with an I – V hysteretic pinched loop, typical of memristors. These results can be extended to the more complex geometries in which artificial spin ice can be designed to engineer the hysteresis curve.
In-flight utilization of the Mariner 10 spacecraft computer
Mariner 10 in its mission to Venus and Mercury used an onboard control computer with a 512-word memory. An outline is presented of the general philosophy adopted with respect to the utilization of the available memory and a description is given of the actual in-flight operation of the machine. The onboard computer system provided automatic stored-program sequence control of all spacecraft scientific, engineering, and propulsive maneuver operations. The system consisted of the special purpose digital computer and a fixed hard-wired sequencer. Attention is given to the programming architecture, aspects of mission design, and computer performance.
Berry curvature memory through electrically driven stacking transitions
In two-dimensional layered quantum materials, the interlayer stacking order determines both crystalline symmetry and quantum electronic properties such as Berry curvature, topology and electron correlation. Electrical stimuli can strongly influence quasi-particle interactions and the free energy landscape, thus making it possible to access hidden stacking orders with novel quantum properties and enabling dynamic engineering of these attributes. In this paper, we demonstrate electrically driven stacking transitions and a new type of nonvolatile memory based on Berry curvature in few-layer WTe 2 . The interplay of out-of-plane electric fields and electrostatic doping controls in-plane interlayer sliding and creates multiple polar and centrosymmetric stacking orders. In-situ nonlinear Hall transport reveals such stacking rearrangements result in a layer-parity-selective Berry curvature memory in momentum space, where the sign reversal of the Berry curvature only occurs in odd layer crystals. Our findings open an avenue towards exploring coupling between topology, electron correlations, and ferroelectricity in hidden stacking orders and demonstrate a new low energy cost, electrically-controlled topological memory in the atomically thin limit.
Programable Driver for Voltage-Controlled Oscillators
Electronically programable read-only memory (EPROM) and digital-to-analog converter provide customized time-varying voltage for frequency modulation. Voltage used to modulate IMPATT oscillator that serves as microwave pump for solid-state maser in low-noise amplifier. EPROM simple to tailor voltage waveform to suit characteristics of given maser. Digital information for waveform programed into EPROM chip; digital-to-analog converter reads information and produces corresponding analog wave. Principle readily adapted to other applications.
Design, processing, and testing of lsi arrays for space station
The design of a MOS 256-bit Random Access Memory (RAM) is discussed. Technological achievements comprise computer simulations that accurately predict performance; aluminum-gate COS/MOS devices including a 256-bit RAM with current sensing; and a silicon-gate process that is being used in the construction of a 256-bit RAM with voltage sensing. The Si-gate process increases speed by reducing the overlap capacitance between gate and source-drain, thus reducing the crossover capacitance and allowing shorter interconnections. The design of a Si-gate RAM, which is pin-for-pin compatible with an RCA bulk silicon COS/MOS memory (type TA 5974), is discussed in full. The Integrated Circuit Tester (ICT) is limited to dc evaluation, but the diagnostics and data collecting are under computer control. The Silicon-on-Sapphire Memory Evaluator (SOS-ME, previously called SOS Memory Exerciser) measures power supply drain and performs a minimum number of tests to establish operation of the memory devices. The Macrodata MD-100 is a microprogrammable tester which has capabilities of extensive testing at speeds up to 5 MHz. Beam-lead technology was successfully integrated with SOS technology to make a simple device with beam leads. This device and the scribing are discussed.
The Lick Observatory charge-coupled device /CCD/ and controller
A description is given of a flexible microprocessor-based controller for charge-coupled device two-dimensional detectors. It is noted that the controller can operate under manual control or as a slave to a remote computer linked by coaxial cable. The system is discussed, together with data taken at the telescope and in the laboratory. The flexibility of the controller derives from its modular form and from the use of a programmable 8-bit microprocessor to control and sequence the electronic logic. The electronic circuits for such functions as signal processing, clock sequencing, voltage level adjustment, and temperature control are on small individual plug-in cards, making future improvements and changes simple. The software of the microprocessor is stored in erasable, programmable, read-only memory. Among the limitations of the controller is a scan speed of roughly 35 microsec per pixel.
A wide bandwidth CCD buffer memory system
A prototype system was implemented to demonstrate that CCD's can be applied advantageously to the problem of low power digital storage and particularly to the problem of interfacing widely varying data rates. CCD shift register memories (8K bit) were used to construct a feasibility model 128 K-bit buffer memory system. Serial data that can have rates between 150 kHz and 4.0 MHz can be stored in 4K-bit, randomly-accessible memory blocks. Peak power dissipation during a data transfer is less than 7 W, while idle power is approximately 5.4 W. The system features automatic data input synchronization with the recirculating CCD memory block start address. System expansion to accommodate parallel inputs or a greater number of memory blocks can be performed in a modular fashion. Since the control logic does not increase proportionally to increase in memory capacity, the power requirements per bit of storage can be reduced significantly in a larger system.
Packaging of a large capacity magnetic bubble domain spacecraft recorder
A Solid State Spacecraft Data Recorder (SSDR), based on bubble domain technology, having a storage capacity of 10 to the 8th power bits, was designed and is being tested. The recorder consists of two memory modules each having 32 cells, each cell containing sixteen 100 kilobit serial bubble memory chips. The memory modules are interconnected to a Drive and Control Unit (DCU) module containing four microprocessors, 500 integrated circuits, a RAM core memory and two PROM's. The two memory modules and DCU are housed in individual machined aluminum frames, are stacked in brick fashion and through bolted to a base plate assembly which also houses the power supply.
Tolerating memory stack failures in multi-stack systems
Memory management circuitry and processes operate to improve reliability of a group of memory stacks, providing that if a memory stack or a portion thereof fails during the product's lifetime, the system may still recover with no errors or data loss. A front-end controller receives a block of data requested to be written to memory, divides the block into sub-blocks, and creates a new redundant reliability sub-block. The sub-blocks are then written to different memory stacks. When reading data from the memory stacks, the front-end controller detects errors indicating a failure within one of the memory stacks, and recovers corrected data using the reliability sub-block. The front-end controller may monitor errors for signs of a stack failure and disable the failed stack.
Cognitively defined Alzheimer's dementia subgroups have distinct atrophy patterns
We sought to determine structural magnetic resonance imaging (MRI) characteristics across subgroups defined based on relative cognitive domain impairments using data from the Alzheimer's Disease Neuroimaging Initiative (ADNI) and to compare cognitively defined to imaging-defined subgroups. We used data from 584 people with Alzheimer's disease (AD) (461 amyloid positive, 123 unknown amyloid status) and 118 amyloid-negative controls. We used voxel-based morphometry to compare gray matter volume (GMV) for each group compared to controls and to AD-Memory. There was pronounced bilateral lower medial temporal lobe atrophy with relative cortical sparing for AD-Memory, lower left hemisphere GMV for AD-Language, anterior lower GMV for AD-Executive, and posterior lower GMV for AD-Visuospatial. Formal asymmetry comparisons showed substantially more asymmetry in the AD-Language group than any other group (p = 1.15 × 10 -10 ). For overlap between imaging-defined and cognitively defined subgroups, AD-Memory matched up with an imaging-defined limbic predominant group. MRI findings differ across cognitively defined AD subgroups.
Effect of Ion Irradiation on Amorphous and Crystalline Ge–Se and Their Application as Phase Change Temperature Sensor
Research on phase change materials is predominantly focused on their application as memory devices or for temperature control which requires low phase change temperature. The Ge–Se binary chalcogenide glass system with its wide glass-forming region is a potential candidate for high-temperature and high-radiation phase change applications. In this study, the concept of employing Ge x Se 100– x glasses to monitor high temperature (450–528 °C) using the phase change effect, is reported. Materials selection, device structure, and performance of prototype sensors are analyzed. In addition, the effect of heavy ion irradiation by Xe ions with energies of 200, 600, and 1000 keV (fluence ≈10 14 cm –2 ) on the Ge x Se 100– x ( x = 30, 33, 40) thin films and phase change devices is studied. The irradiation effect on the amorphous and crystalline structure of the thin films is evaluated by Raman spectroscopy and X-ray diffraction (XRD). Although the changes in the structural units of amorphous films are negligible, in crystalline films orthorhombic-GeSe 2 crystals are found to be most affected by irradiation and a new phase, orthorhombic GeSe is found in the thin films after irradiation. The performance of a sensor with an active film of Ge 40 Se 60 is also shown as an example.