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At least 271 records · Page 15

All sources NASA NTRS DOE OSTI

NASA NTRS2011

AC Electric Field Activated Shape Memory Polymer Composite

Shape memory materials have drawn interest for applications like intelligent medical devices, deployable space structures and morphing structures. Compared to other shape memory materials like shape memory alloys (SMAs) or shape memory ceramics (SMCs), shape memory polymers (SMPs) have high elastic deformation that is amenable to tailored of mechanical properties, have lower density, and are easily processed. However, SMPs have low recovery stress and long response times. A new shape memory thermosetting polymer nanocomposite (LaRC-SMPC) was synthesized with conductive fillers to enhance its thermo-mechanical characteristics. A new composition of shape memory thermosetting polymer nanocomposite (LaRC-SMPC) was synthesized with conductive functionalized graphene sheets (FGS) to enhance its thermo-mechanical characteristics. The elastic modulus of LaRC-SMPC is approximately 2.7 GPa at room temperature and 4.3 MPa above its glass transition temperature. Conductive FGSs-doped LaRC-SMPC exhibited higher conductivity compared to pristine LaRC SMP. Applying an electric field at between 0.1 Hz and 1 kHz induced faster heating to activate the LaRC-SMPC s shape memory effect relative to applying DC electric field or AC electric field at frequencies exceeding1 kHz.

Kang, Jin Ho↗

NASA NTRS2011

Initial Results from On-Orbit Testing of the Fram Memory Test Experiment on the Fastsat Micro-Satellite

The Memory Test Experiment is a space test of a ferroelectric memory device on a low Earth orbit satellite that launched in November 2010. The memory device being tested is a commercial Ramtron Inc. 512K memory device. The circuit was designed into the satellite avionics and is not used to control the satellite. The test consists of writing and reading data with the ferroelectric based memory device. Any errors are detected and are stored on board the satellite. The data is sent to the ground through telemetry once a day. Analysis of the data can determine the kind of error that was found and will lead to a better understanding of the effects of space radiation on memory systems. The test is one of the first flight demonstrations of ferroelectric memory in a near polar orbit which allows testing in a varied radiation environment. The initial data from the test is presented. This paper details the goals and purpose of this experiment as well as the development process. The process for analyzing the data to gain the maximum understanding of the performance of the ferroelectric memory device is detailed.

MacLeond, Todd C.↗

NASA NTRS2018

A Study of Shape Memory Polymer Based Slat-Cove Filler

Aircraft noise reduction is an application of current intense interest for which smart materials show significant potential. Specifically, the aeroacoustic noise produced by the unsteady aerodynamic flow about the leading-edge high-lift device, such as leading-edge slat, of typical transport-aircraft wings is of particular interest. Concepts with the most promise to mitigate this noise source, most notably the slat-cove filler concept, have focused on highly reconfigurable structures that change shape between different phases of the flight envelope. These shape changes often involve large deformation, which has stimulated the consideration of shape memory materials. In recent years, shape memory materials (SMMs) have drawn greater interest for applications such as smart fabrics, intelligent medical devices, self-deployable space structures, morphing structures and packaging. Compared to other shape memory materials, like shape memory alloys (SMAs) or shape memory ceramics (SMCs), shape memory polymers (SMPs) have desirable advantages such as high elastic deformation to enable large shape change, broad tailorability of mechanical properties, potential biocompatibility and biodegradability, ductility, light weight and ease of processing. However, SMPs still have some critical disadvantages such as insufficient mechanical and thermal characteristics for structural applications, low recovery stress, and long response time. The new LaRC shape memory thermosetting polymer composite (LaRC-SMPC) discussed herein was synthesized with nontoxic monomers and conductive/magnetic fillers to yield enhanced thermal/mechanical characteristics and faster response times. LaRC-SMPCs with a variety of fiber reinforcements [Kevlar®, carbon fiber (standard and thin-ply), and carbon-nanotube (CNT) sheet] were fabricated to tailor the physical properties and test for suitability as a slat-cove filler (SCF). The performance of SCF prototypes fabricated with the developed LaRC-SMPCs was evaluated using a bench-top test apparatus. The SCFs made of Kevlar® fiber fabric or carbon fiber fabric infused shape memory polymer composite (SMPC) exhibited kinking during simulated deployment and stowage, which can be problematic during operation. The SCF made of CNT sheet/SMP composite did not exhibit kinking, but the deployment was sluggish compared to carbon fiber fabric/SMP composite. This report documents the evolution of designing SMPCs as slat-cove fillers for aircraft noise reduction. In the course of the investigation, several 2 approaches were investigated to address shortcomings in material characteristics based on performance requirements of operational slat-cove fillers.

Kang, Jin Ho↗

DOE OSTI2018

Bidirectional shape memory device

A resistively heated shape memory polymer device is operated using resistive heating to heat the shape memory polymer device. The resistively heated shape memory polymer device is made by providing a wire that includes a resistive medium. The wire is coated with a first shape memory polymer. The wire is exposed and electrical leads are attached to the wire. In one embodiment the shape memory polymer device is in the form of a clot destruction device. In another embodiment the shape memory polymer device is in the form of a microvalve. In another embodiment the shape memory polymer device is in the form of a micropump. In yet another embodiment the shape memory polymer device is in the form of a thermostat or relay switch.

36 MATERIALS SCIENCE↗

DOE OSTI2018

Bidirectional shape memory device

Marion, III, John E.↗

DOE OSTI2019

Logical memory address regions

Systems, apparatuses, and methods for implementing logical memory address regions in a computing system. The physical memory address space of a computing system may be partitioned into a plurality of logical memory address regions. Each logical memory address region may be dynamically configured at run-time to meet changing application needs of the system. Each logical memory address region may also be configured separately from the other logical memory address regions. Each logical memory address region may have associated parameters that identify region start address, region size, cell-level mode, physical-to-device mapping scheme, address masks, access permissions, wear-leveling data, encryption settings, and compression settings. These parameters may be stored in a table which may be used when processing memory access requests.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2019

Memory controller that forces prefetches in response to a present row address change timing constraint

An apparatus having a memory controller is described. The memory controller includes prefetch circuitry to prefetch, from a memory, data having a same row address in response to the memory controller's servicing of its request stream being stalled because of a timing constraint that prevents a change in row address. The memory controller also includes a cache to cache the prefetched data. The memory controller also includes circuitry to compare addresses of read requests in the memory controller's request stream against respective addresses of the prefetched data in the cache and to service those of the requests in the memory controller's request stream having a matching address with corresponding ones of the prefetched data in the cache.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2019

Method and apparatus for reducing memory access latency

Logic such as a memory controller writes primary data from an incoming write request as well as corresponding replicated primary data (which is a copy of the primary data) to one or more different memory banks of random access memory in response to determining a memory access contention condition for the address (including a range of addresses) corresponding to the incoming write request. When the memory bank containing the primary data is busy servicing a write request, such as to another row of memory in the bank, a read request for the primary data is serviced by reading the replicated primary data from the different memory bank of the random access memory to service the incoming read request.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2020

Dynamic adaptation of memory page management policy

Systems, apparatuses, and methods for determining preferred memory page management policies by software are disclosed. Software executing on one or more processing units generates a memory request. Software determines the preferred page management policy for the memory request based at least in part on the data access size and data access pattern of the memory request. Software conveys an indication of a preferred page management policy to a memory controller. Then, the memory controller accesses memory for the memory request using the preferred page management policy specified by software.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2021

Buffered freepointer management memory system

A system and method of buffered freepointer management to handle burst traffic to fixed size structures in an external memory system. A circular queue stores implicitly linked free memory locations, along with an explicitly linked list in memory. The queue is updated at the head with newly released locations, and new locations from memory are added at the tail. When a freed location in the queue is reused, external memory need not be updated. When the queue is full, the system attempts to release some of the freepointers such as by dropping them if they are already linked, updating the linked list in memory only if those dropped are not already linked. Latency can be further reduced by loading new locations from memory when the queue is nearly empty, rather than waiting for empty condition, and by writing unlinked locations to memory when the queue is nearly full.

Jacob, Philip↗

DOE OSTI2021

Memory hierarchy using page-based compression

A system includes a device coupleable to a first memory. The device includes a second memory to cache data from the first memory. The second memory is to store a set of compressed pages of the first memory and a set of page descriptors. Each compressed page includes a set of compressed data blocks. Each page descriptor represents a corresponding page and includes a set of location identifiers that identify the locations of the compressed data blocks of the corresponding page in the second memory. The device further includes compression logic to compress data blocks of a page to be stored to the second memory and decompression logic to decompress compressed data blocks of a page accessed from the second memory.

Loh, Gabriel H.↗

DOE OSTI2021

High-T c Superconducting Memory Cell

In this paper, operational principles of a cryogenic memory cell that utilizes high-temperature superconductors (high-T c ) are presented. Such a cell consists of three inductively coupled Josephson junctions coupled via inductors. Design and operational logic of this type of cell were recently introduced and demonstrated for low temperature 4 K environment. The basic memory cell operations (read, write, reset) can be implemented on the same simple circuit and both destructive and non-destructive memory cell operations can be realized. Here, we present the design principles and computational validation of basic memory cell operations (write, read, and reset) for the high-T c memory cell. In conclusion, our results for the high-T c memory cell operations show very good resemblance with the previously presented low-temperature 4 K memory cell operations.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

DOE OSTI2019

Ecological memory of daily carbon exchange across the globe and its importance in drylands

How do antecedent (past) conditions influence land-carbon dynamics after those conditions no longer persist? In particular, quantifying such memory effects associated with the influence of past environmental (exogenous) and biological (endogenous) conditions is crucial for understanding and predicting the carbon cycle. Here we show, using data from 42 eddy covariance sites across six major biomes, that ecological memory—decomposed into environmental and biological memory components—of daily net carbon exchange (NEE) is critical for understanding the land-carbon metabolism, especially in drylands for which memory explains ~ 32% of the variation in NEE. The strong environmental memory in drylands was primarily driven by short- and long-term moisture status. Moreover, the strength of environmental memory scales with increasing water stress. This universal scaling relationship, emerging within and among major biomes, suggests a potential adaptive response to water limitation. Our findings underscore the necessity of considering ecological memory in experiments, observations and modelling.

54 ENVIRONMENTAL SCIENCES↗

DOE OSTI2025

A Study on the Impact of Temperature-Dependent Ferroelectric Switching Behavior in 3D Memory Architecture

The flourishing development of neural networks that require exponentially growing amounts of data has presented an elevated demand for memory footprint. To address this, researchers have been exploring hardware accelerators with innovative memory architectures like 3D memory. These 3D memory architectures offer enhanced storage capacity and processing capabilities, at a cost of rising on-chip temperature during operation. Hafnium Zirconium Oxide (HZO) based Ferroelectric Random Access Memory (FeRAM) is a promising nonvolatile memory candidate in neural network hardware accelerators for its outstanding write performance and reliability. However, its implementation in the architecture regarding the temperature-dependent ferroelectric switching behavior has not been well studied. In this work, we study the thermal impacts on polarization switching through experimental devices and simulation results. We conduct the circuit and architecture-level simulations to showcase that one can exploit this temperature rise to reduce FeRAM's write voltage and write energy due to its unique temperature-activated polarization switching mechanisms. As the on-chip temperature increases to 351K (ambient temperature at 300K) due to neural network workloads, the access energy per bit can be reduced by 27.6% when a dynamic write voltage is applied.

36 MATERIALS SCIENCE↗

DOE OSTI2023

Spatially Distributed Ramp Reversal Memory in VO 2

Ramp‐reversal memory has recently been discovered in several insulator‐to‐metal transition materials where a non‐volatile resistance change can be set by repeatedly driving the material partway through the transition. This study uses optical microscopy to track the location and internal structure of accumulated memory as a thin film of VO 2 is temperature cycled through multiple training subloops. These measurements reveal that the gain of insulator phase fraction between consecutive subloops occurs primarily through front propagation at the insulator‐metal boundaries. By analyzing transition temperature maps, it is found, surprisingly, that the memory is also stored deep inside both insulating and metallic clusters throughout the entire sample, making the metal‐insulator coexistence landscape more rugged. This non‐volatile memory is reset after heating the sample to higher temperatures, as expected. Diffusion of point defects is proposed to account for the observed memory writing and subsequent erasing over the entire sample surface. By spatially mapping the location and character of non‐volatile memory encoding in VO 2 , this study results enable the targeting of specific local regions in the film where the full insulator‐to‐metal resistivity change can be harnessed in order to maximize the working range of memory elements for conventional and neuromorphic computing applications.

36 MATERIALS SCIENCE↗

DOE OSTI2019

A review of computational modeling techniques in study and design of shape memory ceramics

Shape memory ceramics are a unique family of shape memory materials with a wide variety of applications, such as ultra-high energy dissipation and high-temperature actuation. Along with significant progress in the experimental study of zirconia-based shape memory ceramics in recent years, computational simulations have exhibited powerful capabilities in revealing nano/microstructure-dependent deformation and failure mechanisms in these materials. In this work, we review the recent progress in understanding the phase transformation behavior in shape memory ceramics, focusing on computational modeling of zirconia-based ceramics. Electronic structure calculations have provided new data on the phase stability and surface properties of shape memory ceramics. At the nanometer length scale, molecular dynamics simulations have captured fundamental information about martensitic phase transformation and the effects of grain boundaries and defects on mechanical response of bi- and polycrystalline zirconia-based ceramics. At the micrometer length scale, advanced phase-field models have shown the ability to predict morphological evolution of microstructures and the corresponding mechanical responses in good agreement with experimental observations. Despite the recent multiscale computational advancements, further developments are required to establish processing-structure-property-performance relations that will lead to reliable and practical strategies for designing zirconia-based (or other) ceramics with improved and sustained shape memory responses. This article critically reviews current computational modeling techniques and provides an outlook for the study and design of the next generation of shape memory ceramics.

36 MATERIALS SCIENCE↗

DOE OSTI2014

Enhanced memory effect with embedded graphene nanoplatelets in ZnO charge trapping layer

A charge trapping memory with graphene nanoplatelets embedded in atomic layer deposited ZnO (GNIZ) is demonstrated. The memory shows a large threshold voltage V{sub t} shift (4 V) at low operating voltage (6/−6 V), good retention (>10 yr), and good endurance characteristic (>10{sup 4} cycles). This memory performance is compared to control devices with graphene nanoplatelets (or ZnO) and a thicker tunnel oxide. These structures showed a reduced V{sub t} shift and retention characteristic. The GNIZ structure allows for scaling down the tunnel oxide thickness along with improving the memory window and retention of data. The larger V{sub t} shift indicates that the ZnO adds available trap states and enhances the emission and retention of charges. The charge emission mechanism in the memory structures with graphene nanoplatelets at an electric field E ≥ 5.57 MV/cm is found to be based on Fowler-Nordheim tunneling. The fabrication of this memory device is compatible with current semiconductor processing, therefore, has great potential in low-cost nano-memory applications.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

DOE OSTI2014

Metal-organic molecular device for non-volatile memory storage

Non-volatile memory devices have been of immense research interest for their use in active memory storage in powered off-state of electronic chips. In literature, various molecules and metal compounds have been investigated in this regard. Molecular memory devices are particularly attractive as they offer the ease of storing multiple memory states in a unique way and also represent ubiquitous choice for miniaturized devices. However, molecules are fragile and thus the device breakdown at nominal voltages during repeated cycles hinders their practical applicability. Here, in this report, a synergetic combination of an organic molecule and an inorganic metal, i.e., a metal-organic complex, namely, palladium hexadecylthiolate is investigated for memory device characteristics. Palladium hexadecylthiolate following partial thermolysis is converted to a molecular nanocomposite of Pd(II), Pd(0), and long chain hydrocarbons, which is shown to exhibit non-volatile memory characteristics with exceptional stability and retention. The devices are all solution-processed and the memory action stems from filament formation across the pre-formed cracks in the nanocomposite film.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗