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At least 271 records · Page 15

Error control for reliable digital data transmission and storage systems

A problem in designing semiconductor memories is to provide some measure of error control without requiring excessive coding overhead or decoding time. In LSI and VLSI technology, memories are often organized on a multiple bit (or byte) per chip basis. For example, some 256K-bit DRAM's are organized in 32Kx8 bit-bytes. Byte oriented codes such as Reed Solomon (RS) codes can provide efficient low overhead error control for such memories. However, the standard iterative algorithm for decoding RS codes is too slow for these applications. In this paper we present some special decoding techniques for extended single-and-double-error-correcting RS codes which are capable of high speed operation. These techniques are designed to find the error locations and the error values directly from the syndrome without having to use the iterative alorithm to find the error locator polynomial. Two codes are considered: (1) a d sub min = 4 single-byte-error-correcting (SBEC), double-byte-error-detecting (DBED) RS code; and (2) a d sub min = 6 double-byte-error-correcting (DBEC), triple-byte-error-detecting (TBED) RS code.

Costello, D. J., Jr.↗

Analysis and Benchmarking of feature reduction for classification under computational constraints

Abstract Machine learning is most often expensive in terms of computational and memory costs due to training with large volumes of data. Current computational limitations of many computing systems motivate us to investigate practical approaches, such as feature selection and reduction, to reduce the time and memory costs while not sacrificing the accuracy of classification algorithms. In this work, we carefully review, analyze, and identify the feature reduction methods that have low costs/overheads in terms of time and memory. Then, we evaluate the identified reduction methods in terms of their impact on the accuracy, precision, time, and memory costs of traditional classification algorithms. Specifically, we focus on the least resource intensive feature reduction methods that are available in Scikit-Learn library. Since our goal is to identify the best performing low-cost reduction methods, we do not consider complex expensive reduction algorithms in this study. In our evaluation, we find that at quadratic-scale feature reduction, the classification algorithms achieve the best trade-off among competitive performance metrics. Results show that the overall training times are reduced 61%, the model sizes are reduced 6×, and accuracy scores increase 25% compared to the baselines on average with quadratic scale reduction.

97 MATHEMATICS AND COMPUTING↗

Decoding of DBEC-TBED Reed-Solomon codes

A problem in designing semiconductor memories is to provide some measure of error control without requiring excessive coding overhead or decoding time. In LSI and VLSI technology, memories are often organized on a multiple bit (or byte) per chip basis. For example, some 256 K bit DRAM's are organized in 32 K x 8 bit-bytes. Byte-oriented codes such as Reed-Solomon (RS) codes can provide efficient low overhead error control for such memories. However, the standard iterative algorithm for decoding RS codes is too slow for these applications. The paper presents a special decoding technique for double-byte-error-correcting, triple-byte-error-detecting RS codes which is capable of high-speed operation. This technique is designed to find the error locations and the error values directly from the syndrome without having to use the iterative algorithm to find the error locator polynomial.

Deng, Robert H.↗

Opal: A Centralized Memory Manager for Investigating Disaggregated Memory Systems

Many modern applications have memory footprints that are increasingly large, driving system memory capacities higher and higher. Moreover, these systems are often organized where the bulk of the memory is collocated with the compute capability, which necessitates the need for message passing APIs to facilitate information sharing between compute nodes. Due to the diversity of applications that must run on High-Performance Computing (HPC) systems, the memory utilization can fluctuate wildly from one application to another. And, because memory is located in the node, maintenance can become problematic because each node must be taken offline and upgraded individually. To address these issues, vendors are exploring disaggregated, memory-centric, systems. In this type of organization, there are discrete nodes, reserved solely for memory, which are shared across many compute nodes. Due to their capacity, low-power, and non-volatility, Non-Volatile Memories (NVMs) are ideal candidates for these memory nodes. This report discusses a new component for the Structural Simulation Toolkit (SST), Opal, that can be used to study the impact of using NVMs in a disaggregated system in terms of performance, security, and memory management. This page intentionally left blank.

97 MATHEMATICS AND COMPUTING↗

Nanoprobe Based Information Processing: Nanoprobe‐Electronics

Abstract With computational architectures becoming data‐centric and with the rise of in‐memory computing, the role of memory will be ever more crucial. In turn, storing massive amount of data demands for ultra‐low power and non‐volatile types necessitating new memory technologies. Here, a controllable nanoelectromechanical (NEM) spin memory is proposed for compact nonvolatile memory arrays. It combines the advantages of both nanomechanical and spin‐transfer torque (STT) magnetic memory devices to overcome fundamental scalability roadblocks of non‐hybrid alternatives. The hybrid system paves the way to a new memory technology in the regime of sub‐10‐nm lateral size with a sub‐1‐MA cm −2 switching energy.

Yi, Bao↗

Plated wire memory subsystem

The work performed entailed the design, development, construction and testing of a 4000 word by 18 bit random access, NDRO plated wire memory for use in conjunction with a spacecraft imput/output unit and central processing unit. The primary design parameters, in order of importance, were high reliability, low power, volume and weight. A single memory unit, referred to as a qualification model, was delivered.

Reynolds, L.↗

Test and evaluation of bubble memories

A description is presented of a test program which has shown that well-constructed bubble memories can operate reliably over long periods of time and at low error rates. Even the relatively high error rate of one memory during burn-in can be considered acceptable if compared with tape recorder standards. No wear-out mechanism or aging could be detected. Bubble memories are now considered suitable for long-duration space missions and certainly are suitable for many military and commercial applications. It must be recognized, however, that bubble memories are complex devices and not yet fully understood. While the particular memory tested may never find practical applications, it nevertheless has provided insight into performance characteristics considered typical of bubble memories.

Bahm, E.↗

Nonvolatile Voltage Controlled Molecular Spin-State Switching for Memory Applications

Nonvolatile, molecular multiferroic devices have now been demonstrated, but it is worth giving some consideration to the issue of whether such devices could be a competitive alternative for solid-state nonvolatile memory. For the Fe (II) spin crossover complex [Fe{H2B(pz)2}2(bipy)], where pz = tris(pyrazol-1-yl)-borohydride and bipy = 2,2′-bipyridine, voltage-controlled isothermal changes in the electronic structure and spin state have been demonstrated and are accompanied by changes in conductance. Higher conductance is seen with [Fe{H2B(pz)2}2(bipy)] in the high spin state, while lower conductance occurs for the low spin state. Plausibly, there is the potential here for low-cost molecular solid-state memory because the essential molecular thin films are easily fabricated. However, successful device fabrication does not mean a device that has a practical value. Here, we discuss the progress and challenges yet facing the fabrication of molecular multiferroic devices, which could be considered competitive to silicon.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Hierarchical memories: Simulating quantum LDPC codes with local gates

Constant-rate low-density parity-check (LDPC) codes are promising candidates for constructing efficient fault-tolerant quantum memories. However, if physical gates are subject to geometric-locality constraints, it becomes challenging to realize these codes. In this paper, we construct a new family of [[N,K,D]] codes, referred to as hierarchical codes, that encode a number of logical qubits K=Ω(N/log(N) 2 ). The N th element of this code family is obtained by concatenating a constant-rate quantum LDPC code with a surface code; nearest-neighbor gates in two dimensions are sufficient to implement the corresponding syndrome-extraction circuit and achieve a threshold. Below threshold the logical failure rate vanishes superpolynomially as a function of the distance D(N). We present a bilayer architecture for implementing the syndrome-extraction circuit, and estimate the logical failure rate for this architecture. Under conservative assumptions, we find that the hierarchical code outperforms the basic encoding where all logical qubits are encoded in the surface code.

Pattison, Christopher A. [California Institute of ↗

Sparse Approximate Multifrontal Factorization with Composite Compression Methods

This article presents a fast and approximate multifrontal solver for large sparse linear systems. In a recent work by Liu et al., we showed the efficiency of a multifrontal solver leveraging the butterfly algorithm and its hierarchical matrix extension, HODBF (hierarchical off-diagonal butterfly) compression to compress large frontal matrices. The resulting multifrontal solver can attain quasi-linear computation and memory complexity when applied to sparse linear systems arising from spatial discretization of high-frequency wave equations. To further reduce the overall number of operations and especially the factorization memory usage to scale to larger problem sizes, in this article we develop a composite multifrontal solver that employs the HODBF format for large-sized fronts, a reduced-memory version of the nonhierarchical block low-rank format for medium-sized fronts, and a lossy compression format for small-sized fronts. This allows us to solve sparse linear systems of dimension up to 2.7 × larger than before and leads to a memory consumption that is reduced by 70% while ensuring the same execution time. The code is made publicly available in GitHub.

97 MATHEMATICS AND COMPUTING↗

Low-temperature atomic layer deposition of TiO{sub 2} thin layers for the processing of memristive devices

Atomic layer deposition (ALD) represents one of the most fundamental techniques capable of satisfying the strict technological requirements imposed by the rapidly evolving electronic components industry. The actual scaling trend is rapidly leading to the fabrication of nanoscaled devices able to overcome limits of the present microelectronic technology, of which the memristor is one of the principal candidates. Since their development in 2008, TiO{sub 2} thin film memristors have been identified as the future technology for resistive random access memories because of their numerous advantages in producing dense, low power-consuming, three-dimensional memory stacks. The typical features of ALD, such as self-limiting and conformal deposition without line-of-sight requirements, are strong assets for fabricating these nanosized devices. This work focuses on the realization of memristors based on low-temperature ALD TiO{sub 2} thin films. In this process, the oxide layer was directly grown on a polymeric photoresist, thus simplifying the fabrication procedure with a direct liftoff patterning instead of a complex dry etching process. The TiO{sub 2} thin films deposited in a temperature range of 120–230 °C were characterized via Raman spectroscopy and x-ray photoelectron spectroscopy, and electrical current–voltage measurements taken in voltage sweep mode were employed to confirm the existence of resistive switching behaviors typical of memristors. These measurements showed that these low-temperature devices exhibit an ON/OFF ratio comparable to that of a high-temperature memristor, thus exhibiting similar performances with respect to memory applications.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

One order of magnitude faster phase change at reduced power in Ti-Sb-Te

To date, slow Set operation speed and high Reset operation power remain to be important limitations for substituting dynamic random access memory by phase change memory. Here, we demonstrate phase change memory cell based on Ti0.4Sb2Te3 alloy, showing one order of magnitude faster Set operation speed and as low as one-fifth Reset operation power, compared with Ge2Sb2Te5-based phase change memory cell at the same size. The enhancements may be rooted in the common presence of titanium-centred octahedral motifs in both amorphous and crystalline Ti0.4Sb2Te3 phases. The essentially unchanged local structures around the titanium atoms may be responsible for the significantly improved performance, as these structures could act as nucleation centres to facilitate a swift, low-energy order-disorder transition for the rest of the Sb-centred octahedrons. Our study may provide an alternative to the development of high-speed, low-power dynamic random access memory-like phase change memory technology.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

An Accurate, Error-Tolerant, and Energy-Efficient Neural Network Inference Engine Based on SONOS Analog Memory

In this work, we demonstrate SONOS (silicon-oxide-nitrideoxide- silicon) analog memory arrays that are optimized for neural network inference. The devices are fabricated in a 40nm process and operated in the subthreshold regime for in-memory matrix multiplication. Subthreshold operation enables low conductances to be implemented with low error, which matches the typical weight distribution of neural networks, which is heavily skewed toward near-zero values. This leads to high accuracy in the presence of programming errors and process variations. We simulate the end-to-end neural network inference accuracy, accounting for the measured programming error, read noise, and retention loss in a fabricated SONOS array. Evaluated on the ImageNet dataset using ResNet50, the accuracy using a SONOS system is within 2.16% of floating-point accuracy without any retraining. The unique error properties and high On/Off ratio of the SONOS device allow scaling to large arrays without bit slicing, and enable an inference architecture that achieves 20 TOPS/W on ResNet50, a >10× gain in energy efficiency over state-of-the-art digital and analog inference accelerators.

97 MATHEMATICS AND COMPUTING↗

Zinc-oxide charge trapping memory cell with ultra-thin chromium-oxide trapping layer

A functional zinc-oxide based SONOS memory cell with ultra-thin chromium oxide trapping layer was fabricated. A 5 nm CrO{sub 2} layer is deposited between Atomic Layer Deposition (ALD) steps. A threshold voltage (V{sub t}) shift of 2.6V was achieved with a 10V programming voltage. Also for a 2V V{sub t} shift, the memory with CrO{sub 2} layer has a low programming voltage of 7.2V. Moreover, the deep trapping levels in CrO{sub 2} layer allows for additional scaling of the tunnel oxide due to an increase in the retention time. In addition, the structure was simulated using Physics Based TCAD. The results of the simulation fit very well with the experimental results providing an understanding of the charge trapping and tunneling physics.

36 MATERIALS SCIENCE↗

Abnormal grain growth of 68Cu–16Al–16Zn alloys for elastocaloric cooling via cyclical heat treatments

Abstract Cu-based superelastic shape memory alloys are promising for low-stress elastocaloric cooling. We have synthesized bulk alloys of 68Cu–16Al–16Zn under different conditions in order to promote its grain growth and enhance its elastocaloric properties. High-temperature x-ray diffraction of untreated 68Cu–16Al–16Zn alloy showed that the phase boundary between the α + β mixed phases and the high temperature phase ( β phase) was between 973 K and 1023 K. Based on this result, the 68Cu–16Al–16Zn alloy was heated and cooled in a furnace repeatedly between 773 K and 1173 K. The maximum grain size after heat treatment of the ingot rolled to 67% reached 11.1 mm. The latent heat of the martensitic transformation after grain growth was 6.3 J g −1 , which is higher than the previously reported value for the compound. The stress–strain curve of 68Cu–16Al–16Zn rolled to 67% rolling with cyclical heat treatments showed a maximum stress of 106 MPa at 4.5% strain, with adiabatic temperature change of 5.9 K in heating during stress loading and 5.6 K in cooling in stress removal. Furthermore, no fatigue in the stress–strain behavior was observed up to at least 60 000 mechanical cycles at 2% strain.

36 MATERIALS SCIENCE↗

Berry curvature memory through electrically driven stacking transitions

In two-dimensional layered quantum materials, the interlayer stacking order determines both crystalline symmetry and quantum electronic properties such as Berry curvature, topology and electron correlation. Electrical stimuli can strongly influence quasi-particle interactions and the free energy landscape, thus making it possible to access hidden stacking orders with novel quantum properties and enabling dynamic engineering of these attributes. In this paper, we demonstrate electrically driven stacking transitions and a new type of nonvolatile memory based on Berry curvature in few-layer WTe 2 . The interplay of out-of-plane electric fields and electrostatic doping controls in-plane interlayer sliding and creates multiple polar and centrosymmetric stacking orders. In-situ nonlinear Hall transport reveals such stacking rearrangements result in a layer-parity-selective Berry curvature memory in momentum space, where the sign reversal of the Berry curvature only occurs in odd layer crystals. Our findings open an avenue towards exploring coupling between topology, electron correlations, and ferroelectricity in hidden stacking orders and demonstrate a new low energy cost, electrically-controlled topological memory in the atomically thin limit.

36 MATERIALS SCIENCE↗

A gradient-based deep neural network model for simulating multiphase flow in porous media

We report simulation of multiphase flow in porous media is crucial for the effective management of subsurface energy and environment-related activities. The numerical simulators used for modeling such processes rely on spatial and temporal discretization of the governing mass and energy balance partial-differential equations (PDEs) into algebraic systems via finite-difference/volume/element methods. These simulators usually require dedicated software development and maintenance, and suffer low efficiency from a runtime and memory standpoint for problems with multi-scale heterogeneity, coupled-physics processes or fluids with complex phase behavior. Therefore, developing cost-effective, data-driven models can become a practical choice, and in this work, we choose deep learning approaches as they can handle high dimensional data and accurately predict state variables with strong nonlinearity. In this paper, we describe a gradient-based deep neural network (GDNN) constrained by the physics related to multiphase flow in porous media. We tackle the nonlinearity of flow in porous media induced by rock heterogeneity, fluid properties, and fluid-rock interactions by decomposing the nonlinear PDEs into a dictionary of elementary differential operators. We use a combination of operators to handle rock spatial heterogeneity and fluid flow by advection. Since the augmented differential operators are inherently related to the physics of fluid flow, we treat them as first principles prior knowledge to regularize the GDNN training. We use the example of pressure management at geologic CO 2 storage sites, where CO 2 is injected in saline aquifers and brine is produced, and apply GDNN to construct a predictive model that is trained with physics-based simulation data and emulates the physics process. We demonstrate that GDNN can effectively predict the nonlinear patterns of subsurface responses, including the temporal and spatial evolution of the pressure and saturation plumes. We also successfully extend the GDNN to convolutional neural network (CNN), namely gradient-based CNN (GCNN), and validate its capability to improve the prediction accuracy. GDNN has great potential to tackle challenging problems that are governed by highly nonlinear physics and enable the development of data-driven models with higher fidelity.

42 ENGINEERING↗

Feedforward-feedback ammonia control at a water resource recovery facility based on a digital twin with hybrid model

Ammonia-based aeration control (ABAC) at full-scale Water Resource Recovery Facilities (WRRFs) can be challenged by diurnal loading and transport delays. This work addressed these challenges using a hybrid feedforward–feedback controller built on Activated Sludge Model 1 (ASM1), marking the first full-scale deployment to pair a mechanistic feedforward core with data-driven corrections. The objectives were to improve ammonia setpoint tracking, assess performance of the mechanistic model when enhanced with data-driven corrections, and document full-scale operation. The hybrid model incorporates two data-driven components: (1) a Mechanistic Error Forecasting Engine (MEFE), consisting of a multivariate linear regressor and a long short-term memory (LSTM) ensemble. Defying expectations, low-parameter models outperformed more complex alternatives, reducing the mechanistic error by 71%. (2) A Residual Oscillation Forecasting Engine (ROFE), based on Fast Fourier Transform, reduced the remaining error by another 35%. Two proportional–integral (PI) feedback loops further (i) trim the feedforward output and (ii) eliminate residual controller error in the final aerobic zone. In full-scale operation, the controller reduced mean-squared error (MSE) by 94% over the baseline and produced more stable dissolved oxygen (DO) setpoints. Overall, it was proven that layering multi-timescale data-driven models on a mechanistic core can yield reliable ABAC performance at WRRFs.

54 ENVIRONMENTAL SCIENCES↗