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At least 271 records · Page 15

The SGI/CRAY T3E: Experiences and Insights

The focus of the HPCC Earth and Space Sciences (ESS) Project is capability computing - pushing highly scalable computing testbeds to their performance limits. The drivers of this focus are the Grand Challenge problems in Earth and space science: those that could not be addressed in a capacity computing environment where large jobs must continually compete for resources. These Grand Challenge codes require a high degree of communication, large memory, and very large I/O (throughout the duration of the processing, not just in loading initial conditions and saving final results). This set of parameters led to the selection of an SGI/Cray T3E as the current ESS Computing Testbed. The T3E at the Goddard Space Flight Center is a unique computational resource within NASA. As such, it must be managed to effectively support the diverse research efforts across the NASA research community yet still enable the ESS Grand Challenge Investigator teams to achieve their performance milestones, for which the system was intended. To date, all Grand Challenge Investigator teams have achieved the 10 GFLOPS milestone, eight of nine have achieved the 50 GFLOPS milestone, and three have achieved the 100 GFLOPS milestone. In addition, many technical papers have been published highlighting results achieved on the NASA T3E, including some at this Workshop. The successes enabled by the NASA T3E computing environment are best illustrated by the 512 PE upgrade funded by the NASA Earth Science Enterprise earlier this year. Never before has an HPCC computing testbed been so well received by the general NASA science community that it was deemed critical to the success of a core NASA science effort. NASA looks forward to many more success stories before the conclusion of the NASA-SGI/Cray cooperative agreement in June 1999.

Bernard, Lisa Hamet↗

Synchronous clock stopper for microprocessor

A synchronous clock stopper circuit for inhibiting clock pulses to a microprocessor in response to a stop request signal, and for reinstating the clock pulses in response to a start request signal thereby to conserve power consumption of the microprocessor when used in an environment of limited power. The stopping and starting of the microprocessor is synchronized, by a phase tracker, with the occurrences of a predetermined phase in the instruction cycle of the microprocessor in which the I/O data and address lines of the microprocessor are of high impedance so that a shared memory connected to the I/O lines may be accessed by other peripheral devices. The starting and stopping occur when the microprocessor initiates and completes, respectively, an instruction, as well as before and after transferring data with a memory. Also, the phase tracker transmits phase information signals over a bus to other peripheral devices which signals identify the current operational phase of the microprocessor.

Kitchin, David A.↗

Comprehensive Astronaut Immune Assessment Following a Short-Duration Space Flight

Immune system dysregulation has been demonstrated to occur during spaceflight and has the potential to cause serious health risks to crewmembers participating in exploration class missions. As a part of an ongoing NASA flight experiment assessing viral immunity (DSO-500), a generalized immune assessment was performed on 3 crewmembers who participated in the recent STS-114 Space Shuttle mission. The following assays were performed: (1) comprehensive immunophenotype analysis; (2) T cell function/intracellular cytokine profiles; (4) secreted Th1/Th2 cytokine profiles via cytometric bead array. Immunophenotype analysis included a leukocyte differential, lymphocyte subsets, T cell subsets, cytotoxic/effector CD8+ T cells, memory/naive T cell subsets and constitutively activated T cells. Study timepoints were L-180, L-65, L-10, R+0, R+3 and R+14. Detailed data are presented in the poster text. As expected from a limited number of human subjects, data tended to vary with respect to most parameters. Specific post-flight alterations were as follows (subject number in parentheses): Granulocytosis (2/3), reduced NK cells (3/3), elevated CD4/CD8 ratio (3/3), general CD8+ phenotype shift to a less differentiated phenotype (3/3), elevated levels of memory CD4+ T cells (3/3), loss of L-selectin on T cell subsets (3/3), increased levels of activated T cells (2/3), reduced IL-2 producing T cell subsets (3/3), levels of IFNg producing T cells were unchanged. CD8+ T cell expression of the CD69 activation markers following whole blood stimulation with SEA+SEB were dramatically reduced postflight (3/3), whereas other T cell function assessments were largely unchanged. Cytometric bead array assessment of secreted T cell cytokines was performed, following whole blood stimulation with either CD3/CD28 antibodies or PMA+ionomycin for 48 hours. Specific cytokines assessed were IFNg, TNFa, IL-2, IL-4, IL-5, IL-10. Following CD3/CD28 stimulation, all three crewmembers had a mission-associated reduction in the levels of secreted IFNg. One crewmember had a post-flight inversion in the IFNg/IL-10 ratio postflight, which trended back to baseline by R+14. Detailed cytokine data are presented in the poster text. This testing regimen was designed to correlate immunophenotype changes (thought to correspond to specific in-vivo immune responses or pathogenesis), against altered leukocyte function and cytokine profiles. In-flight studies are required to determine if post-flight alterations are reflective of the in-flight condition, or are a response to landing and readaptation.

Crucian, Brian↗

Large-memory real-time multichannel multiplexed pattern recognition

The principle and experimental design of a real-time multichannel multiplexed optical pattern recognition system via use of a 25-focus dichromated gelatin holographic lens (hololens) are described. Each of the 25 foci of the hololens may have a storage and matched filtering capability approaching that of a single-lens correlator. If the space-bandwidth product of an input image is limited, as is true in most practical cases, the 25-focus hololens system has 25 times the capability of a single lens. Experimental results have shown that the interfilter noise is not serious. The system has already demonstrated the storage and recognition of over 70 matched filters - which is a larger capacity than any optical pattern recognition system reported to date.

Gregory, D. A.↗

A video display interface for the LORAN-C navigation receiver development system

A microprocessor-based development system was designed and fabricated for prototype test of navigation receiver designs. During use of this system in the development of low-cost LORAN-C receiver/processor concepts, the limitations of the integral KIM-1 display were severely felt. It was to augment this numerical display that the video character display was produced. The circuit design presented meets the need for a flexible-format display capable of driving a small standard video monitor with only minimal demands upon microprocessor memory and MPU cycles.

Fischer, J. P.↗

Energy Usage in an Embedded Space Vision Application on a Tiled Architecture

The need for greater autonomy in platforms such as planetary rovers is driving rapidly to codes that far overwhelm the capabilities of conventional space-qualified single core processors to run them in real-time. However, a new generation of potentially space-qualified 2D "tiled" multi-core microprocessor chips is emerging with significant performance potential. Leveraging such inherently parallel hardware for space platforms requires consideration of both time and power limitations - the latter of which is not normally done in conventional parallel computing. This paper takes one such application, Rockster, and analyzes it for energy usage when ported to a multi-core tiled chip such as may come from the Maestro program. The results demonstrate not only the criticality of memory and interconnect in the energy of real-time parallel codes, but also the effects of possible "energy-aware" changes in partitioning and algorithm design.

multi-core processors↗

Message Passing vs. Shared Address Space on a Cluster of SMPs

The convergence of scalable computer architectures using clusters of PCs (or PC-SMPs) with commodity networking has become an attractive platform for high end scientific computing. Currently, message-passing and shared address space (SAS) are the two leading programming paradigms for these systems. Message-passing has been standardized with MPI, and is the most common and mature programming approach. However message-passing code development can be extremely difficult, especially for irregular structured computations. SAS offers substantial ease of programming, but may suffer from performance limitations due to poor spatial locality, and high protocol overhead. In this paper, we compare the performance of and programming effort, required for six applications under both programming models on a 32 CPU PC-SMP cluster. Our application suite consists of codes that typically do not exhibit high efficiency under shared memory programming. due to their high communication to computation ratios and complex communication patterns. Results indicate that SAS can achieve about half the parallel efficiency of MPI for most of our applications: however, on certain classes of problems SAS performance is competitive with MPI. We also present new algorithms for improving the PC cluster performance of MPI collective operations.

Shan, Hongzhang↗

Comparison between sparsely distributed memory and Hopfield-type neural network models

The Sparsely Distributed Memory (SDM) model (Kanerva, 1984) is compared to Hopfield-type neural-network models. A mathematical framework for comparing the two is developed, and the capacity of each model is investigated. The capacity of the SDM can be increased independently of the dimension of the stored vectors, whereas the Hopfield capacity is limited to a fraction of this dimension. However, the total number of stored bits per matrix element is the same in the two models, as well as for extended models with higher order interactions. The models are also compared in their ability to store sequences of patterns. The SDM is extended to include time delays so that contextual information can be used to cover sequences. Finally, it is shown how a generalization of the SDM allows storage of correlated input pattern vectors.

Keeler, James D.↗

Communication overhead on the Intel Paragon, IBM SP2 and Meiko CS-2

Interprocessor communication overhead is a crucial measure of the power of parallel computing systems-its impact can severely limit the performance of parallel programs. This report presents measurements of communication overhead on three contemporary commercial multicomputer systems: the Intel Paragon, the IBM SP2 and the Meiko CS-2. In each case the time to communicate between processors is presented as a function of message length. The time for global synchronization and memory access is discussed. The performance of these machines in emulating hypercubes and executing random pairwise exchanges is also investigated. It is shown that the interprocessor communication time depends heavily on the specific communication pattern required. These observations contradict the commonly held belief that communication overhead on contemporary machines is independent of the placement of tasks on processors. The information presented in this report permits the evaluation of the efficiency of parallel algorithm implementations against standard baselines.

Bokhari, Shahid H.↗

Inspection and Verification of Domain Models with PlanWorks and Aver

When developing a domain model, it seems natural to bring the traditional informal tools of inspection and verification, debuggers and automated test suites, to bear upon the problems that will inevitably arise. Debuggers that allow inspection of registers and memory and stepwise execution have been a staple of software development of all sorts from the very beginning. Automated testing has repeatedly proven its considerable worth, to the extent that an entire design philosophy (Test Driven Development) has been developed around the writing of tests. Unfortunately, while not entirely without their uses, the limitations of these tools and the nature of the complexity of models and the underlying planning systems make the diagnosis of certain classes of problems and the verification of their solutions difficult or impossible. Debuggers provide a good local view of executing code, allowing a fine-grained look at algorithms and data. This view is, however, usually only at the level of the current scope in the implementation language, and the data-inspection capabilities of most debuggers usually consist of on-line print statements. More modem graphical debuggers offer a sort of tree view of data structures, but even this is too low-level and is often inappropriate for the kinds of structures created by planning systems. For instance, god or constraint networks are at best awkward when visualized as trees. Any any non-structural link between data structures, as through a lookup table, isn't captured at all. Further, while debuggers have powerful breakpointing facilities that are suitable for finding specific algorithmic errors, they have little use in the diagnosis of modeling errors.

Bedrax-Weiss, Tania↗

Radiation Testing, Characterization and Qualification Challenges for Modern Microelectronics and Photonics Devices and Technologies

At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.

LaBel, Kenneth A.↗

Development of Shape Memory Alloys- Challenges and Solutions

Shape memory alloys (SMAs) are a unique class of multifunctional materials that have the ability to recover large deformations or generate high stresses in response to thermal, mechanical andor electromagnetic stimuli. These abilities have made them a viable option for actuation systems in aerospace, medical, and automotive applications, amongst others. However, despite many advantages and the fact that SMA actuators have been developed and used for many years, so far they have only found service in a limited range of applications. In order to expand their applications, further developments are needed to increase their reliability and stability and to address processing, testing and qualification needed for large-scale commercial application of SMA actuators. In this seminar, historical inhibitors of SMA applications and current research efforts by NASA Glenn Research Center and collaborators will be discussed. Relationships between fundamental physicalscientific understanding, and the direct transition to engineering and design of mechanisms using these novel materials will be highlighted. Examples will be presented related to targeted alloy development, microstructural control, and bulk-scale testing as a function of stresses, temperatures and harsh environments. The seminar will conclude with a summary of SMA applications under development and current advances.

Shape Memory Alloy↗

Turbulence modeling of free shear layers for high performance aircraft

In many flowfield computations, accuracy of the turbulence model employed is frequently a limiting factor in the overall accuracy of the computation. This is particularly true for complex flowfields such as those around full aircraft configurations. Free shear layers such as wakes, impinging jets (in V/STOL applications), and mixing layers over cavities are often part of these flowfields. Although flowfields have been computed for full aircraft, the memory and CPU requirements for these computations are often excessive. Additional computer power is required for multidisciplinary computations such as coupled fluid dynamics and conduction heat transfer analysis. Massively parallel computers show promise in alleviating this situation, and the purpose of this effort was to adapt and optimize CFD codes to these new machines. The objective of this research effort was to compute the flowfield and heat transfer for a two-dimensional jet impinging normally on a cool plate. The results of this research effort were summarized in an AIAA paper titled 'Parallel Implementation of the k-epsilon Turbulence Model'. Appendix A contains the full paper.

Sondak, Douglas↗

Heterogeneous concurrent computing with exportable services

Heterogeneous concurrent computing, based on the traditional process-oriented model, is approaching its functionality and performance limits. An alternative paradigm, based on the concept of services, supporting data driven computation, and built on a lightweight process infrastructure, is proposed to enhance the functional capabilities and the operational efficiency of heterogeneous network-based concurrent computing. TPVM is an experimental prototype system supporting exportable services, thread-based computation, and remote memory operations that is built as an extension of and an enhancement to the PVM concurrent computing system. TPVM offers a significantly different computing paradigm for network-based computing, while maintaining a close resemblance to the conventional PVM model in the interest of compatibility and ease of transition Preliminary experiences have demonstrated that the TPVM framework presents a natural yet powerful concurrent programming interface, while being capable of delivering performance improvements of upto thirty percent.

Sunderam, Vaidy↗

Testing New Programming Paradigms with NAS Parallel Benchmarks

Over the past decade, high performance computing has evolved rapidly, not only in hardware architectures but also with increasing complexity of real applications. Technologies have been developing to aim at scaling up to thousands of processors on both distributed and shared memory systems. Development of parallel programs on these computers is always a challenging task. Today, writing parallel programs with message passing (e.g. MPI) is the most popular way of achieving scalability and high performance. However, writing message passing programs is difficult and error prone. Recent years new effort has been made in defining new parallel programming paradigms. The best examples are: HPF (based on data parallelism) and OpenMP (based on shared memory parallelism). Both provide simple and clear extensions to sequential programs, thus greatly simplify the tedious tasks encountered in writing message passing programs. HPF is independent of memory hierarchy, however, due to the immaturity of compiler technology its performance is still questionable. Although use of parallel compiler directives is not new, OpenMP offers a portable solution in the shared-memory domain. Another important development involves the tremendous progress in the internet and its associated technology. Although still in its infancy, Java promisses portability in a heterogeneous environment and offers possibility to "compile once and run anywhere." In light of testing these new technologies, we implemented new parallel versions of the NAS Parallel Benchmarks (NPBs) with HPF and OpenMP directives, and extended the work with Java and Java-threads. The purpose of this study is to examine the effectiveness of alternative programming paradigms. NPBs consist of five kernels and three simulated applications that mimic the computation and data movement of large scale computational fluid dynamics (CFD) applications. We started with the serial version included in NPB2.3. Optimization of memory and cache usage was applied to several benchmarks, noticeably BT and SP, resulting in better sequential performance. In order to overcome the lack of an HPF performance model and guide the development of the HPF codes, we employed an empirical performance model for several primitives found in the benchmarks. We encountered a few limitations of HPF, such as lack of supporting the "REDISTRIBUTION" directive and no easy way to handle irregular computation. The parallelization with OpenMP directives was done at the outer-most loop level to achieve the largest granularity. The performance of six HPF and OpenMP benchmarks is compared with their MPI counterparts for the Class-A problem size in the figure in next page. These results were obtained on an SGI Origin2000 (195MHz) with MIPSpro-f77 compiler 7.2.1 for OpenMP and MPI codes and PGI pghpf-2.4.3 compiler with MPI interface for HPF programs.

Jin, H.↗

Effects of Ordering Strategies and Programming Paradigms on Sparse Matrix Computations

The Conjugate Gradient (CG) algorithm is perhaps the best-known iterative technique to solve sparse linear systems that are symmetric and positive definite. For systems that are ill-conditioned, it is often necessary to use a preconditioning technique. In this paper, we investigate the effects of various ordering and partitioning strategies on the performance of parallel CG and ILU(O) preconditioned CG (PCG) using different programming paradigms and architectures. Results show that for this class of applications: ordering significantly improves overall performance on both distributed and distributed shared-memory systems, that cache reuse may be more important than reducing communication, that it is possible to achieve message-passing performance using shared-memory constructs through careful data ordering and distribution, and that a hybrid MPI+OpenMP paradigm increases programming complexity with little performance gains. A implementation of CG on the Cray MTA does not require special ordering or partitioning to obtain high efficiency and scalability, giving it a distinct advantage for adaptive applications; however, it shows limited scalability for PCG due to a lack of thread level parallelism.

Oliker, Leonid↗

Thermal Radiator Pointing for International Space Station

In order to provide thermal radiation environments that result in adequate beat rejection, the single-phase, liquid ammonia (NH3) heat rejection system on the International Space Station (ISS) requires that its two thermal radiator wings be dynamically rotated as the ISS travels through its orbit. This paper discusses the closed-loop, thermal radiator pointing system that is used on ISS to ensure adequate heat rejection by the radiators, while preventing freezing of the ammonia under low heat loads and cold-environmental conditions. Although initial designs used an open-loop approach for radiator pointing, concerns about performance robustness, algorithm complexity, memory requirements, and sustaining support drove the development of a more robust, simpler, closed-loop system. Hence, the challenge of the closed-loop system was to utilize existing sensors, actuators and computers to fit into the existing hardware and software architecture of the ISS. Using a proportional-integral (PI) control architecture with limited output and an anti-windup integrator, the temperature of the ammonia coming out of the radiator is measured and controlled by adjusting the radiator wing orientation. The radiator wing orientation for the local minimum environment is fed forward to the control system, and the closed-loop controller is used to generate a bias off of that local minimum environment in order to heat up the ammonia when necessary to avoid freezing. In the earth's shadow, the controller is suspended and the radiator wing is oriented to face the earth, the local maximum thermal environment which further prevents freezing of the ammonia. This control architecture is shown to provide adequate heat rejection and avoid freezing of the ammonia, even though the physical system consists of large transport delays and time-varying dynamics which change dramatically due to orbit motion and variable heat loads.

Green, Scott↗

Data Production on Past and Future NASA Missions

Data return is a metric that is commonly publicized for all space science missions. In the early days of the Space Program, this figure was small, and could be described in bits or maybe even megabits. But now, missions are capable of returning data volumes two or three orders of magnitude larger. For example, Voyager 1 and 2 combined produced a little over 5 Terabits of data in 39 years of operation. In contrast, the Cassini mission, launched two decades after Voyager, produced about one and a half times those data volumes in half the time. NISAR, an Earth Science Mission currently in implementation, plans to produce over 28 Petabits of raw data in just 3 years. This means that NISAR will produce about as many data in 30 days as the combined data production of nearly all planetary missions to date. These increases in capability are a result of technology enhancements in two main areas: telecommunications architecture (both space and ground segments) and data storage technology. This paper describes the progression of these two technologies over the course of more than three decades of space missions and provides additional insight into the design of the end-to-end NISAR Data System Architecture. Trends in the data are briefly explored and compared to Moore’s Law which provides only a qualitative model for memory growth but not for data production. In summary, early missions are found to be driven by unrefined processes while later missions, having utilized earlier lessons learned, focus more on improvements to flight and ground capabilities. Data return seems to fall into three categories. First, deep space missions are driven by the large distances that limit data return to the Earth. Next, the orbiter infrastructure around Mars helps these missions generate more data than other deep space spacecraft. Finally, near-Earth missions have the greatest capabilities for the studied metrics due to their close proximity to Earth and the ground network availability.

Xaypraseuth, Peter↗