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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 271 records · Page 15
All sourcesNASA NTRSDOE OSTI
DOE OSTI2020

Toward lower-diameter large-scale HPC and data center networks with co-packaged optics

We investigate the advantages of using co-packaged optics for building low-diameter, large-scale high-performance computing (HPC) and data center networks. The increased escape bandwidth offered by co-packaged optics can enable high-radix switch implementations of more than 150 switch ports, which can be combined with data rates of up to 400 Gb/s per port. From the network architecture perspective, the key benefits of using co-packaged optics in future fat-tree networks include (a) the ability to implement large-scale topologies of > <#comment/> 11 , 000 end points by eliminating the need for a third switching layer and (b) the ability to provide up to 4 × <#comment/> higher bisection bandwidth compared to existing solutions, reducing at the same time the number of required switch application-specific integrated circuits by > <#comment/> 80 % <#comment/> . From the network operation perspective, both reduced energy consumption and lower packet delays can be achieved since fewer hops are required; i.e., packets need to traverse fewer serializer/deserializer lanes and fewer switch buffers, which reduces the probability of contending with other packets and improves the tolerance of network congestion. The performance of the proposed architecture is evaluated via discrete-event simulations for a wide range of representative HPC synthetic-traffic cases that include both hotspot and non-hotspot scenarios. The simulation results suggest that co-packaged optics form a promising solution to keep up with bandwidth scaling in future networks, while the reduced number of switching layers can lead to significant mean packet delay improvements that start from 30% and reach up to 74% for high-load conditions.

Maniotis, Pavlos (ORCID:0000000244905253)↗
DOE OSTI2021

INTREPID program: technology and architecture for next-generation, energy-efficient, hyper-scale data centers [Invited]

The INTREPID program is developing power-efficient coherent optics for package-level integration with future switch integrated circuits as a path to realizing higher-radix switches for flatter networks. The link architecture is underpinned by coherent quadrature phase-shift keying (QPSK) polarization-multiplex transceivers at 200 Gb/s per λ <#comment/> , further enhanced with wavelength division multiplexing (WDM) to enable energy-efficient 800 or 1600 Gb/s inter-switch fiber connections. The technology is compatible with conventional three-level data center designs as well as a two-level data center design introduced here, which includes an added layer of passive, arrayed waveguide grating routers (AWGRs) or WDM circuit switches to further improve the cost, energy efficiency, and latency of the network.

Saleh, Adel A. M. (ORCID:0000000182451136)↗
DOE OSTI2020

High-Q suspended optical resonators in 3C silicon carbide obtained by thermal annealing

We fabricate suspended single-mode optical waveguides and ring resonators in 3C silicon carbide (SiC) that operate at telecommunication wavelength, and leverage post-fabrication thermal annealing to minimize optical propagation losses. Annealed optical resonators yield quality factors of over 41,000, which corresponds to a propagation loss of 7 dB/cm, and is a significant improvement over the 24 dB/cm in the case of the non-annealed chip. This improvement is attributed to the enhancement of SiC crystallinity and a significant reduction of waveguide surface roughness, from 2.4 nm to below 1.7 nm. The latter is attributed to surface layer oxide growth during the annealing step. We confirm that the thermo-optic coefficient, an important parameter governing high-power and temperature-dependent performance of SiC, does not vary with annealing and is comparable to that of bulk SiC. Our annealing-based approach, which is especially suitable for suspended structures, offers a straightforward way to realize high-performance 3C-SiC integrated circuits.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2020

Real-time dynamic wavelength tuning and intensity modulation of metal-clad nanolasers

To realize ubiquitously used photonic integrated circuits, on-chip nanoscale sources are essential components. Subwavelength nanolasers, especially those based on a metal-clad design, already possess many desirable attributes for an on-chip source such as low thresholds, room-temperature operation and ultra-small footprints accompanied by electromagnetic isolation at pitch sizes down to ∼50 nm. Another valuable characteristic for a source would be control over its emission wavelength and intensity in real-time. Most efforts on tuning/modulation thus far report static changes based on irreversible techniques not suited for high-speed operation. In this study, we demonstrate in-situ dynamical tuning of the emission wavelength of a metallo-dielectric nanolaser at room temperature by applying an external DC electric field. Using an AC electric field, we show that it is also possible to modulate the output intensity of the nanolaser at high speeds. The nanolaser’s emission wavelength in the telecom band can be altered by as much as 8.35 nm with a tuning sensitivity of ∼1.01 nm/V. Additionally, the output intensity can be attenuated by up to 89%, a contrast sufficient for digital data communication purposes. Finally, we achieve an intensity modulation speed up to 400 MHz, limited only by the photodetector bandwidth used in this study, which underlines the capability of high-speed operation via this method. This is the first demonstration of a telecom band nanolaser source with dynamic spectral tuning and intensity modulation based on an external E-field to the best of our knowledge.

Deka, Suruj S. (ORCID:0000000297812317)↗
DOE OSTI2020

Cryogenic C-band wavelength division multiplexing system using an AIM Photonics Foundry process design kit

Cryogenic environments make superconducting computing possible by reducing thermal noise, electrical resistance and heat dissipation. Heat generated by the electronics and thermal conductivity of electrical transmission lines to the outside world constitute two main sources of thermal load in such systems. As a result, higher data rates require additional transmission lines which come at an increasingly higher cooling power cost. Hybrid or monolithic integration of silicon photonics with the electronics can be the key to higher data rates and lower power costs in these systems. We present a 4-channel wavelength division multiplexing photonic integrated circuit (PIC) built from modulators in the AIM Photonics process development kit (PDK) that operate at 25 Gbps at room temperature and 10 Gbps at 40 K. We further demonstrate 2-channel operation for 20 Gbps aggregate data rate at 40 K using two different modulators/wavelengths, with the potential for higher aggregate bit rates by utilizing additional channels.

42 ENGINEERING↗
DOE OSTI2021

Characterization of suspended membrane waveguides towards a photonic atom trap integrated platform

We demonstrate an optical waveguide device, capable of supporting the high, in-vacuum, optical power necessary for trapping a single atom or a cold atom ensemble with evanescent fields. Our photonic integrated platform, with suspended membrane waveguides, successfully manages optical powers of 6 mW (500 μ m span) to nearly 30 mW (125 μ m span) over an un-tethered waveguide span. This platform is compatible with laser cooling and magneto-optical traps (MOTs) in the vicinity of the suspended waveguide, called the membrane MOT and the needle MOT, a key ingredient for efficient trap loading. We evaluate two novel designs that explore critical thermal management features that enable this large power handling. This work represents a significant step toward an integrated platform for coupling neutral atom quantum systems to photonic and electronic integrated circuits on silicon.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Broadband integrated polarization splitter and rotator using subwavelength grating claddings

We present a broadband integrated photonic polarization splitter and rotator (PSR) using adiabatically tapered coupled waveguides with subwavelength grating (SWG) claddings. The PSR adiabatically rotates and splits the fundamental transverse-magnetic (TM 0 ) input to the fundamental transverse-electric (TE 0 ) mode in the coupler waveguide, while passing the TE 0 input through the same waveguide. The SWGs work as an anisotropic metamaterial and facilitate modal conversions, making the PSR efficient and broadband. We rigorously present our design approaches in each section and show the SWG effect by comparing with and without the SWG claddings. The coupling coefficients in each segment explicitly show a stronger coupling effect when the SWGs are included, confirmed by the coupled-mode theory simulations. The full numerical simulation shows that the SWG-PSR operates at 1500–1750 nm (≈250 nm) wavelengths with an extinction ratio larger than 20 dB, confirmed by the experiment for the 1490–1590 nm range. The insertion losses are below 1.3 dB. Since our PSR is designed based on adiabatical mode evolution, the proposed PSR is expected to be tolerant to fabrication variations and should be broadly applicable to polarization management in photonic integrated circuits.

47 OTHER INSTRUMENTATION↗
DOE OSTI2024

Scalable free-space photonic antennas in foundry SOI silicon photonic platforms

We present a flexible, scalable, and low-noise design scheme for coupling free-space light into a silicon-on-insulator (SOI) electronic-photonic integrated circuit. The proposed scheme utilizes arrays of grating couplers with compact, inverse-designed power combining networks to couple a distributed optical collection area to a single output waveguide, forming a photonic antenna. Fabrication density compliance is maintained regardless of the antenna size, and the collection area can be scaled while maintaining a fixed noise floor. Using experimental grating array antennas fabricated in the GF45CLO platform, we demonstrate up to a 6.7× increase in the signal-to-noise ratio (SNR) of a lens-less monolithic free-space photonic receiver using a 4×4 grating array.

Rollinson, John (ORCID:0000000157130832)↗
DOE OSTI2025

Wafer-scale waveguide sidewall roughness scattering loss characterization by image processing

Photonic integrated circuits (PICs) are vital for developing affordable, high-performance optoelectronic devices that can be manufactured at an industrial scale, driving innovation and efficiency in various applications. Optical loss of modes in thin film waveguides and devices is a critical measure of their performance. Thin film growth, lithography, masking, and etching processes are imperfect processes that introduce significant sidewall and top-surface roughness and cause dominating optical losses in waveguides and photonic structures. This roughness, as perturbations couple light from guided to far-field radiation modes, leads to scattering losses that can be estimated from theoretical models. Typically, with UV-based lithography, sidewall roughness is significantly larger than wafer-top surface roughness. Atomic force microscopy (AFM) imaging measurement gives a 3D and high-resolution roughness profile, but the measurement is inconvenient, costly, and unscalable for large-scale PICs and at wafer-scale. Here, we evaluate the sidewall roughness profile based on 2D high-resolution scanning electron microscope (SEM) imaging. We characterized the loss on two homemade nitride and oxide films on 3-inch silicon wafers with 12 waveguide devices on each and correlated the scattering loss estimated from a 2D image-based sidewall profile and theoretical Payne model. The lowest loss of guided fundamental transverse electric (TE 0 ) mode is found at 0.075 dB/cm at 633 nm across 24 devices, a record at visible wavelength. Our work shows 100% success (edge continuity span exceeding 95% of image width/height) in edge detection in image processing of all images to estimate autocorrelation function and optical mode loss. These demonstrations offer valuable insights into waveguide sidewall roughness and a comparison of experimental and 2D SEM image processing based loss estimations with applications in loss characterization at wafer-scale PICs.

Khurana, Mohit (ORCID:0000000207898672)↗
DOE OSTI2020

Effect of p-doping on the intensity noise of epitaxial quantum dot lasers on silicon

This work experimentally investigates the impact of p-doping on the relative intensity noise (RIN) properties and subsequently on the modulation properties of semiconductor quantum dot (QD) lasers epitaxially grown on silicon. Owing to the low threading dislocation density and the p-modulation doped GaAs barrier layer in the active region, the RIN level is found very stable with temperature with a minimum value of − <#comment/> 150 d B / H z . The dynamical features extracted from the RIN spectra show that p-doping between zero and 20 holes/dot strongly modifies the modulation properties and gain nonlinearities through increased internal losses in the active region and thereby hinders the maximum achievable bandwidth. Overall, this Letter is important for designing future high-speed and low-noise QD devices integrated in future photonic integrated circuits.

Duan, Jianan (ORCID:0000000177104287)↗
DOE OSTI2023

Modular chip-integrated photonic control of artificial atoms in diamond waveguides

A central goal in creating long-distance quantum networks and distributed quantum computing is the development of interconnected and individually controlled qubit nodes. Atom-like emitters in diamond have emerged as a leading system for optically networked quantum memories, motivating the development of visible-spectrum, multi-channel photonic integrated circuit (PIC) systems for scalable atom control. However, it has remained an open challenge to realize optical programmability with a qubit layer that can achieve high optical detection probability over many optical channels. Here, we address this problem by introducing a modular architecture of piezoelectrically actuated atom-control PICs (APICs) and artificial atoms embedded in diamond nanostructures designed for high-efficiency free-space collection. The high-speed four-channel APIC is based on a splitting tree mesh with triple-phase shifter Mach–Zehnder interferometers. This design simultaneously achieves optically broadband operation at visible wavelengths, high-fidelity switching (>40dB) at low voltages, submicrosecond modulation timescales (>30MHz), and minimal channel-to-channel crosstalk for repeatable optical pulse carving. Via a reconfigurable free-space interconnect, we use the APIC to address single silicon vacancy color centers in individual diamond waveguides with inverse tapered couplers, achieving efficient single photon detection probabilities (∼15%) and second-order autocorrelation measurements g (2) (0)<0.14 for all channels. The modularity of this distributed APIC–quantum memory system simplifies the quantum control problem, potentially enabling further scaling to thousands of channels.

47 OTHER INSTRUMENTATION↗
DOE OSTI2024

CMOS photonic integrated source of broadband polarization-entangled photons

We showcase a fully on-chip CMOS-fabricated silicon photonic integrated circuit employing a bidirectionally pumped microring and polarization splitter-rotators tailored for the generation of broadband (>9 THz), high-fidelity (90–98%) polarization-entangled photons. Spanning the optical C+L-band and producing over 116 frequency-bin pairs on a 38.4-GHz-spaced grid, this source is ideal for flex-grid wavelength-multiplexed entanglement distribution in multiuser networks.

42 ENGINEERING↗
DOE OSTI2025

Integrated photonic Galton board and its application for photon counting

The Galton board is a desktop probability machine traditionally used to visualize the principles of statistical physics from classical particles. Here, we demonstrate a photonic Galton board that enables on-chip observation of statistics from single-photon interference. The photonic Galton board consists of a directional coupler matrix terminated by an array of superconducting nanowire detectors to provide spatiotemporal resolution. This design also allows for photon-number-resolving capability, making it suitable for high-speed photon counting. Our results demonstrate the compatibility between single-photon detector array and photonic integrated circuits, paving the way for implementing on-chip large-scale quantum optics experiments and photonic quantum computing.

Qin, Hezheng (ORCID:0009000139348800)↗
DOE OSTI2026

CMOS-fabricated ultraviolet light modulator using low-loss alumina piezo-optomechanical photonics

Ultra-violet (UV) and near-UV wavelengths are necessary for many important optical transitions for quantum technologies and various sensing mechanisms for biological and chemical detection. However, all well-known photonic platforms have excessively high losses in the UV, which has prevented photonic integrated circuits (PICs) being used to address these and other important application spaces. Photonic waveguides using low-loss alumina cores and silicon dioxide cladding have emerged as a promising solution because of alumina’s large optical bandgap and the high quality of films enabled by atomic layer deposition. These properties allow passive, low-loss waveguide operation down to at least 266 nm using multimode widths. However, to the best of our knowledge, active alumina PICs have only been realized using thermo-optic tuning, which precludes switching speeds shorter than approximately 100 microseconds, high circuit densities, and cryogenically compatible operation. Here, we introduce a CMOS-fabricated, piezo-optomechanical PIC platform using alumina waveguides and piezoelectric aluminum nitride strain actuators. The platform allows for sub-microsecond switching times, high circuit densities, and cryogenic operation which is desired in many UV PIC applications. We demonstrate a high-performance, reconfigurable optical filter operating at wavelengths as low as 320 nm. The filter has a 6-nanosecond switching time, a loaded linewidth of 3.3 GHz, tuning rate of 28 V/linewidth, and a hold power of less than 20 nW at one linewidth detuning. This work establishes the foundations for a new class of CMOS-fabricated, rapidly reconfigurable, and low-power UV photonic circuits compatible with wavelengths as low as 225 nm.

Castillo, Zachary A. [Sandia National Laboratories↗
DOE OSTI2021

Dynamic performance and reflection sensitivity of quantum dot distributed feedback lasers with large optical mismatch

This work reports on a high-efficiency InAs/GaAs distributed feedback quantum dot laser. The large optical wavelength detuning at room temperature between the lasing peak and the gain peak causes the static, dynamic, and nonlinear intrinsic properties to all improve with temperature, including the lasing efficiency, the modulation dynamics, the linewidth enhancement factor, and consequently the reflection insensitivity. Results reported show an optimum operating temperature at 75°C, highlighting the potential of the large optical mismatch assisted single-frequency laser for the development of uncooled and isolator-free high-speed photonic integrated circuits.

Dong, Bozhang (ORCID:0000000158266723)↗
DOE OSTI2024

Eliminating Signal Bias Caused by Vacuum System Backstreaming in the Diagnostic Residual Gas Analyzer of ITER

In fusion neutral gas analysis, such as with the Diagnostic Residual Gas Analyzer (DRGA) for ITER, the primary measurement range of interest comprises the low-amu species (1 to 6), especially deuterium and helium. The challenge in successfully obtaining accurate measurements is two-fold. First, the sensitivity of the method must be sufficient to resolve trace amounts accurately; typically, one percent or less. Second, the gas signal from the fusion processes must be free of bias caused by the latent presence (from system outgassing and/or vacuum backstreaming) of these gases to enable accurate interpretation of the measured signal. This latter criterion can be problematic for the lightest gases since there is a propensity for some fraction of the pumped gas load to undergo a phenomenon known as backstreaming. This behavior is manifested in pumping systems for gas properties related to relative atomic weight (lightest) and size (smallest). Backstreaming results in a significant amount of the pumped gas undertaking a reverse flow and re-entering the measurement region; thus, contaminating the forward, real-time measurement. To fully eliminate this adverse effect, a conductance-limiting device – or orifice – has been installed in the high-vacuum pumping system of the present ITER DRGA prototype. The system was already equipped with a secondary turbomolecular pump (TMP), but with limited effectiveness against backstreaming in the inter-pump volume (IPV). This orifice is placed within the suction inlet coupling of the secondary TMP, which is downstream of the IPV. Its objective is to eliminate the backstreaming phenomenon by increasing the back pressure in the IPV. However, the orifice sizing must take into consideration other factors, such as the diagnostic measurement objectives. For example, in the ITER DRGA, one of the measurement requirements is a dynamic response time of ~1s. Fortunately, an added benefit of the pumping restriction created by the orifice is that the upstream pressure increase is beneficial for the DRGA’s optical gas analysis (OGA) sensors. These sensors are attached to the IPV in the present design. The glow discharges, when used as an OGA light source, will typically have a brighter light emission with increasing plasma cell pressure. In addition to the fusion machine research sector, there are other potential applications of this pumping technique where the monitoring of lighter gas concentrations is essential, such as the photolithography process for the semiconductor fabrication of integrated circuits. This presentation will describe the vacuum system used to demonstrate a process to eliminate backstreaming as well as show test results to verify the accomplishment of this critical objective.

Marcus, Chris↗
DOE OSTI2020

Study of Fluctuations in Undulator Radiation in the IOTA Ring at Fermilab

We study turn-by-turn fluctuations in the number of emitted photons in an undulator, installed in the IOTA electron storage ring at Fermilab, with an InGaAs PIN photodiode and an integrating circuit. In this paper, we present a theoretical model for the experimental data from previous similar experiments and in our present experiment, we attempt to verify the model in an independent and a more systematic way. Moreover, in our experiment we consider the regime of very small fluctuation when the contribution from the photon shot noise is significant, whereas we believe it was negligible in the previous experiments. Accordingly, we present certain critical improvements in the experimental setup that let us measure such a small fluctuation.

43 PARTICLE ACCELERATORS↗
DOE OSTI2020

Xyce Case Study

With the elimination of underground nuclear testing and declining defense budgets, science-based stockpile stewardship requires increased reliance on high performance modeling and simulation of weapon systems. Today's weapon systems are comprised of various electrical components and systems. As a result, there is a need for tools that will allow the use of massively parallel modeling and simulation techniques on high performance computers in existing and future weapons' electrical systems models. The Xyce Parallel Electronic Simulator is a SPICE (Simulation Program with Integrated Circuit Emphasis)- compatible circuit simulator designed to run on large-scale parallel computing platforms, though it can also execute efficiently on a variety of architectures including single processor workstations. As a mature platform for large-scale parallel circuit simulation, Xyce supports standard capabilities available in commercial simulators, in addition to various devices and models specific to Sandia's needs. Specifically, Xyce aids in the design and verification of electrical and electronic circuits and systems prior to weapons' manufacturing and deployment.

45 MILITARY TECHNOLOGY, WEAPONRY, AND NATIONAL DEF↗