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At least 271 records · Page 15
All sourcesNASA NTRSDOE OSTI
NASA NTRS1987

Measuring moment-to-moment pilot workload using synchronous presentations of secondary tasks in a motion-base trainer

A simulation was conducted to determine whether the sensitivity of secondary task measures of pilot workload could be improved by synchronizing their presentation to the occurrence of specific events or pilot actions. This synchronous method of presentation was compared to the more typical asynchronous method, where secondary task presentations are independent of pilot's flight-related activities. Twelve pilots flew low- and high-difficulty scenarios in a motion-base trainer with and without concurrent secondary tasks (e.g., choice reaction time and time production). The difficulty of each scenario was manipulated by the addition of 21 flight-related tasks superimposed on a standard approach and landing sequence. The insertion of the secondary tasks did not affect primary flight performance. However, secondary task performance did reflect workload differences between scenarios and among flight segments within scenarios, replicating the results of an earlier study in which the secondary tasks were presented asynchronously (Bortolussi et al., 1986).

Bortolussi, Michael R.↗
NASA NTRS1988

Implementation of a tactical voice/data network over FDDI

An asynchronous high-speed fiber-optic local-area network is described that simultaneously supports packet data traffic with synchronous TI voice traffic over a standard asynchronous FDDI (fiber distributed data interface) token-ring channel. A voice interface module was developed that parses, buffers, and resynchronizes the voice data to the packet network. The technique is general, however, and can be applied to any deterministic class of networks, including multitier backbones. In addition, the higher layer packet data protocols may operate independently of those for the voice, thereby permitting great flexibility in reconfiguring the network. Voice call setup and switching functions are performed external to the network with PABX equipment.

Bergman, L. A.↗
NASA NTRS1989

Alternative majority-voting methods for real-time computing systems

Two techniques that provide a compromise between the high time overhead in maintaining synchronous voting and the difficulty of combining results in asynchronous voting are proposed. These techniques are specifically suited for real-time applications with a single-source/single-sink structure that need instantaneous error masking. They provide a compromise between a tightly synchronized system in which the synchronization overhead can be quite high, and an asynchronous system which lacks suitable algorithms for combining the output data. Both quorum-majority voting (QMV) and compare-majority voting (CMV) are most applicable to distributed real-time systems with single-source/single-sink tasks. All real-time systems eventually have to resolve their outputs into a single action at some stage. The development of the advanced information processing system (AIPS) and other similar systems serve to emphasize the importance of these techniques. Time bounds suggest that it is possible to reduce the overhead for quorum-majority voting to below that for synchronous voting. All the bounds assume that the computation phase is nonpreemptive and that there is no multitasking.

Shin, Kang G.↗
NASA NTRS1990

A burst compression and expansion technique for variable-rate users in satellite-switched TDMA networks

A burst compression and expansion technique is described for asynchronously interconnecting variable-data-rate users with cost-efficient ground terminals in a satellite-switched, time-division-multiple-access (SS/TDMA) network. Compression and expansion buffers in each ground terminal convert between lower rate, asynchronous, continuous-user data streams and higher-rate TDMA bursts synchronized with the satellite-switched timing. The technique described uses a first-in, first-out (FIFO) memory approach which enables the use of inexpensive clock sources by both the users and the ground terminals and obviates the need for elaborate user clock synchronization processes. A continous range of data rates from kilobits per second to that approaching the modulator burst rate (hundreds of megabits per second) can be accommodated. The technique was developed for use in the NASA Lewis Research Center System Integration, Test, and Evaluation (SITE) facility. Some key features of the technique have also been implemented in the gound terminals developed at NASA Lewis for use in on-orbit evaluation of the Advanced Communications Technology Satellite (ACTS) high burst rate (HBR) system.

Budinger, James M.↗
NASA NTRS1990

A burst compression and expansion technique for variable-rate users in satellite-switched TDMA networks

A burst compression and expansion technique is described for asynchronously interconnecting variable-data-rate users with cost-efficient ground terminals in a satellite-switched, time-division-multiple-access (SS/TDMA) network. Compression and expansion buffers in each ground terminal convert between lower rate, asynchronous, continuous-user data streams and higher-rate TDMA bursts synchronized with the satellite-switched timing. The technique described uses a first-in, first-out (FIFO) memory approach which enables the use of inexpensive clock sources by both the users and the ground terminals and obviates the need for elaborate user clock synchronization processes. A continuous range of data rates from kilobits per second to that approaching the modulator burst rate (hundreds of megabits per second) can be accommodated. The technique was developed for use in the NASA Lewis Research Center System Integration, Test, and Evaluation (SITE) facility. Some key features of the technique have also been implemented in the ground terminals developed at NASA Lewis for use in on-orbit evaluation of the Advanced Communications Technology Satellite (ACTS) high burst rate (HBR) system.

Budinger, James M.↗
NASA NTRS1992

A simple, effective media access protocol system for integrated, high data rate networks

The operation and performance of a dual media access protocol for integrated, gigabit networks are described. Unlike other dual protocols, each protocol supports a different class of traffic. The Carrier Sensed Multiple Access-Ring Network (CSMA/RN) protocol and the Circulating Reservation Packet (CRP) protocol support asynchronous and synchronous traffic, respectively. The two protocols operate with minimal impact upon each other. Performance information demonstrates that they support a complete range of integrated traffic loads, do not require call setup/termination or a special node for synchronous traffic control, and provide effective pre-use and recovery. The CRP also provides guaranteed access and fairness control for the asynchronous system. The paper demonstrates that the CSMA-CRP system fulfills many of the requirements for gigabit LAN-MAN networks most effectively and simply. To accomplish this, CSMA-CRP features are compared against similar ring and bus systems, such as Cambridge Fast Ring, Metaring, Cyclic Reservation Multiple Access, and Distributed Dual Queue Data Bus (DQDB).

Foudriat, E. C.↗
NASA NTRS1993

Intelligent neuroprocessors for in-situ launch vehicle propulsion systems health management

Efficacy of existing on-board propulsion systems health management systems (HMS) are severely impacted by computational limitations (e.g., low sampling rates); paradigmatic limitations (e.g., low-fidelity logic/parameter redlining only, false alarms due to noisy/corrupted sensor signatures, preprogrammed diagnostics only); and telemetry bandwidth limitations on space/ground interactions. Ultra-compact/light, adaptive neural networks with massively parallel, asynchronous, fast reconfigurable and fault-tolerant information processing properties have already demonstrated significant potential for inflight diagnostic analyses and resource allocation with reduced ground dependence. In particular, they can automatically exploit correlation effects across multiple sensor streams (plume analyzer, flow meters, vibration detectors, etc.) so as to detect anomaly signatures that cannot be determined from the exploitation of single sensor. Furthermore, neural networks have already demonstrated the potential for impacting real-time fault recovery in vehicle subsystems by adaptively regulating combustion mixture/power subsystems and optimizing resource utilization under degraded conditions. A class of high-performance neuroprocessors, developed at JPL, that have demonstrated potential for next-generation HMS for a family of space transportation vehicles envisioned for the next few decades, including HLLV, NLS, and space shuttle is presented. Of fundamental interest are intelligent neuroprocessors for real-time plume analysis, optimizing combustion mixture-ratio, and feedback to hydraulic, pneumatic control systems. This class includes concurrently asynchronous reprogrammable, nonvolatile, analog neural processors with high speed, high bandwidth electronic/optical I/O interfaced, with special emphasis on NASA's unique requirements in terms of performance, reliability, ultra-high density ultra-compactness, ultra-light weight devices, radiation hardened devices, power stringency, and long life terms.

Gulati, S.↗
NASA NTRS1993

Virtually-synchronous communication based on a weak failure suspector

Failure detectors (or, more accurately Failure Suspectors (FS)) appear to be a fundamental service upon which to build fault-tolerant, distributed applications. This paper shows that a FS with very weak semantics (i.e., that delivers failure and recovery information in no specific order) suffices to implement virtually-synchronous communication (VSC) in an asynchronous system subject to process crash failures and network partitions. The VSC paradigm is particularly useful in asynchronous systems and greatly simplifies building fault-tolerant applications that mask failures by replicating processes. We suggest a three-component architecture to implement virtually-synchronous communication: (1) at the lowest level, the FS component; (2) on top of it, a component (2a) that defines new views; and (3) a component (2b) that reliably multicasts messages within a view. The issues covered in this paper also lead to a better understanding of the various membership service semantics proposed in recent literature.

Schiper, Andre↗
NASA NTRS1991

Control of discrete event systems modeled as hierarchical state machines

The authors examine a class of discrete event systems (DESs) modeled as asynchronous hierarchical state machines (AHSMs). For this class of DESs, they provide an efficient method for testing reachability, which is an essential step in many control synthesis procedures. This method utilizes the asynchronous nature and hierarchical structure of AHSMs, thereby illustrating the advantage of the AHSM representation as compared with its equivalent (flat) state machine representation. An application of the method is presented where an online minimally restrictive solution is proposed for the problem of maintaining a controlled AHSM within prescribed legal bounds.

Brave, Y.↗
NASA NTRS1993

Testing self-timed circuits using scan paths

Testing is an essential part of any digital system design and one that can be made much easier if testing is considered during the design process rather than after the system is complete. There are a number of techniques for integrating testability into system design, but many of these traditional testing methods used for synchronous circuits are not directly applicable to non-clocked asynchronous circuits. As a result, many asynchronous circuits do not employ design for testability techniques. A method of using the familiar model of scan paths modified to test self-timed systems are presented. Specifically, circuits designed using a library of self-timed modules to assemble systems with two-phase transition control and bundled data paths are considered. The method involves modifying these self-timed modules such that circuits designed from them have a built-in scan path.

Khoche, Ajay↗
NASA NTRS1994

Modulation and synchronization technique for MF-TDMA system

This report addresses modulation and synchronization techniques for a multi-frequency time division multiple access (MF-TDMA) system with onboard baseband processing. The types of synchronization techniques analyzed are asynchronous (conventional) TDMA, preambleless asynchronous TDMA, bit synchronous timing with a preamble, and preambleless bit synchronous timing. Among these alternatives, preambleless bit synchronous timing simplifies onboard multicarrier demultiplexer/demodulator designs (about 2:1 reduction in mass and power), requires smaller onboard buffers (10:1 to approximately 3:1 reduction in size), and provides better frame efficiency as well as lower onboard processing delay. Analysis and computer simulation illustrate that this technique can support a bit rate of up to 10 Mbit/s (or higher) with proper selection of design parameters. High bit rate transmission may require Doppler compensation and multiple phase error measurements. The recommended modulation technique for bit synchronous timing is coherent QPSK with differential encoding for the uplink and coherent QPSK for the downlink.

Faris, Faris↗
NASA NTRS1995

On the utility of threads for data parallel programming

Threads provide a useful programming model for asynchronous behavior because of their ability to encapsulate units of work that can then be scheduled for execution at runtime, based on the dynamic state of a system. Recently, the threaded model has been applied to the domain of data parallel scientific codes, and initial reports indicate that the threaded model can produce performance gains over non-threaded approaches, primarily through the use of overlapping useful computation with communication latency. However, overlapping computation with communication is possible without the benefit of threads if the communication system supports asynchronous primitives, and this comparison has not been made in previous papers. This paper provides a critical look at the utility of lightweight threads as applied to data parallel scientific programming.

Fahringer, Thomas↗
NASA NTRS1999

Interplanetary Microlaser Transponders

The feasibility of an asynchronous (i.e. independently firing) interplanetary laser transponder, capable of ranging between Earth and Mars and using the automated SLR2000 Satellite Laser Ranging (SLR) system as an Earth base station, has been suggested. Since that time, we have received a small amount of discretionary funding to further explore the transponder concept and to develop and test an engineering breadboard. Candidate operational scenarios for acquiring and tracking the opposite laser terminal over interplanetary distances have been developed, and breadboard engineering parameters were chosen to reflect the requirements of an Earth-Mars link Laboratory tests have been devised to simulate the Earth- Mars link between two independent SLR2000 transceivers and to demonstrate the transfer of range and time in single photon mode. The present paper reviews the concept of the asynchronous microlaser transponder, the transponder breadboard design, an operational scenario recently developed for an asteroid rendezvous, and the laboratory test setup. The optical head of the transponder breadboard fits within a cylinder roughly 15 cm in diameter and 32 cm in length and is mounted in a commercial two axis gimbal driven by two computer-controlled stepper motors which allows the receiver optical axis to be centered on a simulated Earth image. The optical head is built around a small optical bench which supports a 14.7 cm diameter refractive telescope, a prototype 2 kHz SLR2000 microlaser transmitter, a quadrant microchannel plate photomultiplier (MCP/PMT), a CCD array camera, spatial and spectral filters, assorted lenses and mirrors, and protective covers and sun shields. The microlaser is end-pumped by a fiber-coupled diode laser array. An annular mirror is employed as a passive transmit/receive (T/R) switch in an aperture-sharing arrangement wherein the transmitted beam passes through the central hole and illuminates only the central 2.5 cm of the common telescope (adequate to achieve a 10 arcsecond full laser beam divergence) while the receiver uses the remainder of the 14.7 cm aperture. Additional electronic instrumentation includes the diode pump array and associated heat sink and current drivers, rubidium frequency standard, timing distribution module, range gate generator, a recently developed all-digital correlation range receiver, and system computer. Acquisition of the opposite transponder terminal requires a search within a three-dimensional volume determined by the initial pointing uncertainty and a maximum 500 microsecond uncertainty in the laser time of fire at the opposite terminal for totally uncorrelated Earth and spacecraft clocks. The angular search is aided by a sensitive CCD array capable of imaging the Earth, Moon, and surrounding stars within the nominal + 0.5 degree cone of uncertainty associated with the initial pointing of a spacecraft body or microwave communications dish.

Degnan, John J.↗
NASA NTRS2001

Self-Timed Digital System Design

A timing and control strategy that can be used to realize synchronous systems with a level of performance that approaches that of asynchronous circuits or systems was developed in this work. This approach is based upon a single-phase synchronous circuit/system architecture with a variable period clock. The handshaking signals required for asynchronous self-timed circuits are not needed. Dynamic power supply current monitoring is used to generate the timing information, that is comparable to the completion signal found in self-timed circuits; this timing information is used to modify the circuit clock period.

Walker, Alvernon↗
NASA NTRS2001

An Approach for Self-Timed Synchronous CMOS Circuit Design

In this letter we present a timing and control strategy that can be used to realize synchronous systems with a level of performance that approaches that of asynchronous circuits or systems. This approach is based upon a single-phase synchronous circuit/system architecture with a variable period clock. The handshaking signals required for asynchronous self-timed circuits are not needed. Dynamic power supply current monitoring is used to generate the timing information, that is comparable to the completion signal found in self-timed circuits; this timing information is used to modi@ the circuit clock period. This letter is concluded with an example of the proposed approach applied to a static CMOS ripple-carry adder.

Walker, Alvernon↗
NASA NTRS2005

A Methodology for the Design and Verification of Globally Asynchronous/Locally Synchronous Architectures

Recent advanced in model-checking have made it practical to formally verify the correctness of many complex synchronous systems (i.e., systems driven by a single clock). However, many computer systems are implemented by asynchronously composing several synchronous components, where each component has its own clock and these clocks are not synchronized. Formal verification of such Globally Asynchronous/Locally Synchronous (GA/LS) architectures is a much more difficult task. In this report, we describe a methodology for developing and reasoning about such systems. This approach allows a developer to start from an ideal system specification and refine it along two axes. Along one axis, the system can be refined one component at a time towards an implementation. Along the other axis, the behavior of the system can be relaxed to produce a more cost effective but still acceptable solution. We illustrate this process by applying it to the synchronization logic of a Dual Fight Guidance System, evolving the system from an ideal case in which the components do not fail and communicate synchronously to one in which the components can fail and communicate asynchronously. For each step, we show how the system requirements have to change if the system is to be implemented and prove that each implementation meets the revised system requirements through modelchecking.

Miller, Steven P.↗
NASA NTRS2006

Influence of Space Flight Factors on the Genetic Properties of Streptomyces Lividans 66 (PIJ702)

Gram-positive Streptomyces bacteria display genetic instability in response to external factors. Strain S. lividans 66 harbors the multicopy plasmid pIJ702 with selective and differential marker genes for antibiotic thiostrepton resistance and melanin production. Culture plates of modified ISP agar medium with and without thiostrepton were flown on Foton-M2. Suboptimal flight temperatures, which were simulated for asynchronous ground controls, resulted in slow growth and failure to differentiate and sporulate. Flight samples and asynchronous controls showed a high frequency of failing to express plasmid markers compared to laboratory controls. This was associated with loss of plasmid DNA and likely resulted from suboptimal temperatures for flight cultures and controls. Neither restriction fragment length polymorphism, nor polymerase chain reaction amplification coupled with denaturing gradient gel electrophoresis, revealed differences between pIJ702 DNA from flight vs. control clones. Mutations of the plasmid marker genes resulting from specific spaceflight factors, e.g., microgravity and radiation, were not detected.

Tabakov, V. Yu.↗
NASA NTRS2007

Circuit and Method for Communication Over DC Power Line

A circuit and method for transmitting and receiving on-off-keyed (OOK) signals with fractional signal-to-noise ratios uses available high-temperature silicon- on-insulator (SOI) components to move computational, sensing, and actuation abilities closer to high-temperature or high-ionizing radiation environments such as vehicle engine compartments, deep-hole drilling environments, industrial control and monitoring of processes like smelting, and operations near nuclear reactors and in space. This device allows for the networking of multiple, like nodes to each other and to a central processor. It can do this with nothing more than the already in-situ power wiring of the system. The device s microprocessor allows it to make intelligent decisions within the vehicle operational loop and to effect control outputs to its associated actuators. The figure illustrates how each node converts digital serial data to OOK 18-kHz in transmit mode and vice-versa in receive mode; though operations at lower frequencies or up to a megahertz are within reason using this method and these parts. This innovation s technique modulates a DC power bus with millivolt-level signals through a MOSFET (metal oxide semiconductor field effect transistor) and resistor by OOK. It receives and demodulates this signal from the DC power bus through capacitive coupling at high temperature and in high ionizing radiation environments. The demodulation of the OOK signal is accomplished by using an asynchronous quadrature detection technique realized by a quasi-discrete Fourier transform through use of the quadrature components (0 and 90 phases) of the carrier frequency as generated by the microcontroller and as a function of the selected crystal frequency driving its oscillator. The detected signal is rectified using an absolute-value circuit containing no diodes (diodes being non-operational at high temperatures), and only operational amplifiers. The absolute values of the two phases of the received signal are then summed and hard limited (digitized) by comparing them to a reference level and are then input into a microprocessor as a serial bit stream. The quasi-discrete Fourier transform is performed in high-temperature components (operational amplifiers, analog switches, resistors, and capacitors). The demodulated signal is a serial data stream that is input to the UART (universal asynchronous receiver transmitter) receiver pin of the microprocessor. The OOK of the carrier frequency uses the output of the UART pin as an enabling signal that drives the gate of the MOSFET. Logic low bits enable the carrier frequency (realized by using the 0 phase signal from the microcontroller, though either phase may be used) to be DC-coupled to the power supply bus through a current-limiting resistor mounted between the MOSFET drain and the supply rail. The presence of logic lows on the power supply rail is realized by carrier bursts while logic highs are realized by the absence of bursts.

Krasowski, Michael J.↗