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At least 271 records · Page 15

All sources NASA NTRS DOE OSTI

DOE OSTI2015

Reduction of the interfacial trap density of indium-oxide thin film transistors by incorporation of hafnium and annealing process

The stable operation of transistors under a positive bias stress (PBS) is achieved using Hf incorporated into InO{sub x}-based thin films processed at relatively low temperatures (150 to 250 °C). The mobilities of the Hf-InO{sub x} thin-film transistors (TFTs) are higher than 8 cm{sup 2}/Vs. The TFTs not only have negligible degradation in the mobility and a small shift in the threshold voltage under PBS for 60 h, but they are also thermally stable at 85 °C in air, without the need for a passivation layer. The Hf-InO{sub x} TFT can be stable even annealed at 150 °C for positive bias temperature stability (PBTS). A higher stability is achieved by annealing the TFTs at 250 °C, originating from a reduction in the trap density at the Hf-InO{sub x}/gate insulator interface. The knowledge obtained here will aid in the realization of stable TFTs processed at low temperatures.

36 MATERIALS SCIENCE↗

DOE OSTI2015

Synthesized multiwall MoS{sub 2} nanotube and nanoribbon field-effect transistors

We report on the fabrication and characterization of synthesized multiwall MoS{sub 2} nanotube (NT) and nanoribbon (NR) field-effect transistors (FETs). The MoS{sub 2} NTs and NRs were grown by chemical transport, using iodine as a transport agent. Raman spectroscopy confirms the material as unambiguously MoS{sub 2} in NT, NR, and flake forms. Transmission electron microscopy was used to observe cross sections of the devices after electrical measurements and these were used in the interpretation of the electrical measurements, allowing the estimation of the current density. The NT and NR FETs demonstrate n-type behavior, with ON/OFF current ratios exceeding 10{sup 3}, and with current densities of 1.02 μA/μm and 0.79 μA/μm at V{sub DS} = 0.3 V and V{sub BG} = 1 V, respectively. Photocurrent measurements conducted on a MoS{sub 2} NT FET revealed short-circuit photocurrent of tens of nanoamps under an excitation optical power of 78 μW and 488 nm wavelength, which corresponds to a responsivity of 460 μA/W. A long channel transistor model was used to model the common-source characteristics of MoS{sub 2} NT and NR FETs and was shown to be consistent with the measured data.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

DOE OSTI2015

Current gain in sub-10 nm base GaN tunneling hot electron transistors with AlN emitter barrier

We report on Gallium Nitride-based tunneling hot electron transistor amplifier with common-emitter current gain greater than 1. Small signal current gain up to 5 and dc current gain of 1.3 were attained in common-emitter configuration with collector current density in excess of 50 kA/cm{sup 2}. The use of a combination of 1 nm GaN/3 nm AlN layers as an emitter tunneling barrier was found to improve the energy collimation of the injected electrons. These results represent demonstration of unipolar vertical transistors in the III-nitride system that can potentially lead to higher frequency and power microwave devices.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2015

Electron velocity of 6 × 10{sup 7 }cm/s at 300 K in stress engineered InAlN/GaN nano-channel high-electron-mobility transistors

A stress engineered three dimensional (3D) Triple T-gate (TT-gate) on lattice matched In{sub 0.17}Al{sub 0.83}N/GaN nano-channel (NC) Fin-High-Electron-Mobility Transistor (Fin-HEMT) with significantly enhanced device performance was achieved that is promising for high-speed device applications. The Fin-HEMT with 200-nm effective fin-width (W{sub eff}) exhibited a very high I{sub Dmax} of 3940 mA/mm and a highest g{sub m} of 1417 mS/mm. This dramatic increase of I{sub D} and g{sub m} in the 3D TT-gate In{sub 0.17}Al{sub 0.83}N/GaN NC Fin-HEMT translated to an extracted highest electron velocity (v{sub e}) of 6.0 × 10{sup 7 }cm/s, which is ∼1.89× higher than that of the conventional In{sub 0.17}Al{sub 0.83}N/GaN HEMT (3.17 × 10{sup 7 }cm/s). The v{sub e} in the conventional III-nitride transistors are typically limited by highly efficient optical-phonon emission. However, the unusually high v{sub e} at 300 K in the 3D TT-gate In{sub 0.17}Al{sub 0.83}N/GaN NC Fin-HEMT is attributed to the increase of in-plane tensile stress component by SiN passivation in the formed NC which is also verified by micro-photoluminescence (0.47 ± 0.02 GPa) and micro-Raman spectroscopy (0.39 ± 0.12 GPa) measurements. The ability to reach the v{sub e} = 6 × 10{sup 7 }cm/s at 300 K by a stress engineered 3D TT-gate lattice-matched In{sub 0.17}Al{sub 0.83}N/GaN NC Fin-HEMTs shows they are promising for next-generation ultra-scaled high-speed device applications.

36 MATERIALS SCIENCE↗

DOE OSTI2015

Multiple logic functions from extended blockade region in a silicon quantum-dot transistor

We demonstrate multiple logic-functions at room temperature on a unit device of the Si single electron transistor (SET). Owing to the formation of the multi-dot system, the device exhibits the enhanced Coulomb blockade characteristics (e.g., large peak-to-valley current ratio ∼200) that can improve the reliability of the SET-based logic circuits. The SET displays a unique feature useful for the logic applications; namely, the Coulomb oscillation peaks are systematically shifted by changing either of only the gate or the drain voltage. This enables the SET to act as a multi-functional one-transistor logic gate with AND, OR, NAND, and XOR functions.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

DOE OSTI2015

Room-temperature amorphous alloy field-effect transistor exhibiting particle and wave electronic transport

The realization of room-temperature macroscopic field effect transistors (FETs) will lead to new epoch-making possibilities for electronic applications. The I{sub d}-V{sub g} characteristics of the millimeter-sized aluminum-oxide amorphous alloy (Ni{sub 0.36}Nb{sub 0.24}Zr{sub 0.40}){sub 90}H{sub 10} FETs were measured at a gate-drain bias voltage of 0–60 μV in nonmagnetic conditions and under a magnetic fields at room temperature. Application of dc voltages to the gate electrode resulted in the transistor exhibiting one-electron Coulomb oscillation with a period of 0.28 mV, Fabry-Perot interference with a period of 2.35 μV under nonmagnetic conditions, and a Fano effect with a period of 0.26 mV for Vg and 0.2 T under a magnetic field. The realization of a low-energy controllable device made from millimeter-sized Ni-Nb-Zr-H amorphous alloy throws new light on cluster electronics.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

DOE OSTI2015

Low-frequency noise in MoSe{sub 2} field effect transistors

One of the important performance metrics of emerging nanoelectronic devices, including low dimensional Field Effect Transistors (FETs), is the magnitude of the low-frequency noise. Atomically thin 2D semiconductor channel materials such as MoX{sub 2} (X ≡ S, Se) have shown promising transistor characteristics such as I{sub ON}/I{sub OFF} ratio exceeding 10{sup 6} and low I{sub OFF}, making them attractive as channel materials for next generation nanoelectronic devices. However, MoS{sub 2} FETs demonstrated to date exhibit high noise levels under ambient conditions. In this letter, we report at least two orders of magnitude smaller values of Hooge parameter in a back-gated MoSe{sub 2} FET (10 atomic layers) with nickel S/D contacts and measured at atmospheric pressure and temperature. The channel dominated regime of noise was extracted from the total noise spectrum and is shown to follow a mobility fluctuation model with 1/f dependence. The low noise in MoSe{sub 2} FETs is comparable to other 1D nanoelectronic devices such as carbon nanotube FETs (CNT-FETs) and paves the way for use in future applications in precision sensing and communications.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

DOE OSTI2015

Direct fabrication of thin layer MoS{sub 2} field-effect nanoscale transistors by oxidation scanning probe lithography

Thin layer MoS{sub 2}-based field effect transistors (FET) are emerging candidates to fabricate very fast and sensitive devices. Here, we demonstrate a method to fabricate very narrow transistor channel widths on a single layer MoS{sub 2} flake connected to gold electrodes. Oxidation scanning probe lithography is applied to pattern insulating barriers on the flake. The process narrows the electron path to about 200 nm. The output and transfer characteristics of the fabricated FET show a behavior that is consistent with the minimum channel width of the device. The method relies on the direct and local chemical modification of MoS{sub 2}. The straightforward character and the lack of specific requirements envisage the controlled patterning of sub-100 nm electron channels in MoS{sub 2} FETs.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

DOE OSTI2015

Synchronization, non-linear dynamics and low-frequency fluctuations: Analogy between spontaneous brain activity and networked single-transistor chaotic oscillators

In this paper, the topographical relationship between functional connectivity (intended as inter-regional synchronization), spectral and non-linear dynamical properties across cortical areas of the healthy human brain is considered. Based upon functional MRI acquisitions of spontaneous activity during wakeful idleness, node degree maps are determined by thresholding the temporal correlation coefficient among all voxel pairs. In addition, for individual voxel time-series, the relative amplitude of low-frequency fluctuations and the correlation dimension (D{sub 2}), determined with respect to Fourier amplitude and value distribution matched surrogate data, are measured. Across cortical areas, high node degree is associated with a shift towards lower frequency activity and, compared to surrogate data, clearer saturation to a lower correlation dimension, suggesting presence of non-linear structure. An attempt to recapitulate this relationship in a network of single-transistor oscillators is made, based on a diffusive ring (n = 90) with added long-distance links defining four extended hub regions. Similarly to the brain data, it is found that oscillators in the hub regions generate signals with larger low-frequency cycle amplitude fluctuations and clearer saturation to a lower correlation dimension compared to surrogates. The effect emerges more markedly close to criticality. The homology observed between the two systems despite profound differences in scale, coupling mechanism and dynamics appears noteworthy. These experimental results motivate further investigation into the heterogeneity of cortical non-linear dynamics in relation to connectivity and underline the ability for small networks of single-transistor oscillators to recreate collective phenomena arising in much more complex biological systems, potentially representing a future platform for modelling disease-related changes.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2015

Evaluation of pulsed laser annealing for flexible multilayer MoS{sub 2} transistors

To realize the proper electrical characteristics of field-effect transistors, the quality of the contact and interface must be improved because they can substantially distort the extracted mobility, especially for materials with low densities of states like molybdenum disulfide (MoS{sub 2}). We show that mechanically flexible MoS{sub 2} thin-film transistors (TFTs) with selectively laser annealed source/drain electrodes achieve enhanced device performance without plastic deformation including higher field-effect mobility (from 19.59 to 45.91 cm{sup 2} V{sup −1} s{sup −1}) in the linear regime, decreased subthreshold swing, and enhanced current saturation. Furthermore, numerical thermal simulations, measured current-voltage characteristics, and contact-free mobility extracted from the Y-function method suggest that the enhanced performance originated from a decrease in the Schottky barrier effect at the contact and an improvement of the channel interface. These results demonstrate that picosecond laser annealing can be a promising technology for building high performance flexible MoS{sub 2} TFTs in flexible/stretchable circuitry, which should be processed at low temperatures.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

DOE OSTI2015

Investigation on phonon scattering in a GaAs nanowire field effect transistor using the non-equilibrium Green's function formalism

Using quantum transport simulations, the impact of electron-phonon scattering on the transfer characteristic of a gate-all-around nanowire (GaAs) field effect transistor (NWFET) has been thoroughly investigated. The Non-Equilibrium Green's Function formalism in the effective mass approximation using a decoupled mode decomposition has been deployed. NWFETs of different dimensions have been considered, and scattering mechanisms including acoustic, optical and polar optical phonons have been included. The effective masses were extracted from tight binding simulations. High and low drain bias have been considered. We found substantial source to drain tunnelling current and significant impact of phonon scattering on the performance of the NWFET. At low drain bias, for a 2.2 × 2.2 nm{sup 2} cross-section transistor, scattering caused a 72%, 77%, and 81% decrease in the on-current for a 6 nm, 10 nm, and 20 nm channel length, respectively. This reduction in the current due to scattering is influenced by the increase in the tunnelling current. We include the percentage tunnelling for each valley at low and high drain bias. It was also found that the strong quantisation caused the relative position of the valleys to vary with the cross-section. This had a large effect on the overall tunnelling current. The phonon-limited mobility was also calculated, finding a mobility of 950 cm{sup 2}/V s at an inversion charge density of 10{sup 12 }cm{sup −2} for a 4.2 × 4.2 nm{sup 2} cross-section device.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2015

Metal-interconnection-free integration of InGaN/GaN light emitting diodes with AlGaN/GaN high electron mobility transistors

We report a metal-interconnection-free integration scheme for InGaN/GaN light emitting diodes (LEDs) and AlGaN/GaN high electron mobility transistors (HEMTs) by combining selective epi removal (SER) and selective epitaxial growth (SEG) techniques. SER of HEMT epi was carried out first to expose the bottom unintentionally doped GaN buffer and the sidewall GaN channel. A LED structure was regrown in the SER region with the bottom n-type GaN layer (n-electrode of the LED) connected to the HEMTs laterally, enabling monolithic integration of the HEMTs and LEDs (HEMT-LED) without metal-interconnection. In addition to saving substrate real estate, minimal interface resistance between the regrown n-type GaN and the HEMT channel is a significant improvement over metal-interconnection. Furthermore, excellent off-state leakage characteristics of the driving transistor can also be guaranteed in such an integration scheme.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

DOE OSTI2015

Low-voltage polymer/small-molecule blend organic thin-film transistors and circuits fabricated via spray deposition

Organic thin-film electronics have long been considered an enticing candidate in achieving high-throughput manufacturing of low-power ubiquitous electronics. However, to achieve this goal, more work is required to reduce operating voltages and develop suitable mass-manufacture techniques. Here, we demonstrate low-voltage spray-cast organic thin-film transistors based on a semiconductor blend of 2,8-difluoro- 5,11-bis (triethylsilylethynyl) anthradithiophene and poly(triarylamine). Both semiconductor and dielectric films are deposited via successive spray deposition in ambient conditions (air with 40%–60% relative humidity) without any special precautions. Despite the simplicity of the deposition method, p-channel transistors with hole mobilities of >1 cm{sup 2}/Vs are realized at −4 V operation, and unipolar inverters operating at −6 V are demonstrated.

36 MATERIALS SCIENCE↗

DOE OSTI2015

Double-gate SnO{sub 2} nanowire electric-double-layer transistors with tunable threshold voltage

Double-gate Sb-SnO{sub 2} nanowire electric-double-layer (EDL) transistors with in-plane gates were fabricated using only one shadow mask. The threshold voltage of such devices can be tuned in a wide range from −0.13 V to 0.72 V by the in-plane gate, which allows the device to switch from depletion-mode to enhancement-mode operation. The operation voltage of the double-gate device is 1 V because the EDL gate dielectric can lead to a high gate capacitance (>3.5 μF/cm{sup 2}). Moreover, all double-gate devices show good electrical characteristics with high field-effect mobility (>200 cm{sup 2}/V·s), high drain-current I{sub on/off} ratio (>7 × 10{sup 4}), and small subthreshold slope (<100 mV/dec). These double-gate nanowire EDL transistors can pave the way for an electrically working low-voltage nano-electronic process.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

DOE OSTI2015

Suppression of 1/f noise in near-ballistic h-BN-graphene-h-BN heterostructure field-effect transistors

We have investigated low-frequency 1/f noise in the boron nitride–graphene–boron nitride heterostructure field-effect transistors on Si/SiO{sub 2} substrates (f is a frequency). The device channel was implemented with a single layer graphene encased between two layers of hexagonal boron nitride. The transistors had the charge carrier mobility in the range from ∼30 000 to ∼36 000 cm{sup 2}/Vs at room temperature. It was established that the noise spectral density normalized to the channel area in such devices can be suppressed to ∼5 × 10{sup −9 }μm{sup 2 }Hz{sup −1}, which is a factor of ×5 – ×10 lower than that in non-encapsulated graphene devices on Si/SiO{sub 2}. The physical mechanism of noise suppression was attributed to screening of the charge carriers in the channel from traps in SiO{sub 2} gate dielectric and surface defects. The obtained results are important for the electronic and optoelectronic applications of graphene.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

DOE OSTI2015

A multi-agent quantum Monte Carlo model for charge transport: Application to organic field-effect transistors

We have developed a multi-agent quantum Monte Carlo model to describe the spatial dynamics of multiple majority charge carriers during conduction of electric current in the channel of organic field-effect transistors. The charge carriers are treated by a neglect of diatomic differential overlap Hamiltonian using a lattice of hydrogen-like basis functions. The local ionization energy and local electron affinity defined previously map the bulk structure of the transistor channel to external potentials for the simulations of electron- and hole-conduction, respectively. The model is designed without a specific charge-transport mechanism like hopping- or band-transport in mind and does not arbitrarily localize charge. An electrode model allows dynamic injection and depletion of charge carriers according to source-drain voltage. The field-effect is modeled by using the source-gate voltage in a Metropolis-like acceptance criterion. Although the current cannot be calculated because the simulations have no time axis, using the number of Monte Carlo moves as pseudo-time gives results that resemble experimental I/V curves.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

DOE OSTI2015

Enhanced sheet carrier densities in polarization controlled AlInN/AlN/GaN/InGaN field-effect transistor on Si (111)

We report on GaN based field-effect transistor (FET) structures exhibiting sheet carrier densities of n = 2.9 10{sup 13} cm{sup −2} for high-power transistor applications. By grading the indium-content of InGaN layers grown prior to a conventional GaN/AlN/AlInN FET structure control of the channel width at the GaN/AlN interface is obtained. The composition of the InGaN layer was graded from nominally x{sub In} = 30 % to pure GaN just below the AlN/AlInN interface. Simulations reveal the impact of the additional InGaN layer on the potential well width which controls the sheet carrier density within the channel region of the devices. Benchmarking the In{sub x}Ga{sub 1−x}N/GaN/AlN/Al{sub 0.87}In{sub 0.13}N based FETs against GaN/AlN/AlInN FET reference structures we found increased maximum current densities of I{sub SD} = 1300 mA/mm (560 mA/mm). In addition, the InGaN layer helps to achieve broader transconductance profiles as well as reduced leakage currents.

36 MATERIALS SCIENCE↗

DOE OSTI2015

Impact of residual carbon impurities and gallium vacancies on trapping effects in AlGaN/GaN metal insulator semiconductor high electron mobility transistors

Effects of residual C impurities and Ga vacancies on the dynamic instabilities of AlN/AlGaN/GaN metal insulator semiconductor high electron mobility transistors are investigated. Secondary ion mass spectroscopy, positron annihilation spectroscopy, and steady state and time-resolved photoluminescence (PL) measurements have been performed in conjunction with electrical characterization and current transient analyses. The correlation between yellow luminescence (YL), C- and Ga vacancy concentrations is investigated. Time-resolved PL indicating the C{sub N} O{sub N} complex as the main source of the YL, while Ga vacancies or related complexes with C seem not to play a major role. The device dynamic performance is found to be significantly dependent on the C concentration close to the channel of the transistor. Additionally, the magnitude of the YL is found to be in agreement with the threshold voltage shift and with the on-resistance degradation. Trap analysis of the GaN buffer shows an apparent activation energy of ∼0.8 eV for all samples, pointing to a common dominating trapping process and that the growth parameters affect solely the density of trap centres. It is inferred that the trapping process is likely to be directly related to C based defects.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗