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At least 271 records · Page 15

Thermal blanket insulation for advanced space transportation systems

The feasibility of weaving Nextel ceramic and Nicalon silicon carbide yarns into integrally woven, three dimensional fluted core fabrics was demonstrated. Parallel face fabrics joined with woven fabric ribs to form triangular cross section flutes between the faces were woven into three single and one double layer configuration. High warp yarn density in the double layer configuration caused considerable yarn breakage during weaving. The flutes of all four fabrics were filled with mandrels made from Q-Fiber Felt and FRCI-20-12 to form candidate insulation panels for advanced Space Transportation Systems. Procedures for preparing and inserting the mandrels were developed. Recommendations are made on investigating alternate methods for filling the flutes with insulation, and for improving the weaving of these types of fabrics.

Pusch, Richard H.↗

Insulating Blankets Withstand Higher Temperatures

Thermal-insulation blankets withstand repeated exposure to temperatures up to 2,000 degrees C. Thin, light in weight, and flexible. Developed to protect proposed aerospacecraft like Aeroassisted Space Transfer Vehicle and National Aerospace Plane, exposed to temperatures higher than those on surface of Space Shuttle during reentry into atmosphere of Earth. Also useful as furnace insulation and in firefighters' clothing. Sewing threads made of silicon carbide yarn essential components of blankets.

Kourtides, D. A.↗

Measuring High Temperatures In Ceramic-Fiber Blankets

Thermocouple assemblies devised specifically for measuring temperatures at fixed locations within insulating blankets made of such ceramic fibers as alumina, silicon carbide, and/or aluminoborosilicate. Thermocouples measure temperatures from 100 to 3,200 degrees F in oxidizing atmospheres. Wires enclosed in alumina sheath for protection against hot oxidation and mechanical damage.

Kourtides, Demetrius A.↗

Enhanced adhesion by high energy bombardment

Films (12) of gold, copper, silicon nitride, or other materials are firmly bonded to insulator substrates (12) such as silica, a ferrite, or Teflon (polytetrafluorethylene) by irradiating the interface with high energy ions. Apparently, track forming processes in the electronic stopping region cause intermixing in a thin surface layer resulting in improved adhesion without excessive doping. Thick layers can be bonded by depositing or doping the interfacial surfaces with fissionable elements or alpha emitters.

Griffith, Joseph E.↗

Near net shape bulk laminated silicon iron electric steel for improved electrical resistance and low high frequency loss

The invention involves producing discontinuous, flake-shaped particles of a soft magnetic material, coating the flake-shaped particles with an electrically insulating coating, and consolidating the coated flaked-shaped particles to form a soft magnetic bulk shape. The consolidated bulk shape can comprise a layer or a simple or complex 3D magnet part shape, which has a consolidated layered microstructure that includes laminated soft magnetic regions that are substantially encapsulated by an electrical insulating layer to increase the resistivity of soft magnetic material, especially when used in silicon iron magnet parts.

Cui, Jun↗

Medium-Voltage Isolated Auxiliary Power Supply Design for High Insulation Capability, Ultra-Low Coupling Capacitance, and Small Size

To fully utilize the benefits of medium-voltage (MV) silicon carbide (SiC)-based converter and achieve high power density, the isolated auxiliary power supply (IAPS) needs to be as small as possible. However, the high insulation and low coupling capacitance requirements, considering the high voltage and high dv / dt , are constraints of size reduction. This article proposes an MV IAPS design for high insulation capability, ultra-low coupling capacitance, and small size. The topology selection, efficiency, load regulation, coupling capacitance, and size reduction considerations are discussed. A 2.5 W MV IAPS is designed and built for a 10 kV SiC mosfet -based 13.8 kV/100 kW three-phase converter, achieving a partial discharge (PD) inception voltage of higher than 15 kV rms, ultra-low coupling capacitance of 1.03 pF, and smaller size than that of the commercial products as well as the state-of-art research prototypes. Experimental results of PD test, 10 kV SiC mosfet -based half-bridge test, and 13.8 kV/100 kVA three-phase converter full rating test are conducted for design validation.

42 ENGINEERING↗

Microscopy and microstructure of Shuttle thermal protection system materials

Examples of the contribution of microstructural analysis to the development of the Space Shuttle tile insulation system are presented, with photographic examples of the scanning electron microscope (SEM) investigations. After the basic thermal protection system materials had been selected, it was neccessary to analyze the mechanical responses of the combined materials; which included: (1) the polymer strain isolation pad (SIP), (2) the room temperature-vulcanizing silicone rubber bond, (RTV), and (3) rigid ceramic fiber reusable surface insulation (RSI). Microstructural analysis was used to provide information on deformation and fracture mechanisms, load transfer mechanisms, and structural alterations occurring before final failure. Both quantitative and qualitative information was obtained in the open, three-dimensional fibrous structures of the ceramic tiles by means of novel techniques of encapsulation and dissolution.

Newquist, C. W.↗

Growing Aligned Carbon Nanotubes for Interconnections in ICs

A process for growing multiwalled carbon nanotubes anchored at specified locations and aligned along specified directions has been invented. Typically, one would grow a number of the nanotubes oriented perpendicularly to a silicon integrated-circuit (IC) substrate, starting from (and anchored on) patterned catalytic spots on the substrate. Such arrays of perpendicular carbon nanotubes could be used as electrical interconnections between levels of multilevel ICs. The process (see Figure 1) begins with the formation of a layer, a few hundred nanometers thick, of a compatible electrically insulating material (e.g., SiO(x) or Si(y)N(z) on the silicon substrate. A patterned film of a suitable electrical conductor (Al, Mo, Cr, Ti, Ta, Pt, Ir, or doped Si), having a thickness between 1 nm and 2 m, is deposited on the insulating layer to form the IC conductor pattern. Next, a catalytic material (usually, Ni, Fe, or Co) is deposited to a thickness between 1 and 30 nm on the spots from which it is desired to grow carbon nanotubes. The carbon nanotubes are grown by plasma-enhanced chemical vapor deposition (PECVD). Unlike the matted and tangled carbon nanotubes grown by thermal CVD, the carbon nanotubes grown by PECVD are perpendicular and freestanding because an electric field perpendicular to the substrate is used in PECVD. Next, the free space between the carbon nanotubes is filled with SiO2 by means of CVD from tetraethylorthosilicate (TEOS), thereby forming an array of carbon nanotubes embedded in SiO2. Chemical mechanical polishing (CMP) is then performed to remove excess SiO2 and form a flat-top surface in which the outer ends of the carbon nanotubes are exposed. Optionally, depending on the application, metal lines to connect selected ends of carbon nanotubes may be deposited on the top surface. The top part of Figure 2 is a scanning electron micrograph (SEM) of carbon nanotubes grown, as described above, on catalytic spots of about 100 nm diameter patterned by electron-beam lithography. These and other nanotubes were found to have lengths ranging from 2 to 10 m and diameters ranging from 30 to 200 nm, the exact values of length depending on growth times and conditions and the exact values of diameter depending on the diameters and thicknesses of the catalyst spots. The bottom part of Figure 2 is an SEM of an embedded array of carbon nanotubes after CMP.

Li, Jun↗

Efficient thermoelectric device

A high efficiency thermo electric device comprising a multi nanolayer structure of alternating insulator and insulator/metal material that is irradiated across the plane of the layer structure with ionizing radiation. The ionizing radiation produces nanocrystals in the layered structure that increase the electrical conductivity and decrease the thermal conductivity thereby increasing the thermoelectric figure of merit. Figures of merit as high as 2.5 have been achieved using layers of co-deposited gold and silicon dioxide interspersed with layers of silicon dioxide. The gold to silicon dioxide ratio was 0.04. 5 MeV silicon ions were used to irradiate the structure. Other metals and insulators may be substituted. Other ionizing radiation sources may be used. The structure tolerates a wide range of metal to insulator ratio.

Ila, Daryush↗

The Development of Silicon Carbide Based Hydrogen and Hydrocarbon Sensors

Silicon carbide is a high temperature electronic material. Its potential for development of chemical sensors in a high temperature environment has not been explored. The objective of this study is to use silicon carbide as the substrate material for the construction of chemical sensors for high temperature applications. Sensors for the detection of hydrogen and hydrocarbon are developed in this program under the auspices of Lewis Research Center, NASA. Metal-semiconductor or metal-insulator-semiconductor structures are used in this development. Specifically, using palladium-silicon carbide Schottky diodes as gas sensors in the temperature range of 100 to 400 C are designed, fabricated and assessed. The effect of heat treatment on the Pd-SiC Schottky diode is examined. Operation of the sensors at 400 C demonstrate sensitivity of the sensor to hydrogen and hydrocarbons. Substantial progress has been made in this study and we believe that the Pd-SiC Schottky diode has potential as a hydrogen and hydrocarbon sensor over a wide range of temperatures. However, the long term stability and operational life of the sensor need to be assessed. This aspect is an important part of our future continuing investigation.

Liu, Chung-Chiun↗

Graphite-Embedded High-Performance Insulated Metal Substrate for Wide-Bandgap Power Modules

Emerging wide-bandgap (WBG) semiconductor devices such as silicon carbide (SiC) metal–oxide semiconductor field-effect transistors (MOSFETs) and gallium nitride high-electron-mobility transistors can handle high power in reduced semiconductor areas better than conventional Si-based devices owing to superior material properties. With increased power loss density in a WBG-based converter and reduced die size in power modules, thermal management of power devices must be optimized for high performance. Here, we present a graphite-embedded insulated metal substrate (thermally-annealed-pyrolytic-graphite-embedded insulated metal substrate—IMSwTPG) designed for WBG power modules. Theoretical thermal performance analysis of graphite-embedded metal cores is presented, with design details for IMSwTPG with embedded graphite to replace a direct-bonded copper (DBC) substrate. The proposed IMSwTPG is compared with an aluminum nitride-based DBC substrate using finite-element thermal analysis for steady-state and transient thermal performance. The solutions’ thermal performances are compared under different coolant temperature and thermal loading conditions, and the proposed substrate's electrical performance is validated with static and dynamic characterization. Using graphite-embedded substrates, junction-to-case thermal resistance of SiC MOSFETs can be reduced up to 17%, and device current density can be increased by 10%, regardless of the thermal management strategy used to cool the substrate. Reduced transient thermal impedance of up to 40% of dies owing to increased heat capacity is validated in transient thermal simulations and experiments. The half-bridge power module's electrical performance is evaluated for on -state resistance, switching performance, and switching loss at three junction temperature conditions. The proposed substrate solution has minimal impact on conduction and switching performance of SiC MOSFETs.

42 ENGINEERING↗

The Characterization of the Selected Materials for Space Shuttle

The harsh conditions to which the Space Shuttles are exposed during flight required the development and use of many unique materials. These materials were specially designed to withstand extreme temperatures, in some cases over 1600 C, while other material must withstand the cryogenic conditions of -253 C, and others must operate while under extreme loads. All of these materials must not only operate in the harsh condition but they must be light weight as well. The Space Shuttle is composed of three major components when configured for launch, Figure 1; the Shuttle, solid rocket boosters, and external tank (ET). The different heat shields of the Shuttle make up the thermal protection system (TPS); this system consists of many different types of components designed to operate on various parts of the vehicle. The body of the Shuttle and ET are composed mainly of aluminum alloy and graphite epoxy. The TPS consists of reinforced carbon-carbon (RCC) used on the wing leading edges and nose cap areas while the upper forward fuselage areas, the entire underside of the Shuttle, the Orbiter maneuvering system, and reaction control system utilize blacc high temperature reusable surface insulation (HRSI) tiles, Figure 2. Other areas of the Orbiter are protected by fibrous refractory composite insulation (FRCI) tiles. Areas where the temperature stays below 649 C, such as the forward fuselage, mid-fuselage, aft fuselage, vertical tail, and upper wing, are protected by other material such as, white low temperature reusable surface insulation (LRSI) tiles, advanced flexible reusable surface insulation (AFRSI) blankets, and felt reusable surface insulation (FRSI) white blankets. The RCC is a pyrolized laminated carbon with the outer surface converted to silicon carbide to prevent oxidation. The FiRST tiles are made of a low-density, high purity silica 99.8-percent amorphous fiber insulation that is made rigid by ceramic bonding resulting in 90-percent void and 10-percent materials. The RCC and HRSI are used in areas where the temperature rises above 1260 T. The FRCI tiles are high strength tiles derived by adding alumina-bososilicate fiber to the pure silica tile slurry that welds the micron-sizes fibers of pure silica into a rigid structure during sintering. The FRCI is composed of 20-percent alumina-borosilicate fibers and 80-percent silica fibers, and provided improved strength, durability and resistance to coating cracking and weight reduction than HRSI.

Kim, Hae-Soo↗

Gate control of electron correlations towards Mott field effect transistors (MottFET)

The modulation of channel conductance in field-effect transistors (FETs) via metal-insulator-semiconductor structures has revolutionized information processing and storage. However, the limitations of silicon-based FETs in electrical switching have driven the search for new materials capable of overcoming these constraints. Electrostatic gating of competing electronic phases in a Mott material near its metal-to-insulator transition (MIT) offers the prospects of substantial modulation of the conducting electrons and electrical resistivity through small changes in band filling. While electrostatic control of the MIT has been previously reported, the advancement of Mott materials toward novel Mott-based transistors, MottFETs requires the realization of their unique physical properties in a solid-state device. In this study, we present gate control of electron correlation using a solid-state device utilizing the oxide Mott system La 1-x Sr x VO 3 as a correlated FET channel. We report on a gate resistance response that cannot be explained in a purely electrostatic framework. This behavior suggests an enhancement in effective mass and a reduction in effective carrier density as the system approaches its insulating state, consistent with theoretical predictions for Mott systems, suggesting at least 100× charge gain originating from the correlated behavior. These preliminary results pave the way toward the development of highly efficient, low-power electronic devices that could surpass the performance bottlenecks of conventional FETs by leveraging the electronic phase transitions of correlated electron systems.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Development of design allowables data for adhesives for attaching reusables surface insulation, addendum 1A

The task consisted of conducting mechanical and thermal tests to establish design allowables data on a new room temperature vulcanizing (RTV) silicone adhesive, X3-6004. Low modulus, coupled with relatively low density and good low-temperature properties of this adhesive, places it in contention as a candidate for attaching reusable surface insulation on the space shuttle. Data obtained show that the modulus values of X3-6004 are significantly lower than those of RTV-560 and the other three adhesives characterized at test temperatures from 550 to -175 F. At -175, -200 and -270 F, the modulus of X3-6004 is approximately the same as GE RTV-560 and the other three silicone adhesives. The X3-6004 adhesive exhibits good processing properties. It has a 12 percent lower density than RTV-560. Although lower in overall strength properties as compared to the other adhesives in the program, X3-6004 has adequate adhesion to 2024T81 aluminum to compete as an adhesive for attaching reusable surface insulation. It does exhibit some tendency to revert and soften at temperatures above 350 F when in a confined area.

Owen, H. P.↗

Tutorial on forming through-silicon vias

Through-silicon vias (TSVs) are a critical technology for three-dimensional integrated circuit technology. These through-substrate interconnects allow electronic devices to be stacked vertically for a broad range of applications and performance improvements such as increased bandwidth, reduced signal delay, improved power management, and smaller form-factors. There are many interdependent processing steps involved in the successful integration of TSVs. This article provides a tutorial style review of the following semiconductor fabrication process steps that are commonly used in forming TSVs: deep etching of silicon to form the via, thin film deposition to provide insulation, barrier, and seed layers, electroplating of copper for the conductive metal, and wafer thinning to reveal the TSVs. Recent work in copper electrochemical deposition is highlighted, analyzing the effect of accelerator and suppressor additives in the electrolyte to enable void-free bottom-up filling from a conformally lined seed metal.

42 ENGINEERING↗

An Evaluation of High Temperature Airframe Seals for Advanced Hypersonic Vehicles

High temperature seals are required for advanced hypersonic airframe applications. In this study, both spring tube thermal barriers and innovative wafer seal systems were evaluated under relevant hypersonic test conditions (temperatures, pressures, etc.) via high temperature compression testing and room temperature flow assessments. Thermal barriers composed of a Rene 41 spring tube filled with Saffil insulation and overbraided with a Nextel 312 sheath showed acceptable performance at 1500 F in both short term and longer term compression testing. Nextel 440 thermal barriers with Rene 41 spring tubes and Saffil insulation demonstrated good compression performance up to 1750 F. A silicon nitride wafer seal/compression spring system displayed excellent load performance at temperatures as high as 2200 F and exhibited room temperature leakage values that were only 1/3 those for the spring tube rope seals. For all seal candidates evaluated, no significant degradation in leakage resistance was noted after high temperature compression testing. In addition to these tests, a superalloy seal suitable for dynamic seal applications was optimized through finite element techniques.

DeMange, Jeffrey J.↗

Condition assessment of cable insulation materials in advanced reactor environments

While existing cable insulation materials are sufficient for use in the current reactor fleet, environmental conditions inside some advanced reactors, such as small modular reactors, will be substantially harsher. The work herein was conducted to assess the performance and overall survivability of several high-temperature, radiation resistant insulation polymers in a simulated small modular reactor environment. The materials evaluated under this research include polyether ether ketone, polyimide, and silicone rubber. These polymers were subjected to 1000 h of environmental stress exposure under two different conditions: 1) high temperature (i.e., 250 °C) in atmospheric pressure and 2) high temperature in a low-pressure vacuum (i.e., less than 2 psia). During the environmental exposure process, each insulation was periodically tested using several materials characterization techniques including Fourier transform infrared spectroscopy, oxidation induction time, and oxidation induction temperature. The objective of this testing was to assess and monitor changes that occurred in the thermal and chemical properties of the materials during the environmental exposures. The overall survivability of each insulation was assessed based on these property changes. The results of this research revealed that the polyimide and polyether ether ketone insulations had significantly better thermal and chemical stability than the silicone rubber during both the high-temperature atmospheric and vacuum exposures. Both polyimide and polyether ether ketone experienced minimal reductions in their chemical and thermal properties over the course of 1000 h in the simulated environments. Finally, based on this research, polyimide and polyether ether ketone show promise as potential base materials for small modular reactor cable insulation.

21 SPECIFIC NUCLEAR REACTORS AND ASSOCIATED PLANTS↗