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At least 271 records · Page 15

Investigation of the Effect of Gate Oxide Screening with Adjustment Pulse on Commercial SiC Power MOSFETs

This paper presents a method to recover the negative threshold voltage shift during high field gate oxide screening of 1.2 kV 4H-SiC MOSFETs with an additional adjustment gate voltage pulse. To reduce field failure rates of the MOSFETs in operation, manufacturers perform a screening treatment to remove devices with extrinsic defects in the oxide. Current gate oxide screening procedures are limited to oxide fields at or below ~9 MV/cm for short durations (<1 s), which is not enough to remove all the devices with extrinsic defects. The results show that by implementing a lower field gate pulse, the threshold voltage shift can be partially recovered, and therefore the maximum screening field and time can be increased. However, both the initial screening pulse and the adjustment pulse require careful calibration to prevent significant degradation of the device threshold voltage, on-resistance, interface state density, or intrinsic lifetime. With a well calibrated set of pulses, higher screening fields can be utilized without significantly damaging the devices. This leads to an improvement in the overall screening efficiency of the process, reducing the number of devices with extrinsic oxide defects entering the field, and improving the reliability of the SiC MOSFETs in operation.

42 ENGINEERING↗

Dual ohmic contact to N- and P-type silicon carbide

Simultaneous formation of electrical ohmic contacts to silicon carbide (SiC) semiconductor having donor and acceptor impurities (n- and p-type doping, respectively) is disclosed. The innovation provides for ohmic contacts formed on SiC layers having n- and p-doping at one process step during the fabrication of the semiconductor device. Further, the innovation provides a non-discriminatory, universal ohmic contact to both n- and p-type SiC, enhancing reliability of the specific contact resistivity when operated at temperatures in excess of 600.degree. C.

Okojie, Robert S.↗

MEMS Applications in Aerodynamic Measurement Technology

Microelectromechanical systems (MEMS) embodies the integration of sensors, actuators, and electronics on a single substrate using integrated circuit fabrication techniques and compatible bulk and surface micromachining processes. Silicon and its derivatives form the material base for the MEMS technology. MEMS devices, including microsensors and microactuators, are attractive because they can be made small (characteristic dimension about 100 microns), be produced in large numbers with uniform performance, include electronics for high performance and sophisticated functionality, and be inexpensive. For aerodynamic measurements, it is preferred that sensors be small so as to approximate measurement at a point, and in fact, MEMS pressure sensors, wall shear-stress sensors, heat flux sensors and micromachined hot wires are nearing application. For the envisioned application to wind tunnel models, MEMS sensors can be placed on the surface or in very shallow grooves. MEMS devices have often been fabricated on stiff, flat silicon substrates, about 0.5 mm thick, and therefore were not easily mounted on curved surfaces. However, flexible substrates are now available and heat-flux sensor arrays have been wrapped around a curved turbine blade. Electrical leads can also be built into the flexible substrate. Thus MEMS instrumented wind tunnel models do not require deep spanwise grooves for tubes and leads that compromise the strength of conventionally instrumented models. With MEMS, even the electrical leads can potentially be eliminated if telemetry of the signals to an appropriate receiver can be implemented. While semiconductor silicon is well known for its electronic properties, it is also an excellent mechanical material for MEMS applications. However, silicon electronics are limited to operations below about 200 C, and silicon's mechanical properties start to diminish above 400 C. In recent years, silicon carbide (SiC) has emerged as the leading material candidate for applications in high temperature environments and can be used for high-temperature MEMS applications. With SiC, diodes and more complex electronics have been shown to operate to about 600 C, while the mechanical properties of SiC are maintained to much higher temperatures. Even when MEMS devices show benefits in the laboratory, there are many packaging challenges for any aeronautics application. Incorporating MEMS into these applications requires new approaches to packaging that goes beyond traditional integrated circuit (IC) packaging technologies. MEMS must interact mechanically, as well as electrically with their environment, making most traditional chip packaging and mounting techniques inadequate. Wind tunnels operate over wide temperature ranges in an environment that is far from being a 'clean-room.' In flight, aircraft are exposed to natural elements (e.g. rain, sun, ice, insects and dirt) and operational interferences(e.g. cleaning and deicing fluids, and maintenance crews). In propulsion systems applications, MEMS devices will have to operate in environments containing gases with very high temperatures, abrasive particles and combustion products. Hence deployment and packaging that maintains the integrity of the MEMS system is crucial. This paper presents an overview of MEMS fabrication and materials, descriptions of available sensors with more details on those being developed in our laboratories, and a discussion of sensor deployment options for wind tunnel and flight applications.

Reshotko, E.↗

Ultrathin epitaxial MgB 2 on SiC: Substrate surface-polarity-dependent properties

High-quality, ultrathin superconducting films are required for advanced devices such as hot-electron bolometers, superconducting nanowire single-photon detectors, and quantum applications. Using hybrid physical-chemical vapor deposition, we show that MgB 2 films as thin as 4 nm can be fabricated on the carbon-terminated 6⁢H-SiC (0001) surface with a superconducting transition temperature above 33 K and a rms roughness of 0.7 nm. Remarkably, the film quality is a function of the SiC surface termination, with the C-terminated surface preferred to the Si-terminated surface. To understand the MgB 2 thin film/SiC substrate interactions giving rise to this difference, we characterized the interfacial structures using Rutherford backscattering spectroscopy/channeling, electron-energy-loss spectroscopy, and x-ray photoemission spectroscopy. The MgB 2 /SiC interface structure is complex and different for the two terminations. Both terminations incorporate substantial unintentional oxide layers influencing MgB 2 growth and morphology, but with a different extent, intermixing, and interface chemistry. In this paper, we report measurements of transport, resistivity, and the critical superconducting temperature of MgB 2 /SiC that are different for the two terminations, and they link interfacial structure variations to observed differences. The result shows that the C face of SiC is a preferred substrate for the deposition of ultrathin superconducting MgB 2 films.

36 MATERIALS SCIENCE↗

Perimeter Governed Minority Carrier Lifetimes in 4H-SiC p(+)-n Diodes Measured by Reverse Recovery Switching Transient Analysis

Minority carrier lifetimes in epitaxial 4H-SiC p(+)-n junction diodes were measured via an analysis of reverse recovery switching characteristics. Behavior of reverse recovery storage time (t(s)) as a function of initial ON-state forward current (I(F)) and OFF-state reverse current (I(R)) followed well-documented trends which have been observed for decades in silicon p-n rectifiers. Average minority carrier (hole) lifetimes (tau(p)) calculated from plots of t(s) vs I(R)/I(F) strongly decreased with decreasing device area. Bulk and perimeter components of average hole lifetimes were separated by plotting 1/tau(p) as a function of device perimeter-to- area ratio (P/A). This plot reveals that perimeter recombination is dominant in these devices, whose areas are all less than 1 sq mm. The bulk minority carrier (hole) lifetime extracted from the 1/tau(p) vs P/A plot is approximately 0.7 micro-s, well above the 60 ns to 300 ns average iit'eptimes obtained when perimeter recombination effects are ignored in the analysis. Given the fact that there has been little previous investigation of bipolar diode and transistor performance as a function of perimeter-to-area ratio, this work raises the possibility that perimeter recombination may be partly responsible for poor effective minority carrier lifetimes and limited performance obtained in many previous SiC bipolar junction devices.

Neudeck, Philip G.↗

Perimeter Governed Minority Carrier Lifetimes in 4H-SiC p+n Diodes Measured by Reverse Recovery Switching Transient Analysis

Minority carrier lifetimes in epitaxial 4H-SiC p-n junction diodes were measured via an analysis of reverse recovery switching characteristics. Behavior of reverse recovery storage time (t(sub s)) as a function of initial ON-state forward current (I(sub f)) and OFF-state reverse current (I(sub R)) followed well-documented trends which have been observed for decades in silicon p-n rectifiers. Average minority carrier (hole) lifetimes (tau(sub p)) calculated from plots of t(sub s) vs I(sub R)/I(sub F) strongly decreased with decreasing device area. Bulk and perimeter components of average hole lifetimes were separated by plotting tau(sub p) as a function of device perimeter-to-area ratio (P/A). This plot reveals that perimeter recombination is dominant in these devices, whose areas are all less than 1 square mm. The bulk minority carrier (hole) lifetime extracted from the 1/Tau(sub p) vs P/A plot is approximately 0.7 microns, well above the 60 ns to 300 ns average lifetimes obtained when perimeter recombination effects are ignored in the analysis. Given the fact that there has been little previous investigation of bipolar diode and transistor performance as a function of perimeter-to-area ratio, this work raises the possibility that perimeter recombination may be partly responsible for poor effective minority carrier lifetimes and limited performance obtained in many previous SiC bipolar junction devices.

Neudeck, Philip G.↗

Fluid & Thermal Analysis of a Manifold Microchannel Heat Sink

A three-dimensional (3-D) numerical model has been developed to study the fluid flow and heat transfer through a manifold-microchannel (MMC) heat sink, a microfluidic cooling system designed as a heat dissipation solution for compact, high-powered electronic systems. An MMC consists of a 3-D manifold structure that distributes working fluid through alternating inlet and outlet manifold channels that guide the fluid to and from the microchannels, shortening the flow length and thereby, reducing the pressure drop across the system. Wide bandgap semiconductors such as silicon carbide (SiC) are increasingly utilized due to their ability to enable smaller electronic devices and components to operate more efficiently at higher frequencies. These semiconductors can greatly benefit from the MMC, which can extract all the heat produced by compact, high-powered electronics, enabling them to achieve optimal performance. The MMC also utilizes an embedded cooling approach which allows for fabrication directly within SiC-based electronics, resulting in significant mass and weight savings and lower thermal resistance than conventional heat sink designs. This paper outlines the methods used to conduct fluid and thermal analysis of different MMC configurations for flow parameters such as flow rate and inlet flow conditions. This study involves both steady state and transient thermal analysis as a gradually increasing heat flux is applied to the system over time, which is representative of the heat dissipation from the electronics over a given period. Results from the analysis show that the MMC is capable of effectively dissipating heat flux of ~100 W/cm2 while maintaining considerably low pressure drop (< 1 kPa) and thermal resistance (< 1 K/W) for certain single-phase working fluids.

manifold microchannel↗

Fluid & Thermal Analysis of a Manifold Microchannel Heat Sink

A three-dimensional (3-D) numerical model has been developed to study the fluid flow and heat transfer through a manifold-microchannel (MMC) heat sink, a microfluidic cooling system designed as a heat dissipation solution for compact, high-powered electronic systems. An MMC consists of a 3-D manifold structure that distributes working fluid through alternating inlet and outlet manifold channels that guide the fluid to and from the microchannels, shortening the flow length and thereby, reducing the pressure drop across the system. Wide bandgap semiconductors such as silicon carbide (SiC) are increasingly utilized due to their ability to enable smaller electronic devices and components to operate more efficiently at higher frequencies. These semiconductors can greatly benefit from the MMC, which can extract all the heat produced by compact, high-powered electronics, enabling them to achieve optimal performance. The MMC also utilizes an embedded cooling approach which allows for fabrication directly within SiC-based electronics, resulting in significant mass and weight savings and lower thermal resistance than conventional heat sink designs. This paper outlines the methods used to conduct fluid and thermal analysis of different MMC configurations for flow parameters such as flow rate and inlet flow conditions. This study involves both steady state and transient thermal analysis as a gradually increasing heat flux is applied to the system over time, which is representative of the heat dissipation from the electronics over a given period. Results from the analysis show that the MMC is capable of effectively dissipating heat flux of ~100 W/cm2 while maintaining considerably low pressure drop (< 1 kPa) and thermal resistance (< 1 K/W) for certain single-phase working fluids.

manifold microchannel↗

FET Junction Temperature Monitoring Using Novel On-Chip Solution

A novel junction temperature monitoring sensor is proposed and experimentally demonstrated for application in MOS-gate power devices. The sensor is created using the polycide gate electrode layer of the devices to create a temperature-sensitive resistor without any additional fabrication steps. The resistor is located on the field oxide with one end grounded at the device reference terminal to isolate it from the device current and voltage transients. It allows in-situ monitoring of the device junction temperature during active circuit operation. The technology has been implemented to monitor the junction temperature of Silicon Carbide Junction Barrier Schottky Field Effect Transistors (SiC JBSFETs) with the bi-directional FET (BiDFET).

Bidirectional switches, SiC bidirectional FET, BiD↗

Influence of Polymorphism on the Electronic Structure of Ga 2 O 3

The search for new wide-band-gap materials is intensifying to satisfy the need for more advanced and energy-efficient power electronic devices. Ga 2 O 3 has emerged as an alternative to SiC and GaN, sparking a renewed interest in its fundamental properties beyond the main β-phase. Here, three polymorphs of Ga 2 O 3 , α, β, and ε, are investigated using X-ray diffraction, X-ray photoelectron and absorption spectroscopy, and ab initio theoretical approaches to gain insights into their structure–electronic structure relationships. Valence and conduction electronic structure as well as semicore and core states are probed, providing a complete picture of the influence of local coordination environments on the electronic structure. State-of-the-art electronic structure theory, including all-electron density functional theory and many-body perturbation theory, provides detailed understanding of the spectroscopic results. The calculated spectra provide very accurate descriptions of all experimental spectra and additionally illuminate the origin of observed spectral features. This paper provides a strong basis for the exploration of the Ga 2 O 3 polymorphs as materials at the heart of future electronic device generations.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

Device for steam cladding oxidation testing at TREAT

To compare the chemical degradation of conventional zirconium alloy (Zry) cladding to advance silicon carbide (SiC) cladding in a post loss of coolant accident (LOCA) environment, new nuclear testing capabilities are necessary. The Transient Reactor Test (TREAT) Facility at Idaho National Laboratory (INL) has matured its transient fuel testing capabilities since its 2017 restart. The most recent experiment architecture is the Transient Water Irradiation System in TREAT (TWIST), which is designed to support qualification of accident tolerant fuels in light water reactors. INL has designed and analyzed a natural circulation steam flow modification for TWIST to produce prototypic conditions of cladding oxidation. The in-situ device will be electrically heated to drive natural circulation. Moreover, the SiC cladding requires heating above 1700 °C to observe failure, thus internal prototypic nuclear heating with radiation effects will be used. Thermal hydraulic analysis with RELAP5-3D (Reactor Excursion and Leak Analysis Program) estimated steam fluxes greater than 50 mg cm −2 s −1 can be achieved. These fluxes are adequate to test Zry cladding according to draft regulatory guides and to test SiC cladding according to past experiments.

Oxidation↗

Lateral Movement of Screw Dislocations During Homoepitaxial Growth and Devices Yielded Therefrom Free of the Detrimental Effects of Screw Dislocations

The present invention is related to a method that enables and improves wide bandgap homoepitaxial layers to be grown on axis single crystal substrates, particularly SiC. The lateral positions of the screw dislocations in epitaxial layers are predetermined instead of random, which allows devices to be reproducibly patterned to avoid performance degrading crystal defects normally created by screw dislocations.

Philip G Neudeck↗

Bidirectional Three-phase Current Source Converter based Buck-boost AC/DC System using Bidirectional Switches

The 1.2 kV 4H-SiC BiDirectional Field Effect Transistor (BiDFET) is the first monolithic SiC bidirectional switch, which offers a lower voltage drop and semiconductor devices count alternative to the reverse-voltage-blocking (RB) switch used in the current-source converters (CSC). The bidirectional switch based CSC also allows DC-link current reversal for bidirectional power flow and provides multiple system-level benefits in a buck-boost AC/DC system consisting of buck-type DC/DC converter and CSC. This paper discusses the selection of buck converter duty cycle and CSC modulation index for the system’s buck-boost operation with a wide variation in DC voltage. CSC modulation schemes categorized based on the number of hard-turn-on transitions per switching cycle are also analyzed along with the three-step and four-step commutation schemes that are essential for the CSC commutation cells. Finally, the different schemes are evaluated and compared through the experimental results of a 10 kW, 480 VRMS, LL/ (400 − 800) V AC/DC system.

Bidirectional switches, four-quadrant switches, cu↗

Impact of proton irradiation on 4H-SiC Low Gain Avalanche Detectors (LGADs)

Silicon carbide (SiC) particle detectors have the potential to provide time resolutions and robust performance in extreme environments which exceed that of silicon detectors. In this work 4H-SiC low gain avalanche detectors (LGADs) and complementary PiN diodes were irradiated with 2.5 GeV protons at fluences up to 3.33 × 10 14 p/cm 2 . The electrostatic performance of both irradiated and non-irradiated devices was evaluated using I-V and C-V measurements. Moreover, charge collection measurements using α particles were also conducted. SiC LGADs displayed a loss in rectification, high ON-state resistances >10 10 Ω-cm 2 , and the complete removal of gain when exposed to the highest proton fluence. Additionally, the reductions in capacitance and OFF-state current pointed to compensation of the gain layer as a gain reducing mechanism. The introduction of radiation-induced defects also hinders carrier acceleration, which reduces impact ionization and further gain reduction. LGADs exposed to a fluence of 1 × 10 14 p/cm 2 experienced a partial recovery in gain (originally having a value of ∼ 2) with a value of ∼ 1.65 when applying a bias of 500 V. Charge trapping was also seen in the reduction of charge collection efficiency (CCE) to ∼ 65% for the PiN diode. However, despite the reduction in device performance, the demonstration of a measurable signal after irradiation points to the potential of SiC LGAD detectors for future high energy physics applications.

43 PARTICLE ACCELERATORS↗

Process-Induced Morphological Defects in Epitaxial CVD Silicon Carbide

Silicon carbide (SiC) semiconductor technology has been advancing rapidly, but there are numerous crystal growth problems that need to be solved before SiC can reach its full potential. Among these problems is a need for an improvement in the surface morphology of epitaxial films that are grown to produce device structures. Various processes before and during epilayer growth lead to the formation of morphological defects observed in SiC epilayers grown on SiC substrates. In studies of both 6H and 4H-SiC epilayers, atomic force microscopy (AFM) and other techniques have been used to characterize SiC epilayer surface morphology. In addition to the well-known micropipe defect, SiC epilayers contain growth pits, triangular features (primarily) in 4H-SiC, and macro step due to step bunching. In work at NASA Lewis, it has been found that factors contributing to the formation of some morphological defects include: defects in the substrate bulk, defects in the substrate surface caused by cutting and polishing the wafer, the tilt angle of the wafer surface relative to the basal plane, and growth conditions. Some of these findings confirm results of other research groups. This paper presents a review of published and unpublished investigations into processes that are relevant to epitaxial film morphology.

Powell, J. A.↗

Investigation of W-SiC compositionally graded films as a divertor material

W-SiC composite material is a promising plasma-facing material candidate alternative to pure W due to the low neutron activation, low impurity radiation, and low tritium diffusivity of SiC while leveraging the high erosion resistance of the W armor. Additionally, W and SiC have high thermomechanical compatibility given their similar thermal expansion rates. The present study addresses the synthesis and performance of compositionally graded W-SiC films fabricated by pulsed-DC magnetron sputtering. Compositional gradients were characterized using transmission electron microscopy (TEM) and energy-dispersive X-ray spectroscopy (EDS), and crystallographic information was obtained using electron diffraction and X-ray diffraction (XRD). Samples were exposed to L-mode deuterium plasma discharges in the DIII-D tokamak using the Divertor Material Evaluation System (DiMES). Post-mortem characterizations were performed using scanning electron microscopy (SEM) and XRD. Electron diffraction and XRD showed that the compositionally graded W-SiC films were composed of polycrystalline W and amorphous SiC with amorphous W+SiC interlayers. No macroscopic delamination or microstructural changes were observed under mild exposure conditions. Here, this study serves as a preliminary examination of W-SiC compositionally graded composites as a potential candidate divertor material in future tokamak devices.

36 MATERIALS SCIENCE↗

Optical waveguide formed by cubic silicon carbide on sapphire substrates

Optical confinement in beta silicon carbide (beta-SiC) thin films on sapphire substrate is demonstrated. Measurements are performed on waveguides formed by the mechanical transfer of thin beta-SiC films to sapphire. Recent results of epitaxial films of SiC on sapphire substrates attest to the technological viability of optoelectronic devices made from silicon carbide. Far-field mode patterns are shown. It is believed that this is the first step in validating a silicon carbide optoelectronic technology.

Tang, Xiao↗

Long-Term Characterization of 6H-SiC Transistor Integrated Circuit Technology Operating at 500 C

NASA has been developing very high temperature semiconductor integrated circuits for use in the hot sections of aircraft engines and for Venus exploration. This paper reports on long-term 500 C electrical operation of prototype 6H-SiC integrated circuits based on epitaxial 6H-SiC junction field effect transistors (JFETs). As of this writing, some devices have surpassed 4000 hours of continuous 500 C electrical operation in oxidizing air atmosphere with minimal change in relevant electrical parameters.

Neudeck, Philip G.↗