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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 253 records · Page 14
All sourcesNASA NTRSDOE OSTI
DOE OSTI2020

Analysis of GaAs Solar Cells Grown on 50 mm Wafers at 700 degrees C by Dynamic Hydride Vapor Phase Epitaxy

We grew and analyzed GaAs photovoltaics devices grown by dynamic hydride vapor phase epitaxy (D-HVPE) on 50 mm GaAs substrates. These were grown at 700 degrees C in a kinetically-limited growth regime. These devices exhibited nearly identical performance to our previous single-junction GaAs devices (>25% efficiency) that were grown at 650 degrees C in a transport-limited growth regime. We determined that the relatively low non-uniformity in device efficiency was not related to variations in structural characteristics, such as GaAs base thickness or Ga x In 1-x P composition or thickness, but rather uniformity of the absorber doping. These results show that growth of high quality material is possible in multiple growth regimes by D-HVPE.

14 SOLAR ENERGY↗
DOE OSTI2020

Mitigating Process Induced Degradation in p- and n-Czochralski Silicon Wafers with Tabula Rasa

We report on the bulk properties of of n- and p- type Czochralski silicon (Cz-Si) after a high-temperature annealing process known as Tabula Rasa (TR), which is primarily used to annihilate oxygen precipitates. We find significant differences in n- and p-type substrates as well as a strong dependence on the ambient in the resulting process induced degradation. We attribute this ambient dependence to either injection of interstitials or vacancies into the bulk during TR. Finally, we show that subsequent gettering is enhanced due to the annihilation of oxygen precipitates.

14 SOLAR ENERGY↗
DOE OSTI2021

Aligned 2D carbon nanotube liquid crystals for wafer-scale electronics

Semiconducting carbon nanotubes promise faster performance and lower power consumption than Si in field-effect transistors (FETs) if they can be aligned in dense arrays. Here, we demonstrate that nanotubes collected at a liquid/liquid interface self-organize to form two-dimensional (2D) nematic liquid crystals that globally align with flow. The 2D liquid crystals are transferred onto substrates in a continuous process generating dense arrays of nanotubes aligned within ±6°, ideal for electronics. Nanotube ordering improves with increasing concentration and decreasing temperature due to the underlying liquid crystal phenomena. The excellent alignment and uniformity of the transferred assemblies enable FETs with exceptional on-state current density averaging 520 μA μm -1 at only -0.6 V, and variation of only 19%. FETs with ion gel top gates demonstrate subthreshold swing as low as 60 mV decade -1 . Deposition across a 10-cm substrate is achieved, evidencing the promise of 2D nanotube liquid crystals for commercial semiconductor electronics.

42 ENGINEERING↗
DOE OSTI2021

Void-free Copper Electrodeposition in High Aspect Ratio, Full Wafer Thickness Through-Silicon Vias with Endpoint Detection

High density interconnects are required for increased input/output for microelectronics applications, incentivizing the development of Cu electrochemical deposition (ECD) processes for high aspect ratio through-silicon vias (TSVs). This work outlines Cu ECD processes for 62.5 μ m diameter TSVs, etched into a 625 μ m thick silicon substrate, a 10:1 aspect ratio. Cu ECD in high aspect ratio features relies on a delicate balance of electrolyte composition, solution replenishment, and applied voltage. Implementing a CuSO 4 -H 2 SO 4 electrolyte, which contains suppressor and a low chloride concentration, allows for a tunable relationship between applied voltage and localized deposition in the vias. A stepped potential waveform was applied to move the Cu growth front from the bottom of the via to the top. Sample characterization was performed through mechanical cross-sections and X-ray computed tomography (CT) scans. The CT scans revealed small seam voids in the Cu electrodeposit, and process parameters were tuned accordingly to produce void-free Cu features. During the voltage-controlled experiments, measured current data showed a characteristic current minimum, which was identified as an endpoint detection method for Cu deposition in these vias. We believe this is the first report of this novel endpoint detection method for TSV filling.

42 ENGINEERING↗