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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 253 records · Page 14
All sourcesNASA NTRSDOE OSTI
NASA NTRS2005

Improved Method of Manufacturing SiC Devices

The phrase, "common-layered architecture for semiconductor silicon carbide" ("CLASSiC") denotes a method of batch fabrication of microelectromechanical and semiconductor devices from bulk silicon carbide. CLASSiC is the latest in a series of related methods developed in recent years in continuing efforts to standardize SiC-fabrication processes. CLASSiC encompasses both institutional and technological innovations that can be exploited separately or in combination to make the manufacture of SiC devices more economical. Examples of such devices are piezoresistive pressure sensors, strain gauges, vibration sensors, and turbulence-intensity sensors for use in harsh environments (e.g., high-temperature, high-pressure, corrosive atmospheres). The institutional innovation is to manufacture devices for different customers (individuals, companies, and/or other entities) simultaneously in the same batch. This innovation is based on utilization of the capability for fabrication, on the same substrate, of multiple SiC devices having different functionalities (see figure). Multiple customers can purchase shares of the area on the same substrate, each customer s share being apportioned according to the customer s production-volume requirement. This makes it possible for multiple customers to share costs in a common foundry, so that the capital equipment cost per customer in the inherently low-volume SiC-product market can be reduced significantly. One of the technological innovations is a five-mask process that is based on an established set of process design rules. The rules provide for standardization of the fabrication process, yet are flexible enough to enable multiple customers to lay out masks for their portions of the SiC substrate to provide for simultaneous batch fabrication of their various devices. In a related prior method, denoted multi-user fabrication in silicon carbide (MUSiC), the fabrication process is based largely on surface micromachining of poly SiC. However, in MUSiC one cannot exploit the superior sensing, thermomechanical, and electrical properties of single-crystal 6H-SiC or 4H-SiC. As a complement to MUSiC, the CLASSiC five-mask process can be utilized to fabricate multiple devices in bulk single-crystal SiC of any polytype. The five-mask process makes fabrication less complex because it eliminates the need for large-area deposition and removal of sacrificial material. Other innovations in CLASSiC pertain to selective etching of indium tin oxide and aluminum in connection with multilayer metallization. One major characteristic of bulk micromachined microelectromechanical devices is the presence of three-dimensional (3D) structures. Any 3D recesses that already exist at a given step in a fabrication process usually make it difficult to apply a planar coat of photoresist for metallization and other subsequent process steps. To overcome this difficulty, the CLASSiC process includes a reversal of part of the conventional flow: Metallization is performed before the recesses are etched.

Okojie, Robert S.↗
DOE OSTI2024

Enhanced imaging of electronic hot spots using quantum squeezed light

Detecting electronic hot spots is important for understanding the heat dissipation and thermal management of electronic and semiconductor devices. Optical thermoreflective imaging is being used to perform precise temporal and spatial imaging of heat on wires and semiconductor materials. We apply quantum squeezed light to perform thermoreflective imaging on micro-wires, surpassing the shot-noise limit of classical approaches. We obtain a far-field temperature sensing accuracy of 42 mK after 50 ms of averaging and show that a 256×256 pixel image can be constructed with such sensitivity in 10 min. We can further obtain single-shot temperature sensing of 1.6 K after only 10 μs of averaging, enabling a dynamical study of heat dissipation. Not only do the quantum images provide accurate spatiotemporal information about heat distribution but also the measure of quantum correlation provides additional information, inaccessible by classical techniques, which can lead to a better understanding of the dynamics. We apply the technique to both aluminum and niobium microwires and discuss the applications of the technique in studying electron dynamics at low temperatures.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
NASA NTRS2003

Development of UItra-Low Temperature Motor Controllers: Ultra Low Temperatures Evaluation and Characterization of Semiconductor Technologies For The Next Generation Space Telescope

Electronics designed for low temperature operation will result in more efficient systems than room temperature. This improvement is a result of better electronic, electrical, and thermal properties of materials at low temperatures. In particular, the performance of certain semiconductor devices improves with decreasing temperature down to ultra-low temperature (-273 'C). The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical components and systems suitable for applications in deep space missions. Research is being conducted on devices and systems for use down to liquid helium temperatures (-273 'C). Some of the components that are being characterized include semiconductor switching devices, resistors, magnetics, and capacitors. The work performed this summer has focused on the evaluation of silicon-, silicon-germanium- and gallium-Arsenide-based (GaAs) bipolar, MOS and CMOS discrete components and integrated circuits (ICs), from room temperature (23 'C) down to ultra low temperatures (-263 'C).

Elbuluk, Malik E.↗
NASA NTRS1986

Investigation of advanced fault insertion and simulator methods

The cooperative agreement partly supported research leading to the open-literature publication cited. Additional efforts under the agreement included research into fault modeling of semiconductor devices. Results of this research are presented in this report which is summarized in the following paragraphs. As a result of the cited research, it appears that semiconductor failure mechanism data is abundant but of little use in developing pin-level device models. Failure mode data on the other hand does exist but is too sparse to be of any statistical use in developing fault models. What is significant in the failure mode data is that, unlike classical logic, MSI and LSI devices do exhibit more than 'stuck-at' and open/short failure modes. Specifically they are dominated by parametric failures and functional anomalies that can include intermittent faults and multiple-pin failures. The report discusses methods of developing composite pin-level models based on extrapolation of semiconductor device failure mechanisms, failure modes, results of temperature stress testing and functional modeling. Limitations of this model particularly with regard to determination of fault detection coverage and latency time measurement are discussed. Indicated research directions are presented.

Dunn, W. R.↗
NASA NTRS1973

Electrode materials for charge coupled devices

The use of polycrystalline silicon in charged coupled semiconductor devices is discussed. In particular, the electrical and optical properties of the material are characterized.

Gajda, W. T. J.↗
DOE OSTI2020

Graphite-Embedded High-Performance Insulated Metal Substrate for Wide-Bandgap Power Modules

Emerging wide-bandgap (WBG) semiconductor devices such as silicon carbide (SiC) metal–oxide semiconductor field-effect transistors (MOSFETs) and gallium nitride high-electron-mobility transistors can handle high power in reduced semiconductor areas better than conventional Si-based devices owing to superior material properties. With increased power loss density in a WBG-based converter and reduced die size in power modules, thermal management of power devices must be optimized for high performance. Here, we present a graphite-embedded insulated metal substrate (thermally-annealed-pyrolytic-graphite-embedded insulated metal substrate—IMSwTPG) designed for WBG power modules. Theoretical thermal performance analysis of graphite-embedded metal cores is presented, with design details for IMSwTPG with embedded graphite to replace a direct-bonded copper (DBC) substrate. The proposed IMSwTPG is compared with an aluminum nitride-based DBC substrate using finite-element thermal analysis for steady-state and transient thermal performance. The solutions’ thermal performances are compared under different coolant temperature and thermal loading conditions, and the proposed substrate's electrical performance is validated with static and dynamic characterization. Using graphite-embedded substrates, junction-to-case thermal resistance of SiC MOSFETs can be reduced up to 17%, and device current density can be increased by 10%, regardless of the thermal management strategy used to cool the substrate. Reduced transient thermal impedance of up to 40% of dies owing to increased heat capacity is validated in transient thermal simulations and experiments. The half-bridge power module's electrical performance is evaluated for on -state resistance, switching performance, and switching loss at three junction temperature conditions. The proposed substrate solution has minimal impact on conduction and switching performance of SiC MOSFETs.

42 ENGINEERING↗
DOE OSTI2024

Composition Quantification of SiGeSn Alloys Through Time-of-Flight Secondary Ion Mass Spectrometry: Calibration Methodologies and Validation With Atom Probe Tomography

Time-of-Flight Secondary Ion Mass Spectrometry (ToF-SIMS) is a powerful technique for elemental compositional analysis and depth profiling of materials. However, it encounters the problem of matrix effects that hinder its application. In this work, we introduce a pioneering ToF-SIMS calibration method tailored for SixGeySnz ternary alloys. SixGe1-x and Ge1-zSnz binary alloys with known compositions are used as calibration reference samples. Through a systematic SIMS quantification study of SiGe and GeSn binary alloys, we unveil a linear correlation between secondary ion intensity ratio and composition ratio for both SiGe and GeSn binary alloys, effectively mitigating the matrix effects. Extracted relative sensitivity factor (RSF) value from SixGe1-x (0.07 < x < 0.83) and Ge1-zSnz (0.066 < z < 0.183) binary alloys are subsequently applied to those of SixGeySnz (0.011 < x < 0.113, 0.863 < y < 0.935 and 0.023 < z < 0.103) ternary alloys for elemental compositions quantification. These values are cross-checked by Atom Probe Tomography (APT) analysis, an indication of the great accuracy and reliability of as-developed ToF-SIMS calibration process. Furthermore, the proposed method and its reference sample selection strategy in this work provide a low-cost as well as simple-to-follow calibration route for SiGeSn composition analysis, thus driving the development of next-generation multifunctional SiGeSn-related semiconductor devices.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Solution‐Processed CsPbBr 3 Quantum Dots/Organic Semiconductor Planar Heterojunctions for High‐Performance Photodetectors

Abstract Planar heterojunctions (PHJs) are fundamental building blocks for construction of semiconductor devices. However, fabricating PHJs with solution‐processable semiconductors such as organic semiconductors (OSCs) is a challenge. Herein, utilizing the orthogonal solubility and good wettability between CsPbBr 3 perovskite quantum dots (PQDs) and OSCs, fabrication of solution‐processed PQD/OSC PHJs are reported. The phototransistors based on bilayer PQD/PDVT‐10 PHJs show responsivity up to 1.64 × 10 4 A W −1 , specific detectivity of 3.17 × 10 12 Jones, and photosensitivity of 5.33 × 10 6 when illuminated by 450 nm light. Such high photodetection performance is attributed to efficient charge dissociation and transport, as well as the photogating effect in the PHJs. Furthermore, the tri‐layer PDVT‐10/PQD/Y6 PHJs are used to construct photodiodes working in self‐powered mode, which exhibit broad range photoresponse from ultraviolet to near‐infrared, with responsivity approaching 10 −1 A W −1 and detectivity over 10 6 Jones. These results present a convenient and scalable production processes for solution‐processed PHJs and show their great potential for optoelectronic applications.

36 MATERIALS SCIENCE↗
DOE OSTI2021

A Single Passive Gate-Driver for Series Connected Power Devices in DC Circuit Breaker Applications

This letter proposes a novel single passive gate driver solution based on passive devices to control series-connected power semiconductor devices for dc circuit breaker (DCCB) applications. The transient suppression devices (e.g., metal oxide varistors) are utilized to achieve natural voltage balancing among the series devices, while providing the discharge path of the gate capacitor of the upper devices. Here, the proposed method is very simple, cost effective and more compact compared with conventional voltage balancing method-based DCCBs. Besides, gate voltage oscillation during the voltage recovery process is mitigated by the addition of an extra gate capacitor. Simulation and experimental results are provided to verify the effectiveness of proposed method.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2024

A Scalable & Non-Destructive Characterization Strategy to Study Semiconductor/Dielectric Interfaces and Predict Wafer-Level Device Performance

The defect density present at the dielectric-semiconductor interface in an MOS structure directly influences the channel carrier characteristics in semiconductor devices, especially in wide bandgap material systems used in power devices. While these trap defects are typically quantified through electrical characterization of MOS-capacitor test structures, this treatment offers very little insight into the physical nature of interface defects. Such shortcomings demand a physical characterization strategy to guide fabrication optimization. X-ray photoelectron spectroscopy (XPS) is suggested as a viable technique to determine chemical data for dielectric interfaces formed using atomic layer deposition (ALD) on GaN substrates. Previously, 1-D XPS characterization has confirmed the presence of a Ga x O y interlayer between ALD dielectrics and the GaN substrate. In this work, XPS data is serially collected to form 2-D images of an ALD-Al 2 O 3 /GaN interface as a proof-of-concept experiment for in-situ XPS quality monitoring during ALD processing. The information provided by this work reveals some of the challenges for incorporating XPS characterization as an in-situ strategy during fabrication of GaN-based devices. Separately, electrical mapping of a 2-D array of ALD-Al 2 O 3 /GaN MOS-capacitor devices provide a means to quantify the spatial variations in interface quality across a single wafer. Physical characterization techniques, such as time-of-flight secondary ion mass spectroscopy, provide additional chemical information about the Al 2 O 3 /Ga x O y /GaN structure that complement the electrical mapping results. This analysis shows that a higher Ga x O y content correlates with higher interface state defects for trap energies deep in the band gap.

42 ENGINEERING↗
NASA NTRS1991

New materials and techniques for improved mm wave devices

Current research on microwave and mm wave three terminal semiconductor devices is summarized with particular attention given to the development of the pseudomorphic InGaAs modulation-doped field effect transistor (MODFET). Application of the high-indium-concentration MODFET grown on InP in the temperature range of 120-150 K is also described.

Alterovitz, Samuel A.↗
DOE OSTI2022

Power Electronics Materials and Bonded Interfaces - Reliability and Lifetime

Wide-bandgap devices have pushed the operational limit of semiconductor devices in automotive power electronics packages to higher temperatures (>200 C). While a higher efficiency can be achieved through the use of wide-bandgap devices, the entire package must be re-designed with components that can withstand the higher temperature limits. Sintered silver and transient liquid phase bonds are potential candidates as bonded materials for use in higher temperatures however, the underlying mechanics of deformation under thermal loads and the resulting failure mechanisms in these materials are not well understood. Accelerated experiments conducted at NREL reveal that high-lead solder joints have better reliability than sintered silver under extreme thermal cycling conditions. Furthermore, efforts to develop a crack propagation model for the high-temperature materials are described.

ADVANCED PROPULSION SYSTEMS↗