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Much has been written about the hardware to be used for Apollo mission support on the Manned Space Flight Network (MSFN). This article concerns itself with the software necessary to integrate hardware subsystems into a unique tool for mission control.
Short period lunar perturbation on satellites by computer program with Fortran statements, considering errors, program output and table driven algebraic processors
There were three major issues examined in the feasibility study. First, the ability of the proposed system architecture to support the anticipated workload was evaluated. Second, the throughput of the computational engine (the flow model processor) was studied using real application programs. Third, the availability, reliability, and maintainability of the system were modeled. The evaluations were based on the baseline systems. The results show that the implementation of the Numerical Aerodynamic Simulation Facility, in the form considered, would indeed be a feasible project with an acceptable level of risk. The technology required (both hardware and software) either already exists or, in the case of a few parts, is expected to be announced this year.
There were three major issues examined in the feasibility study. First, the ability of the proposed system architecture to support the anticipated workload was evaluated. Second, the throughput of the computational engine (the flow model processor) was studied using real application programs. Third, the availability reliability, and maintainability of the system were modeled. The evaluations were based on the baseline systems. The results show that the implementation of the Numerical Aerodynamic Simulation Facility, in the form considered, would indeed be a feasible project with an acceptable level of risk. The technology required (both hardware and software) either already exists or, in the case of a few parts, is expected to be announced this year. Facets of the work described include the hardware configuration, software, user language, and fault tolerance.
The atmospheric emissions photometric imaging experiment (AEPI) to be flown on Spacelab 1 is designed to study faint natural and artificial atmospheric emission phenomena. Optical emissions are imaged in the region 2150 A to 7320 A using a television system consisting of two optical channels, one wide-angle and one telephoto. The detection system is an image-enhanced SEC vidicon. A third optical channel images onto the photocathode of a microchannel plate photomultiplier tube that has 100 discrete anodes. Photons are counted for each discrete anode, providing a direct measure of the luminosity of an object viewed by the TV telephoto lens, albeit with low spatial resolution. The AEPI detector is mounted on a two-axis gimbal comprised of a Modified Apollo Telescope Mount Star Tracker (MAST), which provides experiment pointing over a 40-deg x 80-deg range, exclusive of restrictions due to the proximity of other experiments. The pointing stability is 1 arcmin with respect to the spacecraft coordinate system for an exposure of 1 second. The tracking capability is 3.5 deg/s with a stability of 1 arcmin. The detector and pointing system are located on the Spacelab pallet. The experiment is controlled by stored programs resident in the Dedicated Experiment Processor located in the Spacelab module.
Strain redistribution corrections were developed for a simplified inelastic analysis procedure to economically calculate material cyclic response at the critical location of a structure for life prediction proposes. The method was based on the assumption that the plastic region in the structure is local and the total strain history required for input can be defined from elastic finite-element analyses. Cyclic stress-strain behavior was represented by a bilinear kinematic hardening model. The simplified procedure predicts stress-strain response with reasonable accuracy for thermally cycled problems but needs improvement for mechanically load-cycled problems. Neuber-type corrections were derived and incorporated in the simplified procedure to account for local total strain redistribution under cyclic mechanical loading. The corrected simplified method was used on a mechanically load-cycled benchmark notched-plate problem. The predicted material response agrees well with the nonlinear finite-element solutions for the problem. The simplified analysis computer program was 0.3% of the central processor unit time required for a nonlinear finite-element analysis.
Critical gas turbine engine hot section components such as blades, vanes, and combustor liners tend to develop minute cracks during early stages of operations. The ability of currently available path-independent (P-I) integrals to correlate fatigue crack propagation under conditions that simulate the turbojet engine combustor liner environment was determined. To date, an appropriate specimen design and a crack displacement measurement method were determined. Alloy 718 was selected as the analog material based on its ability to simulate high temperature behavior at lower temperatures in order to facilitate experimental measurements. Available P-I integrals were reviewed and the best approaches are being programmed into a finite element post processor for eventual comparison with experimental data. The experimental data will include cyclic crack growth tests under thermomechanical conditions, and, additionally, thermal gradients.
Systems, apparatuses, and methods for cache management based on access type priority are disclosed. A system includes at least a processor and a cache. During a program execution phase, certain access types are more likely to cause demand hits in the cache than others. Demand hits are load and store hits to the cache. A run-time profiling mechanism is employed to find which access types are more likely to cause demand hits. Based on the profiling results, the cache lines that will likely be accessed in the future are retained based on their most recent access type. The goal is to increase demand hits and thereby improve system performance. An efficient cache replacement policy can potentially reduce redundant data movement, thereby improving system performance and reducing energy consumption.
Implementation of challenging Exploration Systems Missions Directorate objectives and strategies can be constrained by onboard computing capabilities and power efficiencies. The Radiation Hardened Electronics for Space Environments (RHESE) High Performance Processors for Space Environments project will address this challenge by significantly advancing the sustained throughput and processing efficiency of high-per$ormance radiation-hardened processors, targeting delivery of products by the end of FY12.
Large scale cargo transportation to support human missions to the Moon and Mars will require very high power Solar Electric Propulsion (SEP) systems operating between 200 and 400 kW. Aerojet Rocketdyne's NextSTEP program is developing and demonstrating a 100 kW EP system, the XR-100, using a Nested Hall Thruster (NHT) designed for powers up to 200 kW, a modular power processor and a modular flow controller. The three year program objective is to operate the integrated EP system continuously at 100 kW for 100 h, advancing this very high power Electric Propulsion (EP) system to Technology Readiness Level (TRL) 5. With our University of Michigan, Jet Propulsion Laboratory and NASA Glenn Research Center teammates, Aerojet Rocketdyne has completed the initial phase of the program, including operating the thruster at up to 30 kW to validate the thermal models and developing and operating multiple power processor modules in the required seriesparallel configuration. The current phase includes completing a TRL 4 integrated system test at reduced power to validate all system operating phases. Design upgrades to demonstrate the TRL 5 capabilities are underway. This paper will present the high power XR-100 capabilities, overall program and design approach and the latest test results for the 100 kW EP system demonstration program.
The SOUP instrument is designed to obtain diffraction-limited digital images of the sun with high photometric accuracy. The Video Processor originated from the requirement to provide onboard real-time image processing, both to reduce the telemetry rate and to provide meaningful video displays of scientific data to the payload crew. This original concept has evolved into a versatile digital processing system with a multitude of other uses in the SOUP program. The central element in the Video Processor design is a 16-bit central processing unit based on 2900 family bipolar bit-slice devices. All arithmetic, logical and I/O operations are under control of microprograms, stored in programmable read-only memory and initiated by commands from the LSI-11. Several functions of the Video Processor are described, including interface to the High Rate Multiplexer downlink, cosmetic and scientific data processing, scan conversion for crew displays, focus and exposure testing, and use as ground support equipment.
Recently there has been interest in the incorporation of core Flight Systems (cFS) with Spacecraft Onboard Interface Services (SOIS) Electronic Data Sheets (EDS) in the spaceflight software community. The Regenerative Fuel Cell project at the Glenn Research Center is using cFS architecture with EDS support for its monitoring and control software. The presentation will outline the benefits to using cFS with EDS support: First, EDS establishes a single source of truth for the definitions of data structures used throughout an entire mission that may otherwise be programmed in different languages and designed with different processor architectures. Not only does this help with inter-application communication via the software bus, but it also greatly simplifies communication between systems. An EDS Application Programming Interface (API) library allows the conversion of EDS data structures to and from native data structures. Second, bindings for other programming languages (e.g. Lua, Python, JSON) have been written to allow the creation and manipulation of EDS data objects within those languages. The RFC project uses Lua scripts to automatically generate binary configuration files at build time to be loaded into our cFS programs. We also use Python bindings in a graphical user interface (GUI) to allow an operator to send commands and view telemetry messages sent from cFS instances. Finally, using Lua scripts we can set up specific simulation scenarios to perform automatic functional testing. During the development of the RFC software, the software team put together a generic python GUI called “cFS-EDS-GroundStation” that provides a basic interface to an instance of cFS with EDS support. The GUI includes a basic telecommand and telemetry system that reads directly from the generated EDS databases. In the telecommand system, dropdown menus are populated with all user commands that are defined in EDS. In the telemetry system, telemetry messages are automatically decoded, written to the screen, and saved to a binary file. Additional Python scripts have been written to convert the binary data files into a comma separated value (CSV) format for further processing. We will demonstrate the basic use of the cFS-EDS-GroundStation software including adding additional commands and telemetry payload values in EDS and see them appear automatically in the cFS-EDS-Groundstation software. About the RFC project: The Regenerative Fuel Cell project is tasked with developing and demonstrating a power system consisting of a fuel cell and electrolyzer to provide power during a lunar day/night cycle. During the night, the fuel cell takes Hydrogen and Oxygen gasses and converts them into electricity, water, and heat. During the day, the electrolyzer takes input power (e.g. from a photovoltaic array) and converts water back into Hydrogen and Oxygen gasses.
An experimental facility is described which allows new computer communications techniques to be tested under conditions closely approximating those of real systems. A three-processor minicomputer configuration is used to achieve real-time operation at channel transmission rates of up to 50 Kbits per second. One processor runs a channel controller-concentrator program, a second is dedicated to simulation of the communication channel characteristics, and the third to the simulation of up to 1000 user terminals. The latter are divided into classes consisting of interactive time-sharing users of differing characteristics and file nodes, mixed in different proportions. Real user nodes are connected to the channel simulator processor, providing experience with actual operating characteristics under different channel loadings.
The need for computing power has forced a migration from serial computation on a single processor to parallel processing on multiprocessors. However, without effective means to monitor (and analyze) program execution, tuning the performance of parallel programs becomes exponentially difficult as program complexity and machine size increase. The recent introduction of performance tuning tools from various supercomputer vendors (Intel's ParAide, TMC's PRISM, CSI'S Apprentice, and Convex's CXtrace) seems to indicate the maturity of performance tool technologies and vendors'/customers' recognition of their importance. However, a few important questions remain: What kind of performance bottlenecks can these tools detect (or correct)? How time consuming is the performance tuning process? What are some important technical issues that remain to be tackled in this area? This workshop reviews the fundamental concepts involved in analyzing and improving the performance of parallel and heterogeneous message-passing programs. Several alternative strategies will be contrasted, and for each we will describe how currently available tuning tools (e.g., AIMS, ParAide, PRISM, Apprentice, CXtrace, ATExpert, Pablo, IPS-2)) can be used to facilitate the process. We will characterize the effectiveness of the tools and methodologies based on actual user experiences at NASA Ames Research Center. Finally, we will discuss their limitations and outline recent approaches taken by vendors and the research community to address them.
Superscalar processors can achieve increased performance by issuing instructions out-of-order from the original sequential instruction stream. Implementing an out-of-order instruction issue policy requires a hardware mechanism to prevent incorrectly executed instructions from updating register values. A reorder buffer can be used to allow a superscalar processor to issue instructions out-of-order and maintain program correctness. This paper describes the design and implementation of a 20MHz CMOS reorder buffer for superscalar processors. The reorder buffer is designed to accept and retire two instructions per cycle. A full-custom layout in 1.2 micron has been implemented, measuring 1.1058 mm by 1.3542 mm.
This report documents the preliminary design for a military fixed-base power system of 3 MWe nominal capacity using Westinghouse's tubular Solid Oxide Fuel Cell [SOFC] and Haldor Topsoe's logistic fuels processor [LFP]. The LFP provides to the fuel cell a methane rich sulfur free fuel stream derived from either DF-2 diesel fuel, or JP-8 turbine fuel. Fuel cells are electrochemical devices that directly convert the chemical energy contained in fuels such as hydrogen, natural gas, or coal gas into electricity at high efficiency with no intermediate heat engine or dynamo. The SOFC is distinguished from other fuel cell types by its solid state ceramic structure and its high operating temperature, nominally 1000'C. The SOFC pioneered by Westinghouse has a tubular geometry closed at one end. A power generation stack is formed by aggregating many cells in an ordered array. The Westinghouse stack design is distinguished from other fuel cell stacks by the complete absence of high integrity seals between cell elements, cells, and between stack and manifolds. Further, the reformer for natural gas [predominantly methane] and the stack are thermally and hydraulically integrated with no requirement for process water. The technical viability of combining the tubular SOFC and a logistic fuels processor was demonstrated at 27 kWe scale in a test program sponsored by the Advanced Research Projects Agency [ARPA) and carried out at the Southern California Edison's [SCE] Highgrove generating station near San Bernardino, California in 1994/95. The LFP was a breadboard design supplied by Haldor Topsoe, Inc. under subcontract to Westinghouse. The test program was completely successful. The LFP fueled the SOFC for 766 hours on JP-8 and 1555 hours of DF-2. In addition, the fuel cell operated for 3261 hours on pipeline natural gas. Over the 5582 hours of operation, the SOFC generated 118 MVVH of electricity with no perceptible degradation in performance. The LFP processed military specification JP-8 and DF-2 removing the sulfur and reforming these liquid fuels to a methane rich gaseous fuel. Results of this program are documented in a companion report titled 'Final Report-Solid Oxide Fuel Cell/ Logistic Fuels Processor 27 kWe Power System'.
A computer program that preprocesses multispectral image data has been developed to provide the Mars Exploration Rover (MER) mission with a means of exploiting the additional correlation present in such data without appreciably increasing the complexity of compressing the data.
An automatic differentiation tool (ADIFOR) is incorporated into a finite element based structural analysis program for shape and non-shape design sensitivity analysis of structural systems. The entire analysis and sensitivity procedures are parallelized and vectorized for high performance computation. Small scale examples to verify the accuracy of the proposed program and a medium scale example to demonstrate the parallel vector performance on multiple CRAY C90 processors are included.