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Results for “multiplexing”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 253 records · Page 14
All sourcesNASA NTRSDOE OSTI
NASA NTRS1969

A fundamental multiplexer theorem.

Multiplexer network synthesis based on arbitrary divisibility of frequency range and obtainability of input impedance at all frequencies

Grayzel, A. I.↗
NASA NTRS1970

Multiplex data bus techniques

Multiplex data bus subsystem for improving reliability and reducing weight of space shuttle avionics system

Frost, W. O.↗
NASA NTRS1971

A frequency division multiplex technique for transmitting commands

Reliable random access multiplexer is controlled and operated over two twisted-pair telephone lines at distances of 5.6 to 8.0 km with control signals of less than 10 volts rms. Technique adapts to any process or environmental control system where data source is necessary.

Brey, H.↗
NASA NTRS1971

Television multiplexing system

TV multiplexing and broadband multichannel real time telemetry data transmission without loss between Kennedy Space Center and ground station for computer operation

Bruckner, B. G.↗
NASA NTRS1971

Analog tree-organized multiplexer

An analog tree-organized multiplexer (ATOM) which is intended for use in the telemetry system of an interplanetary spacecraft is designed. The ATOM will be fabricated by a monolithic, dielectric isolation process, and will contain silicon junction field effect transistors (JFET) as the active elements. The effect of the radiation environment on the performance of the ATOM is analyzed. The result indicates that the expected radiation environment will cause only minor changes in the preradiation characteristics of ATOM. The JFET in the ATOM is designed to meet the electrical requirements when fabricated by either the double poly-dielectric isolation process or the raised dielectric isolation process. The effect of the heat treatment required for the dielectric isolation process on the diffusion profile of the JFET is described. The layout of the ATOM circuit for fabrication by either the double poly or raised dielectric isolation process is also given.

Crabbe, J. S.↗
NASA NTRS1971

Design, development, fabrication and delivery of register and multiplexer units

Two complementary MOS monolithic chip types were developed, which contain a register and multiplexer unit to be used in the central processing unit of a digital computer. The partition of the logic into a chip size consistent with the characteristics of the packages is discussed. The logic was implemented by specially configured circuitry designed to layout, as well as to optimize, performance by taking advantage of the properties of CMOS logic. Of several approaches considered for generating LSI CMOS arrays, the CMOS standard cell array design technique was selected. These design automation techniques were used to generate the chip layout, art work and working master plates, followed by the fabrication and testing of the two chip types. Sixty functional LSI arrays were delivered.

Feller, A.↗