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At least 253 records · Page 14

NEPP DDR Device Reliability FY13 Report

This document reports the status of the NEPP Double Data Rate (DDR) Device Reliability effort for FY2013. The task targeted general reliability of > 100 DDR2 devices from Hynix, Samsung, and Micron. Detailed characterization of some devices when stressed by several data storage patterns was studied, targeting ability of the data cells to store the different data patterns without refresh, highlighting the weakest bits. DDR2, Reliability, Data Retention, Temperature Stress, Test System Evaluation, General Reliability, IDD measurements, electronic parts, parts testing, microcircuits

Guertin, Steven M.↗

Implications of Weak Link Effects on Thermal Characteristics of Transition-Edge Sensors

Weak link behavior in transition-edge sensor (TES) devices creates the need for a more careful characterization of a device's thermal characteristics through its transition. This is particularly true for small TESs where a small change in the measurement current results in large changes in temperature. A highly current-dependent transition shape makes accurate thermal characterization of the TES parameters through the transition challenging. To accurately interpret measurements, especially complex impedance, it is crucial to know the temperature-dependent thermal conductance, G(T), and heat capacity, C(T), at each point through the transition. We will present data illustrating these effects and discuss how we overcome the challenges that are present in accurately determining G and T from IV curves. We will also show how these weak link effects vary with TES size.

Bailey, Catherine↗

Cross-Cutting Metrology Tools for In Operando Characterization of Carrier Dynamics in Photovoltaic Devices (Final Technical Report)

Understanding the nature of recombination and its dependence on defects and interfaces is essential for engineering materials and contacts for higher V oc and photovoltaic (PV) efficiency. Time-resolved photoluminescence (TRPL) has conventionally been used to evaluate recombination, but not all materials are strongly emissive or otherwise suitable. Time-resolved terahertz spectroscopy is a pump – probe method that presents valuable complementary information, wherein an optical pump pulse photoexcites carriers within the absorber and the transient photoconductivity is probed with a terahertz pulse. Until now, experimental constraints have prohibited the use of terahertz probes to interrogate full device stacks, and measurements were instead made on exfoliated films or films grown on unconventional substrates. However, interfaces are critical to the behavior of photoexcited carriers in solar cells, and the substrates themselves often influence the film growth and bulk properties. Therefore, it is important to probe the behavior of PV absorbers as close as possible to their normal operating conditions. Here we have developed cross-cutting metrology that enable in operando characterization of carrier dynamics and recombination mechanisms in working PV devices. Through a combination of complementary non-contact TRTS and TRPL experiments and modeling, we have obtained key parameters including photoexcited carrier bulk lifetime and interface and back surface recombination velocities with greater precision and accuracy than can be achieved with conventional TRPL alone. By varying pulsed photoexcitation conditions, the contributions of interface and bulk recombination mechanisms can be determined. We have developed and refined this characterization approach by investigating CdTe PVs, which is a well-established technology but with significant margin for further improvements in efficiency. Results were published in Journal of Applied Physics (DOI: 10.1063/5.0064730) and Proceedings of the IEEE PVSC (DOI: 10.1109/PVSC43889.2021.9518559). After validating the approach, we have applied it to correlate recombination rates to processing conditions and material properties, including composition and defects as well as interfaces and surface treatments. Such feedback can inform processing and design choices to enable higher PV efficiency, not only for CdTe, but also CdSe x Te 1-x , CIGS, perovskites, kesterites, and future technologies. A perspective on predicting solar cell performance from terahertz spectroscopy was published in Advanced Energy Materials (DOI: 10.1002/aenm.202102776). The cross-cutting metrology tools developed here will enable determination of the locus and mechanism of performance-limiting recombination in thin film PV devices. This feedback can guide the engineering of PV devices with higher V oc and efficiency, thereby leading to reductions in levelized cost of electricity to meet the SunShot 2030 target of $0.03/kWh for utility-scale PV. Lower costs will enable rapid expansion of renewable electricity generation that is nearly free of carbon emissions. Reducing carbon emissions of the electricity sector is one of the most important solutions to climate change. The project’s specific focus on CdTe PV can benefit First Solar, the US company that is the global leader in CdTe technology, through both technology and workforce development.

14 SOLAR ENERGY↗

Multiparameter laser performance characterization of liquid crystals for polarization control devices in the nanosecond regime

Abstract Interactions of liquid crystals (LC’s) with polarized light have been studied widely and have spawned numerous device applications, including the fabrication of optical elements for high-power and large-aperture laser systems. Currently, little is known about both the effect of incident polarization state on laser-induced–damage threshold (LIDT) and laser-induced functional threshold (LIFT) behavior at sub-LIDT fluences under multipulse irradiation conditions. This work reports on the first study of the nanosecond-pulsed LIDT’s dependence on incident polarization for several optical devices employing oriented nematic and chiral-nematic LC’s oriented by surface alignment layers. Accelerated lifetime testing was also performed to characterize the ability of these devices to maintain their functional performance under multipulse irradiation as a function of the laser fluence at both 1053 nm and 351 nm. Results show that the LIDT varies as a function of input polarization by 30–80% within the same device, while the multipulse LIFT (which can differ from the nominal LIDT) depends on irradiation conditions such as laser fluence and wavelength.

47 OTHER INSTRUMENTATION↗

High-temperature superconducting superconductor/normal metal/superconducting devices

We describe the fabrication and characterization of superconductor/normal metal/superconductor (SNS) devices made with the high-temperature superconductor (HTS) YBa2Cu3O(7-x). Structures of YBa2Cu3O(7-x)/Au/Nb on c-axis-oriented YBa2Cu3O(7-x) were made in both sandwich and edge geometries in order to sample the HTS material both along and perpendicular to the conducting a-b planes. These devices display fairly ideal Josephson properties at 4.2 K. In addition, devices consisting of YBa2Cu3O(7-x)/YBa2Cu3O(y)/YBa2Cu3O(7-x), with a 'normal metal' layer of reduced transition temperature YBa2Cu3O(7-x) were fabricated and show a great deal of promise for applications near 77 K. Current-voltage characteristics like those of the Resistively-Shunted Junction model are observed, with strong response to 10 GHz radiation above 60 K.

Foote, M. C.↗

APS-Workshop on Characterization of MMIC (Monolithic Microwave Integrated Circuit) Devices for Array Antenna

The IEEE AP-S ADCOM is attempting to expand its educational, tutorial and information exchange activities as a further benefit to all members. To this end, ADCOM will be forming specialized workshops on topics of interest to its members. The first such workshop on Characterization and Packaging of MMIC Devices for Array Antennas was conceived. The workshop took place on June 13, 1986 as part of the 1986 International Symposium sponsored by IEEE AP-S and URSI in Philadelphia, PA, June 9-13, 1986. The workshop was formed to foster the interchange of ideas among MMIC device users and to provide a forum to collect and focus information among engineers experienced and interested in the topic. After brief presentations by the panelists and comments from attendees on several subtopics, the group was divided into working committees. Each committee evaluated and made recommendations on one of the subtopics.

Smetana, Jerry↗

NEPP non-volatile memory : FY09 summary report

This report documents the activities and results of the fiscal year 2009 (FY09) funding for the NASA Electronic Parts and Packaging (NEPP) program for non-volatile memory (NVM) devices. The FY09 task was divided into two main efforts: 1. Development of in-house measurement capability for flash devices 2. Reliability characterization of multi-level vs. single-level flash devices The FY09 NEPP Non Volatile Memory study was organized into these two sections in recognition of the continued and increasing importance of NVM to NASA. All NASA missions use NVM for boot code storage and some limited data archiving. Space-grade NVM has lagged commercial NVM development by many orders of magnitude, however. This gap in density only continues to increase as space-grade memories remain constant in the 1–16 Mbit levels, while commercial flash-based devices shrink in size and double in capacity every 18 months. Commercial flash devices are now at the 32 Gbit level, 10,000 times denser than current NASA NVM. This FY marks the beginning of a significant technological transition in NVM for NASA. The aggressive scaling of commercial NVMs has, as a by-product, made some of the flash devices radiation-tolerant enough to be at least considered for low-level radiation environment missions [Irom 2008]. This NEPP task is focused on understanding the reliability and potential future applications of such highly scaled flash memories.

Heidecker, Jason↗

X-ray topography characterization of gallium nitride substrates for power device development

Gallium nitride substrates grown by the hydride vapor phase epitaxy (HVPE) method using a patterned growth process have been characterized by synchrotron monochromatic beam X-ray topography in the grazing incidence geometry. Images reveal a starkly heterogeneous distribution of dislocations with areas as large as 0 3 mm 2 containing threading dislocation densities below 10 3 cm -2 in between a grid of strain centers with higher threading dislocation densities (> 10 4 cm -2 ). Basal plane dislocation densities in these areas are as low as 104 cm -2 . By comparing the recorded images of dislocations with ray tracing simulations of expected dislocations in GaN, the Burgers vectors of the dislocations have been determined. The distribution of threading screw/mixed dislocations (TSDs/TMDs), threading edge dislocations (TEDs) and basal plane dislocations (BPDs) is discussed with implications for fabrication of power devices.

36 MATERIALS SCIENCE↗

Feasibility of Passive MOSFET Paralleling for Photovoltaic Current-Voltage Curves

Current-voltage curves are an important method of characterizing Photovoltaic (PV) Modules. NREL has developed several low-cost MOSFET-based devices that can characterize PV cells and modules. The size of PV modules that can be measured is limited by the power limitations of a single MOSFET. By using multiple MOSFET devices, each can operate at a lower current, paralleled on resistance is also decreased allowing for higher power loads. Operating multiple devices in parallel can cause an imbalance in current, thus causing some devices to conduct more, pushing them into a thermal runaway condition. To investigate this, an active feedback circuit was tested with paralleled devices using a PV module load. The efficacy, limitations, and design considerations of using parallel MOSFET loads for PV characterization are explored. This work is not new, but the implementation of a paralleled architecture in a low cost characterization tool is novel.

14 SOLAR ENERGY↗

FY12 End of Year Report for NEPP DDR2 Reliability

This document reports the status of the NEPP Double Data Rate 2 (DDR2) Reliability effort for FY2012. The task expanded the focus of evaluating reliability effects targeted for device examination. FY11 work highlighted the need to test many more parts and to examine more operating conditions, in order to provide useful recommendations for NASA users of these devices. In order to develop these approaches, it is necessary to develop test capability that can identify reliability outliers. To do this we must test many devices to ensure outliers are in the sample, and we must develop characterization capability to measure many different parameters. For FY12 we increased capability for reliability characterization and sample size. We increased sample size by moving from loose devices to DIMMs with an approximate reduction of 20 to 50 times in terms of per DUT cost. By increasing sample size we have improved our ability to characterize devices that may be considered reliability outliers. This report provides an update on the effort to improve DDR2 testing capability. Although focused on DDR2, the methods being used can be extended to DDR and DDR3 with relative ease.

temperature stress↗

A Novel, Free-Space Optical Interconnect Employing Vertical-Cavity Surface Emitting Laser Diodes and InGaAs Metal-Semiconductor-Metal Photodetectors for Gbit/s RF/Microwave Systems

Emerging technologies and continuing progress in vertical-cavity surface emitting laser (VCSEL) diode and metal-semiconductor-metal (MSM) photodetector research are making way for novel, high-speed forms of optical data transfer in communication systems. VCSEL diodes operating at 1550 nm have only recently become commercially available, while MSM photodetectors are pushing the limits of contact lithography with interdigitated electrode widths reaching sub micron levels. We propose a novel, free-space optical interconnect operating at about 1Gbit/s utilizing VCSEL diodes and MSM photodetectors. We report on development, progress, and current work, which are as follows: first, analysis of the divergent behavior of VCSEL diodes for coupling to MSM photodetectors with a 50 by 50 m active area and second, the normalized frequency response of the VCSEL diode as a function of the modulating frequency. Third, the calculated response of MSM photodetectors with varying electrode width and spacing on the order of 1 to 3 m as well as the fabrication and characterization of these devices. The work presented here will lead to the formation and characterization of a fully integrated 1Gbit/s free-space optical interconnect at 1550 nm and demonstrates both chip level and board level functionality for RF/microwave digital systems.

Savich, Gregory R.↗

On-wafer, cryogenic characterization of ultra-low noise HEMT devices

Significant advances in the development of high electron-mobility field-effect transistors (HEMT's) have resulted in cryogenic, low-noise amplifiers (LNA's) whose noise temperatures are within an order of magnitude of the quantum noise limit (hf/k). Further advances in HEMT technology at cryogenic temperatures may eventually lead to the replacement of maser and superconducting insulator superconducting front ends in the 1- to 100-GHz frequency band. Key to identification of the best HEMT's and optimization of cryogenic LNA's are accurate and repeatable device measurements at cryogenic temperatures. This article describes the design and operation of a cryogenic coplanar waveguide probe system for the characterization and modeling of advanced semiconductor transistors at cryogenic temperatures. Results on advanced HEMT devices are presented to illustrate the utility of the measurement system.

Bautista, J. J.↗

FY12 End of Year Report for NEPP DDR2 Reliability

This document reports the status of the NASA Electronic Parts and Packaging (NEPP) Double Data Rate 2 (DDR2) Reliability effort for FY2012. The task expanded the focus of evaluating reliability effects targeted for device examination. FY11 work highlighted the need to test many more parts and to examine more operating conditions, in order to provide useful recommendations for NASA users of these devices. This year's efforts focused on development of test capabilities, particularly focusing on those that can be used to determine overall lot quality and identify outlier devices, and test methods that can be employed on components for flight use. Flight acceptance of components potentially includes considerable time for up-screening (though this time may not currently be used for much reliability testing). Manufacturers are much more knowledgeable about the relevant reliability mechanisms for each of their devices. We are not in a position to know what the appropriate reliability tests are for any given device, so although reliability testing could be focused for a given device, we are forced to perform a large campaign of reliability tests to identify devices with degraded reliability. With the available up-screening time for NASA parts, it is possible to run many device performance studies. This includes verification of basic datasheet characteristics. Furthermore, it is possible to perform significant pattern sensitivity studies. By doing these studies we can establish higher reliability of flight components. In order to develop these approaches, it is necessary to develop test capability that can identify reliability outliers. To do this we must test many devices to ensure outliers are in the sample, and we must develop characterization capability to measure many different parameters. For FY12 we increased capability for reliability characterization and sample size. We increased sample size this year by moving from loose devices to dual inline memory modules (DIMMs) with an approximate reduction of 20 to 50 times in terms of per device under test (DUT) cost. By increasing sample size we have improved our ability to characterize devices that may be considered reliability outliers. This report provides an update on the effort to improve DDR2 testing capability. Although focused on DDR2, the methods being used can be extended to DDR and DDR3 with relative ease.

Guertin, Steven M.↗

Characterization of Si (sub X)Ge (sub 1-x)/Si Heterostructures for Device Applications Using Spectroscopic Ellipsometry

Spectroscopic ellipsometry (SE) characterization of several complex Si (sub X)Ge (sub 1-x)/Si heterostructures prepared for device fabrication, including structures for heterojunction bipolar transistors (HBT), p-type and n-type heterostructure modulation doped field effect transistors, has been performed. We have shown that SE can simultaneously determine all active layer thicknesses, Si (sub X)Ge (sub 1-x) compositions, and the oxide overlayer thickness, with only a general knowledge of the structure topology needed a priori. The characterization of HBT material included the SE analysis of a Si (sub X)Ge (sub 1-x) layer deeply buried (600 nanometers) under the silicon emitter and cap layers. In the SE analysis of n-type heterostructures, we examined for the first time a silicon layer under tensile strain. We found that an excellent fit can be obtained using optical constants of unstrained silicon to represent the strained silicon conduction layer. We also used SE to measure lateral sample homogeneity, providing quantitative identification of the inhomogeneous layer. Surface overlayers resulting from prior sample processing were also detected and measured quantitatively. These results should allow SE to be used extensively as a non-destructive means of characterizing Si (sub X)Ge (sub 1-x)/Si heterostructures prior to device fabrication and testing.

Sieg, R. M.↗

Method and apparatus for characterizing propagation delays of integrated circuit devices

Propagation delay of a signal through a channel is measured by cyclically generating a first step-wave signal for transmission through the channel to a two-input logic element and a second step-wave signal with a controlled delay to the second input terminal of the logic element. The logic element determines which signal is present first at its input terminals and stores a binary signal indicative of that determination for control of the delay of the second signal which is advanced or retarded for the next cycle until both the propagation delayed first step-wave signal and the control delayed step-wave signal are coincident. The propagation delay of the channel is then determined by measuring the time between the first and second step-wave signals out of the controlled step-wave signal generator.

Blaes, Brent R.↗

High-Throughput Processes and Structural Characterization of Single-Nanotube Based Devices for 3D Electronics

We have developed manufacturable approaches to form single, vertically aligned carbon nanotubes, where the tubes are centered precisely, and placed within a few hundred nm of 1-1.5 micron deep trenches. These wafer-scale approaches were enabled by chemically amplified resists and inductively coupled Cryo-etchers to form the 3D nanoscale architectures. The tube growth was performed using dc plasmaenhanced chemical vapor deposition (PECVD), and the materials used for the pre-fabricated 3D architectures were chemically and structurally compatible with the high temperature (700 C) PECVD synthesis of our tubes, in an ammonia and acetylene ambient. The TEM analysis of our tubes revealed graphitic basal planes inclined to the central or fiber axis, with cone angles up to 30 deg. for the particular growth conditions used. In addition, bending tests performed using a custom nanoindentor, suggest that the tubes are well adhered to the Si substrate. Tube characteristics were also engineered to some extent, by adjusting growth parameters, such as Ni catalyst thickness, pressure and plasma power during growth.

top-down fabrication↗