Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “SEMICONDUCTOR DEVICE”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 253 records · Page 14
All sourcesNASA NTRSDOE OSTI
DOE OSTI2018

Wide Band-Gap Semiconductor Based Power Electronics for Energy Efficiency

Recent advances in wide band-gap (WBG) semiconductor materials, such as silicon carbide (SiC) and gallium nitride (GaN) are enabling a new generation of power semiconductor devices that far exceed the performance of silicon-based devices. Past ARPA-E programs (ADEPT, Solar ADEPT, and SWITCHES) have enabled innovations throughout the power electronics value chain, especially in the area of WBG semiconductors. The two recently launched programs by ARPA-E (CIRCUITS and PNDIODES) continue to investigate the use of WBG semiconductors in power electronics. From materials and devices to modules and circuits to application-ready systems integration, ARPA-E projects have demonstrated the potential of WBG semiconductors to lower the cost of high-efficiency power electronics to enable broad adoption in energy applications.

25 ENERGY STORAGE↗
DOE OSTI2021

Record-Low Thermal Boundary Resistance between Diamond and GaN-on-SiC for Enabling Radiofrequency Device Cooling

The implementation of 5G-and-beyond networks requires faster, high-performance, and power-efficient semiconductor devices, which are only possible with materials that can support higher frequencies. Gallium nitride (GaN) power amplifiers are essential for 5G-and-beyond technologies since they provide the desired combination of high frequency and high power. These applications along with terrestrial hub and backhaul communications at high power output can present severe heat removal challenges. The cooling of GaN devices with diamond as the heat spreader has gained significant momentum since device self-heating limits GaN’s performance. However, one of the significant challenges in integrating polycrystalline diamond on GaN devices is maintaining the device performance while achieving a low diamond/GaN channel thermal boundary resistance. In this study, we achieved a record-low thermal boundary resistance of around 3.1 ± 0.7 m 2 K/GW at the diamond/Si 3 N 4 /GaN interface, which is the closest to theoretical prediction to date. The diamond was integrated within ~1 nm of the GaN channel layer without degrading the channel’s electrical behavior. Furthermore, we successfully minimized the residual stress in the diamond layer, enabling more isotropic polycrystalline diamond growth on GaN with thicknesses >2 μm and a ~1.9 μm lateral grain size. More isotropic grains can spread the heat in both vertical and lateral directions efficiently. Using transient thermoreflectance, the thermal conductivity of the grains was measured to be 638 ± 48 W/m K, which when combined with the record-low thermal boundary resistance makes it a leading-edge achievement.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2017

Low-Temperature Hydrothermal Synthesis of Colloidal Crystal Templated Nanostructured Single-Crystalline ZnO

Single crystal semiconductors almost always exhibit better optoelectrical properties than their polycrystalline or amorous counterparts. While three-dimensionally (3D) nanostructured semiconductor devices have been proposed for numerous applications, in the vast majority of reports, the semiconductor is polycrystalline or amorphous, greatly reducing the potential for advanced properties. While technologies for 3D structuring of semiconductors via use of a 3D template have advanced significantly, approaches for epitaxially growing nanostructured single crystal semiconductors within a template remain limited. Here, we demonstrate the epitaxial growth of 3D-structured ZnO through colloidal templates formed from 225 nm and 600 nm diameter colloidal particles via a low-temperature (~80 °C) hydrothermal process using a flow reactor. The effects of the pH of the reaction solution as well as the additive used on the 3D epitaxy process are investigated. The optical and electrical properties of the epitaxially grown nanostructured ZnO are probed by reflectance, photoluminescence, and Hall effect measurements. It is found that the epitaxially grown nanostructured ZnO generally exhibits superior properties than those of polycrystalline ZnO. The demonstrated hydrothermal epitaxy process should be applicable to other chemical solution-based deposition techniques and help extend the range of materials that can be grown into a 3D nanostructured single-crystalline form.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Ultrafast carrier dynamics in terahertz photoconductors and photomixers: beyond short-carrier-lifetime semiconductors

Abstract Efficient terahertz generation and detection are a key prerequisite for high performance terahertz systems. Major advancements in realizing efficient terahertz emitters and detectors were enabled through photonics-driven semiconductor devices, thanks to the extremely wide bandwidth available at optical frequencies. Through the efficient generation and ultrafast transport of charge carriers within a photo-absorbing semiconductor material, terahertz frequency components are created from the mixing products of the optical frequency components that drive the terahertz device – a process usually referred to as photomixing. The created terahertz frequency components, which are in the physical form of oscillating carrier concentrations, can feed a terahertz antenna and get radiated in case of a terahertz emitter, or mix with an incoming terahertz wave to down-convert to DC or to a low frequency photocurrent in case of a terahertz detector. Realizing terahertz photoconductors typically relies on short-carrier-lifetime semiconductors as the photo-absorbing material, where photocarriers are quickly trapped within one picosecond or less after generation, leading to ultrafast carrier dynamics that facilitates high-frequency device operation. However, while enabling broadband operation, a sub-picosecond lifetime of the photocarriers results in a substantial loss of photoconductive gain and optical responsivity. In addition, growth of short-carrier-lifetime semiconductors in many cases relies on the use of rare elements and non-standard processes with limited accessibility. Therefore, there is a strong motivation to explore and develop alternative techniques for realizing terahertz photomixers that do not rely on these defect-introduced short-carrier-lifetime semiconductors. This review will provide an overview of several promising approaches to realize terahertz emitters and detectors without short-carrier-lifetime semiconductors. These novel approaches utilize p-i-n diode junctions, plasmonic nanostructures, ultrafast spintronics, and low-dimensional materials to offer ultrafast carrier response. These innovative directions have great potentials for extending the applicability and accessibility of the terahertz spectrum for a wide range of applications.

36 MATERIALS SCIENCE↗
DOE OSTI2015

Optically sensitive devices based on Pt nano particles fabricated by atomic layer deposition and embedded in a dielectric stack

We report a series of metal insulator semiconductor devices with embedded Pt nano particles (NPs) fabricated using a low temperature atomic layer deposition process. Optically sensitive nonvolatile memory cells as well as optical sensors: (i) varactors, whose capacitance-voltage characteristics, nonlinearity, and peak capacitance are strongly dependent on illumination intensity; (ii) highly linear photo detectors whose responsivity is enhanced due to the Pt NPs. Both single devices and back to back pairs of diodes were used. The different configurations enable a variety of functionalities with many potential applications in biomedical sensing, environmental surveying, simple imagers for consumer electronics and military uses. The simplicity and planar configuration of the proposed devices makes them suitable for standard CMOS fabrication technology.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2021

The stability of Cl-, Br-, and I-passivated Si(100)-(2 × 1) in ambient environments for atomically-precise pattern preservation

Abstract Atomic precision advanced manufacturing (APAM) leverages the highly reactive nature of Si dangling bonds relative to H- or Cl-passivated Si to selectively adsorb precursor molecules into lithographically defined areas with sub-nanometer resolution. Due to the high reactivity of dangling bonds, this process is confined to ultra-high vacuum (UHV) environments, which currently limits its commercialization and broad-based appeal. In this work, we explore the use of halogen adatoms to preserve APAM-derived lithographic patterns outside of UHV to enable facile transfer into real-world commercial processes. Specifically, we examine the stability of H-, Cl-, Br-, and I-passivated Si(100) in inert N 2 and ambient environments. Characterization with scanning tunneling microscopy and x-ray photoelectron spectroscopy (XPS) confirmed that each of the fully passivated surfaces were resistant to oxidation in 1 atm of N 2 for up to 44 h. Varying levels of surface degradation and contamination were observed upon exposure to the laboratory ambient environment. Characterization by ex situ XPS after ambient exposures ranging from 15 min to 8 h indicated the Br– and I–passivated Si surfaces were highly resistant to degradation, while Cl–passivated Si showed signs of oxidation within minutes of ambient exposure. As a proof-of-principle demonstration of pattern preservation, a H–passivated Si sample patterned and passivated with independent Cl, Br, I, and bare Si regions was shown to maintain its integrity in all but the bare Si region post-exposure to an N 2 environment. The successful demonstration of the preservation of APAM patterns outside of UHV environments opens new possibilities for transporting atomically-precise devices outside of UHV for integrating with non-UHV processes, such as other chemistries and commercial semiconductor device processes.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2022

Gallium Nitride Superjunction Transistor (Continued Funding Report)

The initial goal of this project is to develop the gallium vacancy assisted diffusion (GAID) method in GaN and apply it to demonstrate 2-terminal, 3-terminal, and large area Superjunction-enhanced modules. These devices will find use in high efficiency power conversion applications with the capability of operating at higher voltages, higher frequency, and less loss than comparable stat-ofthe-art devices. The approach of this project has been to utilize simulation tools to drive diffusion experiments and inform semiconductor device fabrication processes. VASP has been relied upon to simulate first principles diffusion mechanisms while SILVACO TCAD has been utilized to understand tradeoffs of the the critical dimensions in GaN devices.

42 ENGINEERING↗
DOE OSTI2025

Development of a reliable Potting process for Photoconductive Semiconductor Switches (PCSS)

Electrical potting is an important process to protect semiconductor devices from damaging external elements (mechanical stress, moisture, high voltage, etc.) and provides structural support for delicate devices for electrical connectivity to a larger platform. This internship will focus on the development of a universal potting jig for photoconductive semiconductor switches (PCSS). The goal is to design a reliable compression jig that is cross compatible with various PCSS designs that allow for easy potting of devices with a high dielectric breakdown strength material. The challenge with the current potting jig is that the design is only compatible with one style of PCSS and applies uneven pressure that can lead to leakage of potting material. Our approach is to move from a design that applies pressure by binder clip to utilizing a micrometer based compressing jig for a reliable packaging process that can pot a variety of devices without having to have a unique compressing jig for each of style of PCSS. Possible roadblocks with the new design include epoxy leakage into the optical path and misalignment of the electrode – metal contact bond.

42 ENGINEERING↗
DOE OSTI2024

Optimized Viewing Techniques to Minimize Radiation Damage From X-ray Imaging Systems

X-ray inspection of ball grid arrays (BGAs) is typically performed at one or more viewing angles to examine adhesion sites for errors such as voids, joint cracking, or head-in-pillow. During this inspection process, the cir cuit board assembly is subject to ionizing radiation exposure, which can cause trapped charge within oxide layers of semiconductor devices. Some x-ray machines allow for programmable inspection routines, which could be used to optimize radiation exposure to semiconductor components. Using Monte Carlo methods, x-ray inspection of a BGA was simulated to determine a range of acceptable viewing angles. Dose rates to circuit board components were estimated at each inspection angle to determine the view resulting in optimized radiation exposure. Results showed that for each BGA, the maximum unobstructed viewing times without exceeding a 5 Gy dose limit to a single part ranged from 82 to 94 minutes. Using a radiation cost function method, optimized viewing across all components was found. Here, it was observed that for a consistent dose limit applied to silicon-based components, performing inspection with BGAs facing the x-ray source was optimal. A third method was applied, assigning individual dose limits based on empirical data from the NASA Goddard Space Flight Center radiation database. This method showed that optimized viewing maximizes the distance between the radiation source and highly sensitive components. It was also observed that cumulative effects from viewing two BGAs will influence viewing angles, causing the optimal view of one BGA to exist nearly 180° from the other.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2025

Next-generation tunnel FETs: exploring material perspectives and areal tunneling configurations

The end of Dennard scaling, which facilitated proportional increases in computing power without added energy costs until the mid-2000s, has underscored the urgent need for innovative semiconductor devices that can enhance energy efficiency. Tunnel field-effect transistors (TFETs) have emerged as promising candidates to surpass the energy efficiency of conventional metal oxide semiconductor field-effect transistors (MOSFETs). Unlike MOSFETs, which rely on thermionic emission to overcome the source-channel potential barrier, TFETs operate through quantum tunneling, potentially enabling sub-60 mV dec −1 subthreshold swing (SS) for low-voltage operation. However, lateral TFETs have faced challenges in achieving adequate on-state current (I ON ) and a broad SS operation window, limiting their practical utility. This review article advocates for areal TFETs, which utilize face-to-face tunnel junctions that ideally offer step-function current turn-on characteristics and allow I ON to scale with device area rather than width. We highlight recent advancements in integrating 2D materials into tunneling structures, which could facilitate efficient band-to-band tunneling through atomically thin layers, while addressing challenges of gate field screening. We then discuss the nearer-term prospects of epitaxial areal TFETs comprising III–V compound semiconductors and group-IV semiconductors based on recent experimental progress. The review examines both quantum mechanical and semiclassical modeling approaches for TFETs, including techniques to reduce the computational complexity. The article delves into ongoing challenges in material synthesis, interface engineering, device fabrication, and integration pathways, concluding with recommendations for future research directions to overcome the fundamental power density limitations of conventional transistor technology.

2D materials↗
DOE OSTI2026

TCAD-Machine Learning Enabled TID Compact Model Development for Commercial SiC MOSFET

We propose a TCAD (Technology Computer Aided Design)-machine learning coupled approach that combines a TCAD tool (Charon), optimization/uncertainty quantification tool (Dakota), surrogate models, and Bayesian learning capabilities. The coupling approach is used for accurate modeling and calibration of total ionizing dose (TID) induced threshold voltage (V th ) shifts in Commercial-Off-The-Shelf (COTS) semiconductor devices and to develop physics-informed TID compact models. This versatile approach is applied to model the TID effect in an exemplar COTS 3.3 kV SiC power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). With the Charon-Dakota coupling, we can determine key device geometry and doping values based on device physics, which are difficult to obtain or not available for COTS devices but important for TCAD simulation; additionally, we can efficiently generate thousands of simulation results in a large parameter space, which makes it possible to develop data-driven surrogate models and perform Bayesian calibration. Utilizing the full tool-coupling approach, we achieve calibrated TCAD simulation models that accurately capture the average TID-induced V th shifts behavior with total doses and V th shifts saturation at high doses as observed in experimental data. More importantly, the calibrated TCAD simulations are obtained with determined TID model parameters (e.g., hole trap density and capture cross section) values that contain well quantified uncertainties. Furthermore, we can isolate and quantify the noises that are not captured by the TCAD models but exist in the measured data due to measurements and devices variabilities. Lastly, the calibrated surrogate models are used to develop physics-informed TID compact models. The method is generalizable to other devices and/or radiation conditions with few modifications and can provide well-determined uncertainties.

COTS↗
DOE OSTI2024

A strategy to eliminate selenium oxide islands formed on the ZnSe/GaAs epilayer

Atomically clean and smooth surfaces are essential for semiconductor device fabrication and epitaxial regrowth. In this regard, spontaneously formed oxide islands or clusters on the surfaces of II-VI semiconductor exposures to air can disrupt interface formation. Using ZnSe/GaAs heterostructures grown by molecular beam epitaxy (MBE), we investigated the effect of surface treatments in eliminating oxide islands. The samples were probed with atomic force microscopy, low-temperature photoluminescence, and scanning electron microscopy. Here, it was found that ultra-high vacuum (UHV) annealing at 200°C, regardless of annealing duration, largely removed the islands while leaving the crystallinity of the ZnSe and GaAs epilayers unaffected. UHV annealing at higher temperatures of 300°C completely removed the islands, but the optical properties of ZnSe and/or GaAs epilayers deteriorated depending on the annealing duration. Our observations provide guidance to set thermal annealing strategies for removing oxide islands from the surfaces of II-VI/III-V semiconductor heterostructures depending on the desired properties.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Boron Nitride Solid-State Neutron Detectors

The goal of this project is to build upon the work performed under the Texas Tech IDEAS project (DE-AR0000964 monitored by Dr. Isik Kizilyalli) to bring the developed B-10 enriched hexagonal boron nitride (h- 10 BN or 10 BN or BN) semiconductor neutron detector technology to the next level of maturity. In comparison to He-3 ( 3 He) gas detectors, BN neutron detectors possess all the intrinsic advantages of semiconductor devices: light weight, compact size, fast response speed, high spatial resolution, high temperature and low voltage operation capability, ease of mass production via existing semiconductor infrastructures, low cost of operation and maintenance, flexible form factors, and durability. The project will develop a prototype h- 10 BN neutron detector as a potential replacement for the 3 He gas neutron detectors (LND 25185 or equivalent) used in various neutron survey meters currently produced and commercialized by Ludlum Measurements, Inc. (LMI). To increase the overall detection efficiency, it is essential to maximize the collection efficiency of charge carriers (electrons and holes) generated by the nuclear reaction, which demands a further push to achieve 10 BN epilayers with improved material quality. The material growth processes will be guided by characterization of structural, optical, and electrical properties of h-BN. Selective devices will be calibrated at LMI. During ARPA-E supporting period, the key material parameters of h-BN produced by metal organic chemical vapor deposition (MOCVD), including the layer thickness, mobility-lifetime product, surface recombination field and detector size for maintaining a high charge collection efficiency all have been improved by several orders of magnitude. These improvements have enabled the realization of high-performance h 10BN semiconductor thermal neutron detectors. Presently, h- 10 BN thermal neutron detectors developed under ARPA-E’s support hold the record high detection efficiency among all solid-state detectors at 59%. With further development in manufacturing, there is no question that h-BN detectors will replace the traditional He-3 gas detectors in certain application areas by offering obvious advantages of semiconductor technologies over gas detectors and opportunities for users to dedicate the scarce and expensive supply of He-3 gas to other application areas where substitutes of He-3 gas are not possible.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2023

Power Electronic Substrates for Space Restricted Application

High-power modules use substrates to house the semiconductor device and for electrical insulation. These substrates are constructed with thermally conductive dielectric material sandwiched between two metals to extract heat from semiconductor chips. Thus, the required cooling performance of a power module is linked to the substrate’s thermal performance and can vary based on the substrate technologies. In this study, four substrate technologies were evaluated for space-restricted applications: direct-bonded copper, an insulated metal substrate, a thermally annealed pyrolytic graphite–based insulated metal substrate, and direct-bonded aluminum, where the heat sink is directly attached without thermal interface materials. The finite element results suggest that the popular direct-bonded copper substrate has better thermal performance than the rest of the substrates for space-restricted applications. Furthermore, a modified direct-bonded copper is proposed to further improve thermal performance. The evaluation results show that the modified substrate can handle 30% more losses than its traditional counterpart.

Chowdhury, Shajjad↗
DOE OSTI2025

A Modified DBC Substrate Improving Thermal Performance for Confined Space Applications

High-power modules use substrates to house the semiconductor device and for electrical insulation. These substrates are constructed with thermally conductive dielectric material sandwiched between two metals to extract heat from semiconductor chips. Thus, the required cooling performance of a power module is linked to the substrate’s thermal performance and can vary based on the substrate technologies. Here, in this study, five substrate technologies were evaluated for space-restricted applications: direct-bonded copper (DBC), an insulated metal substrate (IMS), a thermally annealed pyrolytic graphite (TPG)-based IMS, DBC-based double-sided cooling, and direct-bonded aluminum (DBA) where the heat sink is directly attached without thermal interface materials (TIMs). The finite element (FE) analysis results suggest that the popular DBC substrate has thermal performance better than that of the other substrates for space-constrained applications. To further improve the thermal performance, a modified DBC substrate was proposed where a copper block was added between the semiconductor and the DBC substrate to achieve heat spreading underneath the chip. The modified DBC performance was then compared with the aforementioned substrates and the results showed significant thermal performance improvement. The results were verified with experimental results where the proposed substrate showed 20% more loss handling capability compared to an identical DBC substrate.

42 ENGINEERING↗
DOE OSTI2024

Machine Learning of Plasma Science for Next Generation Microelectronics (Project Final Report)

Low temperature plasmas (LTPs) are an enabling technology behind reducing device dimensions and the continuation of Moore’s Law. It is estimated that 40-45% of all process steps necessary to manufacture semiconductor devices involve LTPs. However, challenges in plasma process design and continuous incorporation of novel materials for new device architectures are pushing the limits of what is possible with current plasma technology. For example, creating higher aspect ratio structures and etching features at the atomic scale both require finer control of the ion energy/velocity at wafer surfaces. To support these types of future innovations in the plasma processing systems that Sandia and the DOE rely upon, we have developed novel diagnostics, simulations, and machine learning capabilities to discover, characterize, and predict plasma phenomena affecting the ion energy/velocity distribution function (IEDF). These efforts also supported research program development and external collaboration with industry and academia through Sandia’s Plasma Research Facility (PRF). This report will focus on the following topics and accomplishments of this three year LDRD project, briefly summarized.

42 ENGINEERING↗
DOE OSTI2019

A Simple Control to Reduce Device Over-Voltage Caused by Non-Active Switch Loop in Three-Level ANPC Converters

With the development of wide band-gap (WBG) technology, the switching speed of power semiconductor devices increases, which makes circuits more sensitive to parasitics. For three-level active neutral point clamped (3L-ANPC) converters, the over-voltage caused by additional non-active switch loop can be an issue. This paper analyzes the multiple commutation loops in 3L-ANPC converter and summarizes the impact factors of the device over-voltage. The nonlinearity of the output capacitance of the device can significantly influence the over-voltage. A simple control without introducing additional hardware circuit or complex software algorithm is proposed to attenuate the effect of the nonlinear output capacitance. Multi-pulse test is conducted for a 3L-ANPC converter built with silicon carbide (SiC) MOSFETs. With the proposed control, the testing results show that the peak drain-source voltage of both active and non-active switches is reduced by more than 20% compared to the conventional control.

Gui, Handong↗
DOE OSTI2022

Wide bandgap semiconductor materials and devices

The technological and societal impacts of electronic devices based on Ge, Si, and compound semiconductors like GaAs have been profound, fueling the decades long quest in identifying ever-larger bandgap semiconductors to untap new applications and possibilities. Specifically, an increase in the bandgap leads to shorter wavelength emission and an increased breakdown electric field, which has direct consequences for solid-state lighting like light-emitting diodes (LEDs) and laser diodes (LDs) from the visible (blue-green, blue, and violet) and beyond (UV and deep-UV) spectral range and for radically improved power devices supported by a higher intrinsic breakdown strength. Wide bandgap (WBG) semiconductors represent the frontier of materials that satisfy these criteria and include group IV, III–V, and II–VI material families like SiC (3.2 eV), GaN (3.4 eV), and ZnO (3.4 eV), respectively. With even larger bandgaps exceeding 4 eV, ultrawide bandgap (UWBG) semiconductors include diamond, III-nitrides incorporating Al and B (e.g., AlN, BN, and AlGaN), and sesquioxides like Ga 2 O 3 and (Al,Ga) 2 O 3 . These materials span widely varying stages of technological maturity, with SiC and GaN platforms among the most mature with commercially available devices in RF and high-power electronics, while other platforms such as Ga 2 O 3 rapidly advancing and poised to enable new UV and deep-UV optoelectronic devices. This Special Topic on Wide Bandgap Semiconductor Materials and Devices covers broad research subtopics on WBG and UWBG materials that span bulk crystals, epitaxy and substrate technologies, fundamental defect science, and doping, as well as electronic and optoelectronic device fabrication and characterization. Here, we highlight works from the collection, which we categorize by material platform of SiC, III-nitrides, and Ga 2 O 3 and related alloys.

36 MATERIALS SCIENCE↗