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At least 253 records · Page 14

Design of Low Power CMOS Read-Out with TDI Function for Infrared Linear Photodiode Array Detectors

A new low voltage CMOS infrared readout circuit using the buffer-direct injection method is presented. It uses a single supply voltage of 1.8 volts and a bias current of 1uA. The time-delay integration technique is used to increase the signal to noise ratio. A current memory circuit with faulty diode detection is used to remove dark current for background compensation and to disable a photodiode in a cell if detected as faulty. Simulations are shown that verify the circuit that is currently in fabrication in 0.5ym CMOS technology.

Vizcaino, Paul↗

Single event upset vulnerability of selected 4K and 16K CMOS static RAM's

Upset thresholds for bulk CMOS and CMOS/SOS RAMS were deduced after bombardment of the devices with 140 MeV Kr, 160 MeV Ar, and 33 MeV O beams in a cyclotron. The trials were performed to test prototype devices intended for space applications, to relate feature size to the critical upset charge, and to check the validity of computer simulation models. The tests were run on 4 and 1 K memory cells with 6 transistors, in either hardened or unhardened configurations. The upset cross sections were calculated to determine the critical charge for upset from the soft errors observed in the irradiated cells. Computer simulations of the critical charge were found to deviate from the experimentally observed variation of the critical charge as the square of the feature size. Modeled values of series resistors decoupling the inverter pairs of memory cells showed that above some minimum resistance value a small increase in resistance produces a large increase in the critical charge, which the experimental data showed to be of questionable validity unless the value is made dependent on the maximum allowed read-write time.

Kolasinski, W. A.↗

Notes on implementation of sparsely distributed memory

The Sparsely Distributed Memory (SDM) developed by Kanerva is an unconventional memory design with very interesting and desirable properties. The memory works in a manner that is closely related to modern theories of human memory. The SDM model is discussed in terms of its implementation in hardware. Two appendices discuss the unconventional approaches of the SDM: Appendix A treats a resistive circuit for fast, parallel address decoding; and Appendix B treats a systolic array for high throughput read and write operations.

Keeler, J. D.↗

Index grating lifetime in photorefractive GaAs

The index grating lifetime in liquid encapsulated Czochralski-grown undoped semi-insulating GaAs was measured using a beam coupling technique. The largest lifetime measure was about 8 s under a read beam intensity of 0.7 mW/sq cm with the grating periodicity being 0.63 microns. The measured value decreases to milliseconds as the read beam intensity and the grating periodicity increase to about 10 mW/sq cm and 4 microns, respectively. This range of grating lifetime in this material is adequate for its use in real-time spatial light modulators, reconfigurable beam steering devices, and dynamic memory elements, for optical computing. In addition, the results suggest that the lifetime is sensitive to residual imperfections in the crystal.

Cheng, Li-Jen↗

Holographic recording materials development

The area of organic cis-trans photoisomerization systems for holographic memory applications was examined. Photochemical studies were made of stilbene, indigo, and thioindigo derivatives in solution and in a variety of polymer matrix materials, to optimize the photorefractive behavior of the chemical system as a whole. Lithium niobate was used to study the writing and reading efficiencies of thick phase holograms. Both phase-wave holograms and Fourier-transform holograms were employed, and a number of reconstruction techniques are discussed. The possibility of using cis-trans photoisomerization of appropriate organic chemicals as the basis for a holographic recording system is confirmed.

Source record↗

SpaceCube Version 1.5

SpaceCube 1.5 is a high-performance and low-power system in a compact form factor. It is a hybrid processing system consisting of CPU (central processing unit), FPGA (field-programmable gate array), and DSP (digital signal processor) processing elements. The primary processing engine is the Virtex- 5 FX100T FPGA, which has two embedded processors. The SpaceCube 1.5 System was a bridge to the SpaceCube 2.0 and SpaceCube 2.0 Mini processing systems. The SpaceCube 1.5 system was the primary avionics in the successful SMART (Small Rocket/Spacecraft Technology) Sounding Rocket mission that was launched in the summer of 2011. For SMART and similar missions, an avionics processor is required that is reconfigurable, has high processing capability, has multi-gigabit interfaces, is low power, and comes in a rugged/compact form factor. The original SpaceCube 1.0 met a number of the criteria, but did not possess the multi-gigabit interfaces that were required and is a higher-cost system. The SpaceCube 1.5 was designed with those mission requirements in mind. The SpaceCube 1.5 features one Xilinx Virtex-5 FX100T FPGA and has excellent size, weight, and power characteristics [4×4×3 in. (approx. = 10×10×8 cm), 3 lb (approx. = 1.4 kg), and 5 to 15 W depending on the application]. The estimated computing power of the two PowerPC 440s in the Virtex-5 FPGA is 1100 DMIPS each. The SpaceCube 1.5 includes two Gigabit Ethernet (1 Gbps) interfaces as well as two SATA-I/II interfaces (1.5 to 3.0 Gbps) for recording to data drives. The SpaceCube 1.5 also features DDR2 SDRAM (double data rate synchronous dynamic random access memory); 4- Gbit Flash for storing application code for the CPU, FPGA, and DSP processing elements; and a Xilinx Platform Flash XL to store FPGA configuration files or application code. The system also incorporates a 12 bit analog to digital converter with the ability to read 32 discrete analog sensor inputs. The SpaceCube 1.5 design also has a built-in accelerometer. In addition, the system has 12 receive and transmit RS- 422 interfaces for legacy support. The SpaceCube 1.5 processor card represents the first NASA Goddard design in a compact form factor featuring the Xilinx Virtex- 5. The SpaceCube 1.5 incorporates backward compatibility with the Space- Cube 1.0 form factor and stackable architecture. It also makes use of low-cost commercial parts, but is designed for operation in harsh environments.

Geist, Alessandro↗

Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 4, Appendix C

The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. Statistical analysis data is supplied along with write pulse width, read cycle time, write cycle time, and chip enable time data.

Klute, A.↗

Basic memory module

Construction and electrical characterization of the 4096 x 2-bit Basic Memory Module (BMM) are reported for the Space Ultrareliable Modular Computer (SUMC) program. The module uses four 2K x 1-bit N-channel FET, random access memory chips, called array chips, and two sense amplifier chips, mounted and interconnected on a ceramic substrate. Four 5% tolerance power supplies are required. At the Module, the address, chip select, and array select lines require a 0-8.5 V MOS signal level. The data output, read-strobe, and write-enable lines operate at TTl levels. Although the module is organized as 4096 x 2 bits, it can be used in a 8196 x 1-bit application with appropriate external connections. A 4096 x 1-bit organization can be obtained by depopulating chips.

Tietze, F. C.↗

Effects of Heavy Ion Exposure on Nanocrystal Nonvolatile Memory

We have irradiated engineering samples of Freescale 4M nonvolatile memories with heavy ions. They use Silicon nanocrystals as the storage element, rather than the more common floating gate. The irradiations were performed using the Texas A&M University cyclotron Single Event Effects Test Facility. The chips were tested in the static mode, and in the dynamic read mode, dynamic write (program) mode, and dynamic erase mode. All the errors observed appeared to be due to single, isolated bits, even in the program and erase modes. These errors appeared to be related to the micro-dose mechanism. All the errors corresponded to the loss of electrons from a programmed cell. The underlying physical mechanisms will be discussed in more detail later. There were no errors, which could be attributed to malfunctions of the control circuits. At the highest LET used in the test (85 MeV/mg/sq cm), however, there appeared to be a failure due to gate rupture. Failure analysis is being conducted to confirm this conclusion. There was no unambiguous evidence of latchup under any test conditions. Generally, the results on the nanocrystal technology compare favorably with results on currently available commercial floating gate technology, indicating that the technology is promising for future space applications, both civilian and military.

Oldham, Timothy R.↗

Simulations of Sample-Up-The-Ramp for Space-Based Observations of Faint Sources

We have conducted simulations of a memory-efficient up-the-ramp sampling algorithm for infrared detector arrays. Our simulations use realistic sky models of galaxy brightness, shapes, and distributions, and include the contributions of zodiacal light and cosmic rays. A simulated readout is based on the HAWAII-2RG arrays, and includes read noise, dark current, pedestal, and other effects. The up-the-ramp algorithm rejects cosmic rays and produces a best estimate of the source flux under the assumption of very low signal-to-noise. We present an analysis of the fidelity of image brightness recovery with this algorithm.

Benford, Dominic J.↗

Analysis of space radiation data of semiconductor memories

This article presents an analysis of radiation effects for several select device types and technologies aboard the Combined Release and Radiation Effects Satellite (CRRES) satellite. These space-flight measurements covered a period of about 14 months of mission lifetime. Single Event Upset (SEU) data of the investigated devices from the Microelectronics Package (MEP) were processed and analyzed. Valid upset measurements were determined by correcting for invalid readings, hard failures, missing data tapes (thus voids in data), and periods over which devices were disabled from interrogation. The basic resolution time of the measurement system was confirmed to be 2 s. Lessons learned, important findings, and recommendations are presented.

Flight Experiment↗

Array coding for large data memories

It is pointed out that an array code is a convenient method for storing large quantities of data. In a typical application, the array consists of N data words having M symbols in each word. The probability of undetected error is considered, taking into account three symbol error probabilities which are of interest, and a formula for determining the probability of undetected error. Attention is given to the possibility of reading data into the array using a digital communication system with symbol error probability p. Two different schemes are found to be of interest. The conducted analysis of array coding shows that the probability of undetected error is very small even for relatively large arrays.

Tranter, W. H.↗

NASTRAN postprocessor program for transient response to input accelerations

The description of a transient analysis program for computing structural responses to input base accelerations is presented. A hybrid modal formulation is used and a procedure is demonstrated for generating and writing all modal input data on user tapes via NASTRAN. Use of several new Level 15 modules is illustrated along with a problem associated with reading the postprocessor program input from a user tape. An example application of the program is presented for the analysis of a spacecraft subjected to accelerations initiated by thrust transients. Experience with the program has indicated it to be very efficient and economical because of its simplicity and small central memory storage requirements.

Wingate, R. T.↗

Solid State Drive Radiation Assurance With Active Testing

Automotive and industrial grade SSDs were tested for TID and SEE response at the assembly level to investigate radiation tolerance trends and explore radiation hardness assurance best practices in commercial memory devices. SSDs were installed in passive NVMe extenders to place only the drive in the beam line. A digital I/O module connected to the test computer provided inhibit signals to block both facility beam delivery and power while attempting recovery from any device failure conditions (e.g., failed write, failed read, or unresponsive device).

Edward P Wilcox↗

Far Ultraviolet Imaging from the Image Spacecraft: Wideband FUV Imaging - 2

The Far Ultraviolet Wideband Imaging Camera (WIC) complements the magnetospheric images taken by the IMAGE satellite instruments with simultaneous global maps of the terrestrial aurora. Thus, a primary requirement of WIC is to image the total intensity of the aurora in wavelength regions most representative of the aurora] source and least contaminated by dayglow, have sufficient field of view to cover the entire polar region from spacecraft apogee and have resolution that is Sufficient to resolve auroras on a scale of 1 to 2 latitude degrees, The instrument is sensitive in the spectral region from 140- 190 nm. The WIC is mounted on the rotating, IMAGE spacecraft viewing radially outward and has a field of view of 17 deg in the direction parallel to the spacecraft spin axis. Its field of view is 30 deg in the direction perpendicular to the spin axis, although only a 17 deg x 17 deg image of the Earth is recorded. The optics was an all-reflective, inverted Cassegrain Burch camera using concentric optics with a small convex primary and a large concave secondary mirror. The mirrors were coated by a special multi-layer coating, which has low reflectivity in the visible and near UV region, The detector consists of a MCP-Intensified CCD. The MCP is curved to accommodate the focal surface of the concentric optics. Tile phosphor of the image intensifier is deposited on a concave fiberoptic window, which is then Coupled to the CCD with a fiberoptic taper. The camera head operates in a fast frame transfer mode with the CCD being read approximately 30 full frames (512 by 256 pixel) per second with an exposure time of 0.033 s. The image motion (file to the satellite spin is minimal during such a short exposure. Each image is electronically distortion corrected using the look up table scheme. An offset is added to each memory address that is proportional to the image shift due to satellite rotation, and the charge signal is digitally summed in memory. On orbit, approximately 300 frames will be added to produce one WIC image in memory. The advantage of the electronic motion compensation and distortion correction is that it is extremely flexible, permitting several kinds of corrections including motions parallel and perpendicular to the predicted axis of rotation. File instrument was calibrated by applying ultraviolet light through a vacuum monochromator and measuring the absolute responsivity of the instrument. To obtain the data for the distortion look up table the camera was turned through various angles and the input angles corresponding to a pixel matrix were recorded. It was found that the spectral response peaked at 150 nm and fell off in either direction. The equivalent aperture of the camera, including mirror reflectivities and effective photocathode quantum efficiency, is about 0.04 sq cm. Thus, a 100 Rayleigh LBH aurora is expected to produce 23 equivalent counts per pixel per 10 s exposure at the peak of instrument response.

Mende, S. B.↗

Aerospace Ground Equipment for model 4080 sequence programmer. A standard computer terminal is adapted to provide convenient operator to device interface

The Aerospace Ground Equipment (AGE) provides an interface between a human operator and a complete spaceborne sequence timing device with a memory storage program. The AGE provides a means for composing, editing, syntax checking, and storing timing device programs. The AGE is implemented with a standard Hewlett-Packard 2649A terminal system and a minimum of special hardware. The terminal's dual tape interface is used to store timing device programs and to read in special AGE operating system software. To compose a new program for the timing device the keyboard is used to fill in a form displayed on the screen.

Nissley, L. E.↗

Globalized Newton-Krylov-Schwarz Algorithms and Software for Parallel Implicit CFD

Implicit solution methods are important in applications modeled by PDEs with disparate temporal and spatial scales. Because such applications require high resolution with reasonable turnaround, "routine" parallelization is essential. The pseudo-transient matrix-free Newton-Krylov-Schwarz (Psi-NKS) algorithmic framework is presented as an answer. We show that, for the classical problem of three-dimensional transonic Euler flow about an M6 wing, Psi-NKS can simultaneously deliver: globalized, asymptotically rapid convergence through adaptive pseudo- transient continuation and Newton's method-, reasonable parallelizability for an implicit method through deferred synchronization and favorable communication-to-computation scaling in the Krylov linear solver; and high per- processor performance through attention to distributed memory and cache locality, especially through the Schwarz preconditioner. Two discouraging features of Psi-NKS methods are their sensitivity to the coding of the underlying PDE discretization and the large number of parameters that must be selected to govern convergence. We therefore distill several recommendations from our experience and from our reading of the literature on various algorithmic components of Psi-NKS, and we describe a freely available, MPI-based portable parallel software implementation of the solver employed here.

Gropp, W. D.↗

Analyzing a 35-Year Hourly Data Record: Why So Difficult?

At the Goddard Distributed Active Archive Center, we have recently added a 35-Year record of output data from the North American Land Assimilation System (NLDAS) to the Giovanni web-based analysis and visualization tool. Giovanni (Geospatial Interactive Online Visualization ANd aNalysis Infrastructure) offers a variety of data summarization and visualization to users that operate at the data center, obviating the need for users to download and read the data themselves for exploratory data analysis. However, the NLDAS data has proven surprisingly resistant to application of the summarization algorithms. Algorithms that were perfectly happy analyzing 15 years of daily satellite data encountered limitations both at the algorithm and system level for 35 years of hourly data. Failures arose, sometimes unexpectedly, from command line overflows, memory overflows, internal buffer overflows, and time-outs, among others. These serve as an early warning sign for the problems likely to be encountered by the general user community as they try to scale up to Big Data analytics. Indeed, it is likely that more users will seek to perform remote web-based analysis precisely to avoid the issues, or the need to reprogram around them. We will discuss approaches to mitigating the limitations and the implications for data systems serving the user communities that try to scale up their current techniques to analyze Big Data.

computational performance↗