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DOE OSTI2025

ChatHPC: Building the Foundations for a Productive and Trustworthy AI-Assisted HPC Ecosystem

ChatHPC democratizes large language models for the high-performance computing (HPC) community by providing the infrastructure, ecosystem, and knowledge needed to apply modern generative AI technologies to rapidly create specific capabilities for critical HPC components while using relatively modest computational resources. Our divide-and-conquer approach focuses on creating a collection of reliable, highly specialized, and optimized AI assistants for HPC based on the cost-effective and fast Code Llama fine-tuning processes and expert supervision. We target major components of the HPC software stack, including programming models, runtimes, I/O, tooling, and math libraries. Thanks to AI, ChatHPC provides a more productive HPC ecosystem by boosting important tasks related to portability, parallelization, optimization, scalability, and instrumentation, among others. With relatively small datasets (on the order of KB), the AI assistants, which are created in a few minutes by using one node with two NVIDIA H100 GPUs and the ChatHPC library, can create new capabilities with Meta’s 7-billion parameter Code Llama base model to produce high-quality software with a level of trustworthiness of up to 90% higher than the 1.8-trillion parameter OpenAI ChatGPT-4o model for critical programming tasks in the HPC software stack.

Young, Aaron [ORNL] (ORCID:0000000254484667)↗

DOE OSTI2025

Extending SEER for Extreme Heterogeneity

Heterogeneous and multi-device nodes are increasingly common in high-performance computing and data centers, yet existing programming models often lack simple, transparent, and portable support for these diverse architectures. The main contribution of this work is the development of novel SEER capabilities to address this challenge by providing a descriptive programming model that allows applications to seamlessly leverage heterogeneous nodes across various device types. SEER uses efficient memory management and can select the proper device[s] depending on the computational cost of the applications. This is completely transparent to the programmer, thereby providing a highly productive programming environment. Integrating extreme heterogeneity into the SEER library as shown with the use of NVIDIA and AMD GPUs simultaneously allows it to expand and exploit the performance possibilities. Our analysis based on the well-known Conjugate Gradient algorithm reports accelerations above 1.5 × on computationally demanding steps of such an algorithm by using both architectures simultaneously.

Teranishi, Keita [ORNL] (ORCID:0000000166472690)↗

DOE OSTI2025

DoCeph: DPU-Offloaded Messaging in Ceph for Reduced Host CPU Utilization

Ceph is a widely used distributed object store, but its messenger layer imposes substantial CPU overhead on the host. To address this limitation, we propose DoCeph, a DPU-offloaded storage architecture for Ceph that disaggregates the system by offloading the communication-intensive messaging component to the DPU while retaining the storage backend on the host. The DPU efficiently manages communication, using lightweight RPC for metadata operations and DMA for data transfer. Moreover, DoCeph introduces a pipelining technique that overlaps data transmission with buffer preparation, mitigating hardware-imposed transfer size limitations. We implemented DoCeph on a Ceph cluster with NVIDIA BlueField-3 DPUs. Evaluation results indicate that DoCeph cuts host CPU usage by up to 92% while sustaining stable throughput and providing larger performance benefits for object writes over 1 MB.

Park, Kuri [Sogang University]↗

DOE OSTI2026

ChatMPI: LLM-Driven MPI Code Generation for HPC Workloads

The Message Passing Interface (MPI) standard plays a crucial role in enabling scientific applications for parallel computing and is an essential component in high-performance computing (HPC). However, implementing MPI code manually—especially applying a proper domain decomposition and communication pattern—is a challenging and error-prone task. We present ChatMPI, an AI assistant for MPI parallelization of sequential C codes. In our analysis, we focus on testing six essential HPC workloads, which are based on Basic Linear Algebra Subprograms levels 1, 2, and 3 as well as sparse, stencil, and iterative operations. We analyze the process of creating ChatMPI by using the ChatHPC library. This lightweight large language model (LLM)–based infrastructure enables HPC experts to efficiently create and supervise trustworthy AI capabilities for critical HPC software tasks. We study the data required for training (fine-tuning) ChatMPI to generate parallel codes that not only use MPI syntax correctly but also apply HPC techniques to reduce memory communication and maximize performance by using proper work decomposition. With a relatively small training dataset composed of a few dozen prompts and fewer than 15 minutes of fine-tuning on one node equipped with two NVIDIA H100 GPUs, ChatMPI elevates trustworthiness for MPI code generation of current LLMs (e.g., Code Llama, ChatGPT-4o and ChatGPT 5). Additionally, we evaluate the performance of the MPI codes generated by ChatMPI in comparison with the ones generated by ChatGPT-4o and ChatGPT-5. The codes generated by ChatMPI provide up to a 4 × boost in performance by using better problem decomposition, communication patterns, and HPC techniques (e.g., communication avoiding).

Valero Lara, Pedro [ORNL] (ORCID:0000000214794310)↗

DOE OSTI2026

Scalability Analysis of Quantum Models for Stress and Emotion Detection

Stress and emotion detection from high-dimensional physiological signals is a challenging task, particularly when aiming for accurate classification across diverse behavioral states. Quantum machine learning (QML) is promising for modeling such high-dimensional data, but scalability is limited by qubit resources and the exponential cost of classical statevector simulation. This work studies the scalability of quantum support vector machines (QSVMs) for binary stress detection and three-class emotion recognition (Negative/Neutral/Positive) under varying qubit counts and angle-encoding strategies. We also present a comparison study with one-feature-per-qubit (1:1) and two-features-per-qubit (2:1) mappings. Experiments are executed on HPC infrastructure using NVIDIA CUDA-Q to evaluate performance, variance, and class-dependent separability at higher-qubit setups. Results show that larger Hilbert spaces can improve peak accuracy but may increase instability. At the same time, dense 2:1 encoding yields more consistent stress detection performance. For emotion recognition, scaling improves discrimination for classes like Negative and Positive more than Neutral. We find that effective QML scaling is task-dependent and benefits more from encoding design than simply increasing qubit count.

Onim, Md. Saif Hassan [University of Tennessee, Kn↗

DOE OSTI2019

Sierra Center of Excellence: Lessons Learned

The introduction of heterogeneous computing via GPUs from the Sierra architecture represented a significant shift in direction for computational science at Lawrence Livermore National Laboratory (LLNL), and therefore required significant preparation. Over the last five years, the Sierra Center of Excellence (CoE) has brought employees with specific expertise from IBM and NVIDIA together with LLNL in a concentrated effort to prepare applications, system software, and tools for the Sierra supercomputer. This article shares the process we applied for the CoE and documents lessons learned during the collaboration, with the hope that others will be able to learn from both our success and intermediate setbacks. We describe what we have found to work for the management of such a collaboration and best practices for algorithms and source code, system configuration and software stack, tools, and application performance.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2020

Pre-exascale accelerated application development: The ORNL Summit experience

High-performance computing (HPC) increasingly relies on heterogeneous architectures to achieve higher performance. In the Oak Ridge Leadership Facility (OLCF), Oak Ridge, TN, USA, this trend continues as its latest supercomputer, Summit, entered production in early 2019. The combination of IBM POWER9 CPU and NVIDIA V100 GPU, along with a fast NVLink2 interconnect and other latest technologies, pushes system performance to a new height and breaks the exascale barrier by certain measures. Due to Summit's powerful GPUs and much higher GPU–CPU ratio, offloading to accelerators becomes a requirement for any application, which intends to effectively use the system. To facilitate navigating a complex landscape of competing heterogeneous architectures, a collection of applications from a wide spectrum of scientific domains is selected for early adoption on Summit. In this article, the experience and lessons learned are summarized, in the hope of providing useful guidance to address new programming challenges, such as scalability, performance portability, and software maintainability, for future application development efforts on heterogeneous HPC systems.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2021

cuRAND back-end v0.1.0

This contribution to Intel oneMKL adds functionality to generate pseudorandom numbers within SYCL on NVIDIA devices.

Pascuzzi, Vincent↗

DOE OSTI2021

HiPACE++ v0.1

Hipace++ is the new implementation of the DESY-LBNL code Hipace (not distributed nor licensed) for plasma acceleration, relying on the quasi-static particle-in-cell (PIC) method, enabling fast and accurate simulations of plasma accelerators for problems satisfying the quasi-static approximation. Plasma acceleration is a priority in the ATAP division, and such problems represent a wide range of parameters. Hipace++ is an HPC (high-performance computing) code running on supercomputers and it provides the first efficient implementation of the quasi-static PIC method on Graphic Processing Units (GPU), showing 10x speedup and using much less resources than CPU implementations for production simulations. It currently runs on Nvidia GPUs and will ultimately be portable to more accelerated HPC platforms. The porting strategy is novel, and can be adapted to other flavors of quasi-static PIC. Besides, Hipace++ aims at using mesh refinement for higher efficiency, thus enabling simulations unfeasible today. For this purpose, Hipace++ depends on the open-source library AMReX (Adaptive Mesh Refinement at EXascale) developed at LBNL.

Vay, Jean-Luc↗

DOE OSTI2021

SW4 Curvilinear Kernels

Five computationally expensive stencil evaluation routines from SW4(https://github.com/geodynamics/sw4 GPL license) have been extracted and packaged with a driver to create a mini-app for evaluating compiler and GPU performance. The kernels can executed on AMD and Nvidia GPUs with and without RAJA. The kernel driver generates synthetic inputs, checks for correctness and measures kernel run times.

Pankajakshan, Ramesh↗

DOE OSTI2020

XPlacer Machine Learning Guided Data Placement

XPlacer Machine Learning Guided Data Placement uses machine learning model to assist programmers to select the data placement advises for application running on HPC system with Nvidia GPUs. XPlacer Machine Learning Guided Data Placement consists three components: (1) 4 revised benchmarks from Rodinia benchmarks; (2) compiler script and execution script to generate variants, and collect training data for the machine learning model; (3) the scripts to post-process the collected data and generate the machine leaning model.

Liao, Chunhua↗

DOE OSTI2022

thrust iterators

A collection of iterators built on NVIDIA's thrust library driven by a small domain specific language

Brady, Peter↗

DOE OSTI2023

GPU-FPX

GPU-FPX is a tool based on NVBit that detects and analyzes floating-point exceptions on NVIDIA GPUs through binary instrumentation. Its purpose is to detect and report the occurrences of floating-point exceptions during numerical computations, offering efficient location detections and exception flow. GPUFPX achieves exceptional performance, being 16x faster than comparable prior tools, such as BinFPE.

Laguna Peralta, Ignacio↗

DOE OSTI2022

MemLeap GPU Memory Profiler

MemLeap is a GPU Memory Profiler built atop Nvbit (NVidia Binary Instrumentation Tool) framework. It analyzes memory accesses to memory objects in GPU memory, including Unified Memory, to optimize memory usage and reveal performance bottlenecks.

Peng, Bo↗

DOE OSTI2024

pnnl/emp-gnn

Efficient Graph Neural Network for Predicting Molecular Properties software can compare the prediction quality with ab initio DFT results reported by the high-performance state-of-theart NWChem quantum chemistry package [1] through Mean Absolute Error (MAE) obtained by the fitting between DFT and model predictions i.e, MPNN [2]. We also demonstrated the performance benefits by grouping large molecules by atom sizes, and executing GNN models on different types of resources. Since the training times depend on the number of atoms, we demonstrate the impact of distributing the workloads on two GPUs with varying capabilities (e.g., NVIDIA A100 vs. GeForce RTX 2080 Ti) to optimize the efficiency. We are at the precipice of broad adoption of GNNs for molecular property prediction tasks; hence, our work is timely by comparing model prediction against classical approaches with the intent of providing initial screening for specific classes of molecules.

Lee, Hyungro↗

DOE OSTI2020

s-blas

This package includes the implementation for four sparse linear algebra kernels: Sparse-Matrix-Vector-Multiplication (SpMV), Sparse-Triangular-Solve (SpTRSV), Sparse-Matrix-Transposition (SpTrans) and Sparse-Matrix-Matrix-Multiplication (SpMM) for Single-node Multi-GPU (scale-up) platforms such as NVIDIA DGX-1 and DGX-2.

Li, Ang↗

DOE OSTI2024

DualSPHysics-INL

Funded by the DOE's Bioenergy Technology Office through the Feedstock-Conversion Interface Consortium, INL researchers developed this code to model biomass freestock flow in various handling equipment, such as hoppers and augers. Built on top of an existing open-source code DualSPHysics (https://dual.sphysics.org/) , the enrichment includes modification of the mass conservation equation that switching tracking density to void ratio, adding a hypoplastic constitutive law to better capture the flow physics of this type of material and implementing a novel boundary condition that can handle the dynamic contact between material and equipment. All implementation were realized via Nvidia CUDA, so GPU accelaration can be leveraged to signifiantly speed up the computational process.

Jin, Wencheng [Idaho National Laboratory (INL), Id↗

DOE OSTI2025

OpenARC

OpenARC is an open-sourced, very High-Level Intermediate Representation (HLIR)-based, extensible compiler framework, where various performance optimizations, traceability mechanisms, fault tolerance techniques, etc., can be built for better debuggability/performance/resilience on the complex accelerator computing. OpenARC is the first OpenACC compiler supporting Altera FPGAs, in addition to NVIDIA GPUs, AMD GPUs, and Intel Xeon Phis.

Lee, Seyong [Oak Ridge National Laboratory (ORNL),↗