Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “MOSFETs”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 253 records · Page 14
All sourcesNASA NTRSDOE OSTI
NASA NTRS2001

Radiation Effects on DC-DC Converters

In this work, several DC-DC converters were designed and built. The converters are Buck Buck-Boost, Cuk, Flyback, and full-bridge zero-voltage switched. The total ionizing dose radiation and single event effects on the converters were investigated. The experimental results for the TID effects tests show that the voltages of the Buck Buck-Boost, Cuk, and Flyback converters increase as total dose increased when using power MOSFET IRF250 as a switching transistor. The change in output voltage with total dose is highest for the Buck converter and the lowest for Flyback converter. The trend of increase in output voltages with total dose in the present work agrees with those of the literature. The trends of the experimental results also agree with those obtained from PSPICE simulation. For the full-bridge zero-voltage switch converter, it was observed that the dc-dc converter with IRF250 power MOSFET did not show a significant change of output voltage with total dose. In addition, for the dc-dc converter with FSF254R4 radiation-hardened power MOSFET, the output voltage did not change significantly with total dose. The experimental results were confirmed by PSPICE simulation that showed that FB-ZVS converter with IRF250 power MOSFET's was not affected with the increase in total ionizing dose. Single Event Effects (SEE) radiation tests were performed on FB-ZVS converters. It was observed that the FB-ZVS converter with the IRF250 power MOSFET, when the device was irradiated with Krypton ion with ion-energy of 150 MeV and LET of 41.3 MeV-square cm/mg, the output voltage increased with the increase in fluence. However, for Krypton with ion-energy of 600 MeV and LET of 33.65 MeV-square cm/mg, and two out of four transistors of the converter were permanently damaged. The dc-dc converter with FSF254R4 radiation hardened power MOSFET's did not show significant change at the output voltage with fluence while being irradiated by Krypton with ion energy of 1.20 GeV and LET of 25.97 MeV-square cm/mg. This might be due to fact that the device is radiation hardened.

Zhang, De-Xin↗
DOE OSTI2021

Silicon carbide power inverter/rectifier for electric machines

The present disclosure involves a two stage inverter, a system for electrical power conversation, and a method of converting electrical power using silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs). One example implementation includes using two or more SiC MOSFETs in series with each MOSFET having a gate terminal for triggering a state switch between an on (conducting) and off (non-conducting) state of the MOSFET. An AC terminal is connected between the series SiC MOSFETS, and the series SiC MOSFETs are connected across a DC bus and in parallel with one or more capacitors.

Shenoy, Suratkal P.↗
NASA NTRS2010

Re-Verification of the IRHN57133SE and IRHN57250SE for Single Event Gate Rupture and Single Event Burnout

The vertical metal oxide semiconductor field-effect transistor (MOSFET) is a widely used power transistor onboard a spacecraft. The MOSFET is typically employed in power supplies and high current switching applications. Due to the inherent high electric fields in the device, power MOSFETs are sensitive to heavy ion irradiation and can fail catastrophically as a result of single event gate rupture (SEGR) or single event burnout (SEB). Manufacturers have designed radiation-hardened power MOSFETs for space applications. These radiation hardened devices are not immune to SEGR or SEB but, rather, can exhibit them at a much more damaging ion than their non-radiation hardened counterparts. See [1] through [5] for more information.This effort was to investigate the SEGR and SEB responses of two power MOSFETs from IR(the IRHN57133SE and the IRHN57250SE) that have recently been produced on a new fabrication line. These tests will serve as a limited verification of these parts, but it is acknowledged that further testing on the respective parts may be needed for some mission profiles.

Single Event Gate Rupture (SEGR)↗
NASA NTRS2006

Four-Quadrant Analog Multipliers Using G4-FETs

Theoretical analysis and some experiments have shown that the silicon-on-insulator (SOI) 4-gate transistors known as G4-FETs can be used as building blocks of four-quadrant analog voltage multiplier circuits. Whereas a typical prior analog voltage multiplier contains between six and 10 transistors, it is possible to construct a superior voltage multiplier using only four G4-FETs. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET). It can be regarded as a single transistor having four gates, which are parts of a structure that affords high functionality by enabling the utilization of independently biased multiple inputs. The structure of a G4-FET of the type of interest here (see Figure 1) is that of a partially-depleted SOI MOSFET with two independent body contacts, one on each side of the channel. The drain current comprises of majority charge carriers flowing from one body contact to the other that is, what would otherwise be the side body contacts of the SOI MOSFET are used here as the end contacts [the drain (D) and the source (S)] of the G4-FET. What would otherwise be the source and drain of the SOI MOSFET serve, in the G4-FET, as two junction-based extra gates (JG1 and JG2), which are used to squeeze the channel via reverse-biased junctions as in a JFET. The G4-FET also includes a polysilicon top gate (G1), which plays the same role as does the gate in an accumulation-mode MOSFET. The substrate emulates a fourth MOS gate (G2). By making proper choices of G4-FET device parameters in conjunction with bias voltages and currents, one can design a circuit in which two input gate voltages (Vin1,Vin2) control the conduction characteristics of G4-FETs such that the output voltage (Vout) closely approximates a value proportional to the product of the input voltages. Figure 2 depicts two such analog multiplier circuits. In each circuit, there is the following: The input and output voltages are differential, The multiplier core consists of four G4- FETs (M1 through M4) biased by a constant current sink (Ibias), and The G4-FETs in two pairs are loaded by two identical resistors (RL), which convert a differential output current to a differential output voltage. The difference between the two circuits stems from their input and bias configurations. In each case, provided that the input voltages remain within their design ranges as determined by considerations of bias, saturation, and cutoff, then the output voltage is nominally given by Vout = kVin1Vin2, where k is a constant gain factor that depends on the design parameters and is different for the two circuits. In experimental versions of these circuits constructed using discrete G4- FETs and resistors, multiplication of voltages in all four quadrants (that is, in all four combinations of input polarities) was demonstrated, and deviations of the output voltages from linear dependence on the input voltages were found to amount to no more than a few percent. It is anticipated that in fully integrated versions of these circuits, the deviations from linearity will be made considerably smaller through better matching of devices.

Mojarradi, Mohammad↗
NASA NTRS1982

Design, production, and testing of field effect transistors

Cryogenic MOSFETS (CRYOFETS), specifically designed for low temperature preamplifier application with infrared extrinsic detectors were produced and comparatively tested with p-channel MOSFETs under matched conditions. The CRYOFETs exhibit lower voltage thresholds, high source-follower gains at lower bias voltage, and lower dc offset source voltage. The noise of the CRYOFET is found to be 2 to 4 times greater than the MOSFET with a correspondingly lower figure of merit (which is established for source-follower amplifiers). The device power dissipation at a gain of 0.98 is some two orders of magnitude lower than for the MOSFET. Further, CRYOFETs are free of low temperature I vs V character hysteresis and balky conduction turn-on effects and operate effectively in the 2.4 to 20 K range. These devices have promise for use on long term duration sensor missions and for on-focal-plane signal processing at low temperatures.

Sclar, N.↗
NASA NTRS1992

Silicon device performance measurements to support temperature range enhancement

Testing of the metal oxide semiconductor (MOS)-controlled thyristor (MCT) has uncovered a failure mechanism at elevated temperature. The failure appears to be due to breakdown of the gate oxide. Further testing is underway to verify the failure mode. Higher current level inverters were built to demonstrate 200 C operation of the N-MOSFET's and insulated-gate-bipolar transistors (IGBT's) and for life testing. One MOSFET failed early in testing. The origin of this failure is being studied. No IGBT's have failed. A prototype 28-to-42 V converter was built and is being tested at room temperature. The control loop is being finalized. Temperature stable, high value (10 micro-F) capacitors appear to be the limiting factor in the design at this time. In this application, the efficiency will be lower for the IGBT version due to the large V sub(cesat) (3.5-4 V) compared to the input voltage of 28 V. The MOSFET version should have higher efficiency; however, the MOSFET does not appear to be as robust at 200 C. Both versions are built for comparison.

Bromstead, James↗
NASA NTRS2008

SiC JFET Transistor Circuit Model for Extreme Temperature Range

A technique for simulating extreme-temperature operation of integrated circuits that incorporate silicon carbide (SiC) junction field-effect transistors (JFETs) has been developed. The technique involves modification of NGSPICE, which is an open-source version of the popular Simulation Program with Integrated Circuit Emphasis (SPICE) general-purpose analog-integrated-circuit-simulating software. NGSPICE in its unmodified form is used for simulating and designing circuits made from silicon-based transistors that operate at or near room temperature. Two rapid modifications of NGSPICE source code enable SiC JFETs to be simulated to 500 C using the well-known Level 1 model for silicon metal oxide semiconductor field-effect transistors (MOSFETs). First, the default value of the MOSFET surface potential must be changed. In the unmodified source code, this parameter has a value of 0.6, which corresponds to slightly more than half the bandgap of silicon. In NGSPICE modified to simulate SiC JFETs, this parameter is changed to a value of 1.6, corresponding to slightly more than half the bandgap of SiC. The second modification consists of changing the temperature dependence of MOSFET transconductance and saturation parameters. The unmodified NGSPICE source code implements a T(sup -1.5) temperature dependence for these parameters. In order to mimic the temperature behavior of experimental SiC JFETs, a T(sup -1.3) temperature dependence must be implemented in the NGSPICE source code. Following these two simple modifications, the Level 1 MOSFET model of the NGSPICE circuit simulation program reasonably approximates the measured high-temperature behavior of experimental SiC JFETs properly operated with zero or reverse bias applied to the gate terminal. Modification of additional silicon parameters in the NGSPICE source code was not necessary to model experimental SiC JFET current-voltage performance across the entire temperature range from 25 to 500 C.

Neudeck, Philip G.↗
NASA NTRS2006

Submicrosecond Power-Switching Test Circuit

A circuit that changes an electrical load in a switching time shorter than 0.3 microsecond has been devised. This circuit can be used in testing the regulation characteristics of power-supply circuits . especially switching power-converter circuits that are supposed to be able to provide acceptably high degrees of regulation in response to rapid load transients. The combination of this power-switching circuit and a known passive constant load could be an attractive alternative to a typical commercially available load-bank circuit that can be made to operate in nominal constant-voltage, constant-current, and constant-resistance modes. The switching provided by a typical commercial load-bank circuit in the constant-resistance mode is not fast enough for testing of regulation in response to load transients. Moreover, some test engineers do not trust the test results obtained when using commercial load-bank circuits because the dynamic responses of those circuits are, variously, partly unknown and/or excessively complex. In contrast, the combination of this circuit and a passive constant load offers both rapid switching and known (or at least better known) load dynamics. The power-switching circuit (see figure) includes a signal-input section, a wide-hysteresis Schmitt trigger that prevents false triggering in the event of switch-contact bounce, a dual-bipolar-transistor power stage that drives the gate of a metal oxide semiconductor field-effect transistor (MOSFET), and the MOSFET, which is the output device that performs the switching of the load. The MOSFET in the specific version of the circuit shown in the figure is rated to stand off a potential of 100 V in the "off" state and to pass a current of 20 A in the "on" state. The switching time of this circuit (the characteristic time of rise or fall of the potential at the drain of the MOSFET) is .300 ns. The circuit can accept any of three control inputs . which one depending on the test that one seeks to perform: a repetitive waveform from a signal generator, momentary closure of a push-button switch, or closure or opening of a manually operated on/off switch. In the case of a signal generator, one can adjust the frequency and duty cycle as needed to obtain the desired AC power-supply response, which one could display on an oscilloscope. Momentary switch closure could be useful for obtaining (and, if desired, displaying on an oscilloscope set to trigger on an event) the response of a power supply to a single load transient. The on/off switch can be used to switch between load states in which static-load regulation measurements are performed.

Folk, Eric N.↗
DOE OSTI2021

Instability Issue of Paralleled Dies in an SiC Power Module in Solid-State Circuit Breaker Applications

Paralleled dies in a power module could have instability issues during high current switching transients. Here, the instability is caused by the differential-mode oscillation among paralleled MOSFETs. Conventional analyses of paralleled MOSFETs’ stability are normally limited to a single operating point, which ignores the influences of the switching trajectory and nonlinear device parameters on stability. This article reveals that the switching trajectory can significantly influence parallel stability. The analysis is improved by solving eigenvalues of state-space modeling system matrices of all operating points that the switching trajectory goes through considering nonlinear device parameters. Higher voltage and current stresses result in greater real parts of complex eigenvalues, which explains why the paralleled MOSFETs are more unstable with higher voltage and current stresses. To improve stability in solid-state circuit breaker applications, we propose a method to manipulate the switching trajectory to avoid the unstable region where the conventional hard switching trajectory normally goes through. Experimental results show that the turn- off current capability can be increased from ~five times of rated current with the gate oscillation using the conventional turn- off trajectory to ~ten times of rated current without the gate oscillation using the optimal turn- off trajectory.

42 ENGINEERING↗
DOE OSTI2020

Graphite-Embedded High-Performance Insulated Metal Substrate for Wide-Bandgap Power Modules

Emerging wide-bandgap (WBG) semiconductor devices such as silicon carbide (SiC) metal–oxide semiconductor field-effect transistors (MOSFETs) and gallium nitride high-electron-mobility transistors can handle high power in reduced semiconductor areas better than conventional Si-based devices owing to superior material properties. With increased power loss density in a WBG-based converter and reduced die size in power modules, thermal management of power devices must be optimized for high performance. Here, we present a graphite-embedded insulated metal substrate (thermally-annealed-pyrolytic-graphite-embedded insulated metal substrate—IMSwTPG) designed for WBG power modules. Theoretical thermal performance analysis of graphite-embedded metal cores is presented, with design details for IMSwTPG with embedded graphite to replace a direct-bonded copper (DBC) substrate. The proposed IMSwTPG is compared with an aluminum nitride-based DBC substrate using finite-element thermal analysis for steady-state and transient thermal performance. The solutions’ thermal performances are compared under different coolant temperature and thermal loading conditions, and the proposed substrate's electrical performance is validated with static and dynamic characterization. Using graphite-embedded substrates, junction-to-case thermal resistance of SiC MOSFETs can be reduced up to 17%, and device current density can be increased by 10%, regardless of the thermal management strategy used to cool the substrate. Reduced transient thermal impedance of up to 40% of dies owing to increased heat capacity is validated in transient thermal simulations and experiments. The half-bridge power module's electrical performance is evaluated for on -state resistance, switching performance, and switching loss at three junction temperature conditions. The proposed substrate solution has minimal impact on conduction and switching performance of SiC MOSFETs.

42 ENGINEERING↗
DOE OSTI2020

1.2 kV, 10 A, 4H-SiC Bi-Directional Field Effect Transistor (BiDFET) with Low On-State Voltage Drop

Bidirectional power switches are used in matrix-or cyclo-converters and in multistage inverter circuits to facilitate high-frequency AC-to-AC conversion. A new 1.2 kV bidirectional MOSFET (BiDFET) with low on-resistance is achieved and demonstrated using two discrete SiC power MOSFET bare die chips, packaged within a four-terminal custom-designed module. Static and dynamic characterization has been carried out to inspect the on-state and switching behaviour of the BiDFET. Here, the BiDFET is shown to have a low forward voltage drop of 0.6 V at a current of 10 A, which is more than 2.5x smaller than previous Si IGBT and SiC MOSFET based bidirectional switch implementations.

36 MATERIALS SCIENCE↗
DOE OSTI2021

Efficiency Optimization of Dual Active Bridge Converter Based on dV/dt Snubber Capacitors

This paper presents a lossless regenerative dV/dt snubber circuit for PWM converters to achieve high-efficiency high power-density without significant cost and reliability penalties. The dV/dt snubber employs lossless capacitors for each MOSFET device in a converter to provide an additional path to store the switching energy during turn-off transient and decrease the actual turn-off loss of the MOSFET channel. A novel mathematical turn-off loss model is built to separate the actual turn-off loss of the MOSFET channel and the recycling switching energy stored in the total equivalent output capacitance including Coss, the dV/dt snubber, and etc. Necessary snubber optimization strategy is proposed in order to balance the turn-off loss with ZVS operation range and deadtime conduction loss, and thereby achieving an optimal efficiency performance. To prove the validity and accuracy of the novel turn-off loss model and optimization strategy, the dV/dt snubber has been incorporated into a 1.3kV/200kW DC/DC and a 1kV/70kVA DC/AC PWM converters. Experimental results are given to demonstrate the validity of the proposed dV/dt snubber capacitors and optimization strategy.

Xu, Wei↗
DOE OSTI2023

A Smart Silicon Carbide Power Module With Pulse Width Modulation Over Wi-Fi and Wireless Power Transfer-Enabled Gate Driver, Featuring Onboard State of Health Estimator and High-Voltage Scaling Capabilities

A wide range of utility applications require controllable switches with features such as high-voltage blocking and high-current carrying capacity, especially at high pulse width modulation (PWM) frequency. Low- and medium-voltage utility applications such as motor drives and flexible AC transmission systems as well as solid state transformers could also benefit from a low-cost high-voltage switching module. Wide-bandgap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) metal oxide semiconductor field effect transistors (MOSFETs) are considered to be the present and next-generation device choices, although they have limitations. For relatively high-voltage applications with demanding thermal management, SiC is still the only choice, and GaN dominates the low-voltage regime. This manuscript proposes a new half-bridge power MOSFET module that is suitable for conventional H-bridge of multilevel configurations used in high-voltage applications. Constructed from bare SiC dies, this half-bridge module takes advantage of (1) optimized MOSFET placement inside the module, (2) customized heat exchanger, manifold, and cooling, (3) integrated gate driver module with pulse width modulation (PWM) over wi-fi to eliminate the need for low-voltage signals, (4) wireless power transfer (WPT)-enabled gate driver and other ancillary circuits, (5) and the option to incorporate an onboard state-of-health (SOH) estimator module. The entire architecture has been designed and built at the National Renewable Energy Laboratory (NREL) in Golden, CO.

Ga2O3 devices↗
DOE OSTI2020

Investigation of Dynamic Temperature-Sensitive Electrical Parameters for Medium-Voltage Low-Current Silicon Carbide and Silicon Devices

This paper presents five dynamic temperature-sensitive electrical parameters (TSEPs) for the medium-voltage silicon carbide (SiC) and silicon (Si) devices. The theoretical temperature dependence of these parameters is analyzed. A test platform that enables to implement the temperature relevant dynamic characterization is developed. The tested TSEPs are summarized in terms of their relationship with junction temperature, drain/collector current, DC voltage, and external gate resistance. The comparison between the 3 kV 12 A Si IGBT and 3.3 kV 5 A SiC MOSFET with the identical TO-263 package is conducted. The results verify that the turn-off drain-source voltage switching rate achieves better thermal sensitivity for medium-voltage low-current SiC MOSFETs compared with Si IGBTs. Both the turn-on and turn-off delay time exhibit better thermal linearity for the two devices. The turn-off delay time further achieves five times better thermal sensitivity than the turn-on delay time for investigated medium-voltage SiC MOSFETs.

Ni, Ze↗
NASA NTRS1971

Forecasting of the performance of MOS device for space applications

Analysis of radiation damage of MOSFET data from Explorer 34 (IMP-F), and radiation damage characteristics of MOSFET with boron diffused between a silicon semiconductor and silicon oxide are considered. The first subject is an interpretation of the discrepancy between the space data and the laboratory data. The second subject is an attempt to analyze the radiation damage characteristic of MOSFET when there is modification of electrical properties in the gate oxide region.

Fang, P. H.↗
NASA NTRS1985

Evaluation of semiconductor devices for Electric and Hybrid Vehicle (EHV) ac-drive applications, volume 1

The results of evaluation of power semiconductor devices for electric hybrid vehicle ac drive applications are summarized. Three types of power devices are evaluated in the effort: high power bipolar or Darlington transistors, power MOSFETs, and asymmetric silicon control rectifiers (ASCR). The Bipolar transistors, including discrete device and Darlington devices, range from 100 A to 400 A and from 400 V to 900 V. These devices are currently used as key switching elements inverters for ac motor drive applications. Power MOSFETs, on the other hand, are much smaller in current rating. For the 400 V device, the current rating is limited to 25 A. For the main drive of an electric vehicle, device paralleling is normally needed to achieve practical power level. For other electric vehicle (EV) related applications such as battery charger circuit, however, MOSFET is advantageous to other devices because of drive circuit simplicity and high frequency capability. Asymmetrical SCR is basically a SCR device and needs commutation circuit for turn off. However, the device poses several advantages, i.e., low conduction drop and low cost.

Lee, F. C.↗
NASA NTRS1993

Fast Overcurrent Tripping Circuit

Fast overcurrent tripping circuit designed for incorporation into power metal oxide/semiconductor field-effect transistor (MOSFET) switching circuit. Serves as fast electronic circuit breaker by sensing voltage across MOSFET's during conduction and switching MOSFET's off within 1 microsecond after voltage exceeds reference value corresponding to tripping current. Acts more quickly than Hall-effect current sensor and, in comparison with shunt current-measuring circuits, smaller and consumes less power. Also ignores initial transient overcurrents during first 5 microseconds of switching cycle.

Sullender, Craig C.↗
NASA NTRS1992

CRRES microelectronic test chip orbital data. II

Data from a MOSFET matrix on two JPL (CIT Jet Propulsion Laboratory) CRRES (Combined Release and Radiation Effects Satellite) chips, each behind different amounts of shielding, are presented. Space damage factors are nearly identical to ground test values for pMOSFETs. The results from neighboring rows of MOSFETs show similar radiation degradation. The SRD (Space Radiation Dosimeter) is used to measure the total dose accumulated by the JPL chips. A parameter extraction algorithm that does not underestimate threshold voltage shifts is used. Temperature effects are removed from the MOSFET data.

Soli, G. A.↗