Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “Chips”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 253 records · Page 14

Harvesting Losses for a Cut-and-Chip Harvesting System Operating in Willow Short-Rotation Coppice

In any short-rotation coppice (SRC) operation, a certain percentage of harvestable material is unrecovered, which contributes to harvesting system losses. This material may be in the form of merchantable and non-merchantable components. These losses affect economics but also influence yield, nutrient cycling, and carbon sequestration. There are very few estimates for harvesting losses available in the literature, and they are limited by small sample sizes. The objective of this work was to provide a broad overview of harvesting losses in willow SRC over a wide range of standing biomass and harvesting conditions. The average total harvesting losses were between 3 and 4 Mg ha−1, which is between 6 and 7 percent of the standing biomass. Losses can spike to nearly 40% on less than 3% of the area. Harvesting losses are significantly, but weakly, correlated with increased standing biomass. These results highlight the complexity and variability in harvesting losses as well as which aspects of harvesting systems might be targeted to reduce or partition material losses. These results have implications for designing machinery and economic modeling of these systems.

Eisenbies, Mark H.↗

Cleaner Chips: Decarbonization in Semiconductor Manufacturing

The growth of the information and communication technology sector has vastly accelerated in recent decades because of advancements in digitalization and Artificial Intelligence (AI). Scope 1, 2, and 3 greenhouse gas emissions data of the top six semiconductor manufacturing companies (Samsung Electronics, Taiwan Semiconductor Manufacturing Corporation, Micron, SK Hynix, Kioxia, and Intel) were gathered from the publicly accessible Carbon Disclosure Project’s (CDP) website for 2020. Scope 3 emissions had the largest share in total annual emissions with an average share of 52%, followed by Scope 2 (32%) and Scope 1 (16%). Because of the absence of a standardized methodology for Scope 3 emissions estimation, each company used different methodologies that resulted in differences in emissions values. An analysis of the CDP reporting data did not reveal information on strategies implemented by companies to reduce Scope 3 emissions. The use of renewable energy certificates had the largest effect on decarbonization centered on reducing Scope 2 emissions, followed by the deployment of perfluorocarbon reduction technologies to help reduce Scope 1 fugitive emissions. Technology-specific marginal abatement costs of CO2 were also estimated and varied between −416 and 12,215 USD/t CO2 eq., which primarily varied depending on the technology deployed.

42 ENGINEERING↗

A High Gain Lens-Coupled On-Chip Antenna Module for Miniature-Sized Millimeter-Wave Wireless Transceivers

This paper presents high gain and compact Transmit/Receive (TX/RX) integrated antennas in a standard BiCMOS 130nm technology for millimeter-scale millimeter-wave (mm-wave) applications, including high data rate radios and high resolution radars. The proposed TX/RX antenna module utilizes an integrated dipole antenna for the receiver and a slot antenna for the transmitter, placed orthogonally. The achieved gain and radiation efficiency are 5.7dBi and 41.3% for the slot antenna, respectively, and 6dBi and 39% for the dipole antenna. The link budget is improved by 16dB by optimization on the geometry aswell as application of a high resistivity hemispheric silicon dielectric lens.

Engineering↗

Laminated magnetic materials for on-chip magnetic inductors/transformers

A technique relates to a method of forming a laminated multilayer magnetic structure. An adhesion layer is deposited on a substrate. A magnetic seed layer is deposited on top of the adhesion layer. Magnetic layers and non-magnetic spacer layers are alternatingly deposited such that an even number of the magnetic layers is deposited while an odd number of the non-magnetic spacer layers is deposited. The odd number is one less than the even number. Every two of the magnetic layers is separated by one of the non-magnetic spacer layers. The first of the magnetic layers is deposited on the magnetic seed layer, and the magnetic layers each have a thickness less than 500 nanometers.

36 MATERIALS SCIENCE↗

Laminated magnetic materials for on-chip magnetic inductors/transformers

A technique relates to a method of forming a laminated multilayer magnetic structure. An adhesion layer is deposited on a substrate. A magnetic seed layer is deposited on top of the adhesion layer. Magnetic layers and non-magnetic spacer layers are alternatingly deposited such that an even number of the magnetic layers is deposited while an odd number of the non-magnetic spacer layers is deposited. The odd number is one less than the even number. Every two of the magnetic layers is separated by one of the non-magnetic spacer layers. The first of the magnetic layers is deposited on the magnetic seed layer, and the magnetic layers each have a thickness less than 500 nanometers.

36 MATERIALS SCIENCE↗

Hybrid chip-on-board LED module with patterned encapsulation

Light modules and methods of forming light modules are disclosed. A light module includes a first plurality and a second plurality of light emitting elements configured to emit, respectively, a first light and a second light, and both arranged on a substrate. An encapsulation layer is disposed over the first and second plurality of the light emitting elements, and a wavelength converting element is dispersed in the encapsulation layer. A concentration of the wavelength converting element in the encapsulation layer varies, is larger over the first plurality of light emitting elements and is smaller over the second plurality of light emitting elements.

Soer, Wouter Anthon↗

FET Junction Temperature Monitoring Using Novel On-Chip Solution

A novel junction temperature monitoring sensor is proposed and experimentally demonstrated for application in MOS-gate power devices. The sensor is created using the polycide gate electrode layer of the devices to create a temperature-sensitive resistor without any additional fabrication steps. The resistor is located on the field oxide with one end grounded at the device reference terminal to isolate it from the device current and voltage transients. It allows in-situ monitoring of the device junction temperature during active circuit operation. The technology has been implemented to monitor the junction temperature of Silicon Carbide Junction Barrier Schottky Field Effect Transistors (SiC JBSFETs) with the bi-directional FET (BiDFET).

Bidirectional switches, SiC bidirectional FET, BiD↗

Temperature-tuned ultrafast X-ray shutter using optics-on-a-chip

Typically modulation systems are incapable of performing synchronous modulation for high-energy radiation systems. A method and system for performing high-energy synchronous radiation modulating is described. The method includes providing an oscillatory diffractive element, with the oscillatory diffractive element capable of being oscillated over a range of angles. A radiation source provides radiation to the oscillatory diffractive element. An electrical signal is provided to electrodes that oscillate the oscillatory diffractive element to modulate the radiation. A temperature controller controls the temperature of the oscillatory diffractive element to tune the oscillatory motion of the oscillatory diffractive element.

Wang, Jin↗