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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 235 records · Page 13
All sourcesNASA NTRSDOE OSTI
NASA NTRS1985

High-voltage, high-power, solid-state remote power controllers for aerospace applications

Two general types of remote power controller (RPC) that combine the functions of a circuit breaker and a switch were developed for use in direct-current (dc) aerospace systems. Power-switching devices used in these designs are the relatively new gate-turnoff thyristor (GTO) and poweer metal-oxide-semiconductor field-effect transistors (MOSFET). The various RPC's can switch dc voltages to 1200 V and currents to 100 A. Seven different units were constructed and subjected to comprehensive laboratory and thermal vacuum testing. Two of these were dual units that switch both positive and negative voltages simultaneously. The RPC's using MOSFET's have slow turnon and turnoff times to limit voltage spiking from high di/dt. The GTO's have much faster transition times. All RPC's have programmable overload tripout and microsecond tripout for large overloads. The basic circuits developed can be used to build switchgear limited only by the ratings of the switching device used.

Sturman, J. C.↗
NASA NTRS1980

Some queuing network models of computer systems

Queuing network models of a computer system operating with a single workload type are presented. Program algorithms are adapted for use on the Texas Instruments SR-52 programmable calculator. By slightly altering the algorithm to process the G and H matrices row by row instead of column by column, six devices and an unlimited job/terminal population could be handled on the SR-52. Techniques are also introduced for handling a simple load dependent server and for studying interactive systems with fixed multiprogramming limits.

Herndon, E. S.↗
NASA NTRS2002

Low Power Transceiver

One of the FREESTAR experiments, the Low Power Transceiver (LPT) experiment is a low-power, lightweight software programmable transceiver prototype technology demonstration that is being developed by NASA as a low-cost S-band spacecraft navigation and communication device. The LPT prototype receives Global Positioning System (GPS) satellite signals for spacecraft navigation support and provides both forward and return, low-rate data communications links to the Merritt Island (MILA) and Dryden Flight Research Facility (DFRC) ground stations and to the Tracking and Data Relay Satellite System (TDRSS). The experiment is designed to demonstrate the system's ability to do simultaneous communications and navigation, as well as multi-mode communications and reconfiguration. LPT is managed by NASA's Goddard Space Flight Center and sponsored by NASA/HQ Code M. The LPT experiment consists of one thermally conductive box containing the electronics stack, three S-band antennas and one L-band antenna. The LPT payload uses general Orbiter services, including power control, command, and telemetry provided through the HHC avionics. On-orbit, the LPT payload will be primarily operated via direct communications between LPT and ground stations (MILA, WLPS, or DFRC) and/or TDRSS, with backup command and telemetry capability provided via the hitchhiker avionics and remote Payload Operations Control Center. During operations, LPT will utilize high Sband frequencies for communications. The LPT TDRSS (and GN) forward link (uplink) frequency is 2106.40625 MHz and their TDRSS (and GN) return link (downlink) frequency is 2287.5 MHz (utilizing Left-handed Circular Polarization to work with the TDRSS MA system). Two standard switch panel switches will be utilized to prohibit inadvertent operation of the antenna. An additional inhibit will be provided through the HH avionics power relay to the LPT.

Source record↗
NASA NTRS1993

Acoustic charge transport technology investigation for advanced development transponder

Acoustic charge transport (ACT) technology has provided a basis for a new family of analog signal processors, including a programmable transversal filter (PTF). Through monolithic integration of ACT delay lines with GaAs metal semiconductor field effect transistor (MESFET) digital memory and controllers, these devices significantly extend the performance of PTF's. This article introduces the basic operation of these devices and summarizes their present and future specifications. The production and testing of these devices indicate that this new technology is a promising one for future space applications.

Kayalar, S.↗
NASA NTRS2003

Design of a Ferroelectric Programmable Logic Gate Array

A programmable logic gate array has been designed utilizing ferroelectric field effect transistors. The design has only a small number of gates, but this could be scaled up to a more useful size. Using FFET's in a logic array gives several advantages. First, it allows real-time programmability to the array to give high speed reconfiguration. It also allows the array to be configured nearly an unlimited number of times, unlike a FLASH FPGA. Finally, the Ferroelectric Programmable Logic Gate Array (FPLGA) can be implemented using a smaller number of transistors because of the inherent logic characteristics of an FFET. The device was only designed and modeled using Spice models of the circuit, including the FFET. The actual device was not produced. The design consists of a small array of NAND and NOR logic gates. Other gates could easily be produced. They are linked by FFET's that control the logic flow. Timing and logic tables have been produced showing the array can produce a variety of logic combinations at a real time usable speed. This device could be a prototype for a device that could be put into imbedded systems that need the high speed of hardware implementation of logic and the complexity to need to change the logic algorithm. Because of the non-volatile nature of the FFET, it would also be useful in situations that needed to program a logic array once and use it repeatedly after the power has been shut off.

MacLeod, Todd C.↗
NASA NTRS2009

G(sup 4)FET Implementations of Some Logic Circuits

Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration of the adjustable-threshold inverter is similar to that of an ordinary complementary metal oxide semiconductor (CMOS) inverter except that an NMOSFET (a MOSFET having an n-doped channel and a p-doped Si substrate) is replaced by an n-channel G(sup 4)FET

Mojarradi, Mohammad↗
NASA NTRSDate not supplied

Testing of A Photon-Counting Optical Ground Receiver With Emulated Space-to-Ground Link Effects

The National Aeronautics and Space Administration (NASA) Glenn Research Center (GRC) developed and previously characterized a photon-counting optical ground receiver system. The receiver is compliant with the Consultative Committee for Space Data Systems (CCSDS) Optical Communications Coding and Synchronization High Photon Efficiency (HPE) Standard. The standard will be used on the Optical Artemis-2 Orion (O2O) communications demonstration and the Deep Space Optical Communication (DSOC) project aboard the Psyche spacecraft. The receiver system consists of a fiber interconnect, up to sixteen superconducting nanowire single-photon detectors (SNSPDs), and a field programmable gate array (FPGA) based receive modem. Previously, the receiver system architecture was described and test results without emulated link effects were presented. SNSPD device properties, which impact detection jitter and time delay, can limit the receiver dynamic range, especially when operating with varying flux rates (>10 dB) between detectors. Codeword error-rate curves with and without simulated clock drifts attributed to Doppler shift and space transmitter clock differences are presented. Results with ±66 ppm clock differences show minimal performance impact (<0.2 dB). Test results show that the receiver dynamic range (>28 dB) is limited by changing SNSPD detection delays at high photon flux rates.

optical communications↗
NASA NTRSDate not supplied

Testing of A Photon-Counting Optical Ground Receiver With Emulated Space-to-Ground Link Effects

The National Aeronautics and Space Administration (NASA) Glenn Research Center (GRC) developed and previously characterized a photon-counting optical ground receiver system. The receiver is compliant with the Consultative Committee for Space Data Systems (CCSDS) Optical Communications Coding and Synchronization High Photon Efficiency (HPE) Standard. The standard will be used on the Optical Artemis-2 Orion (O2O) communications demonstration and the Deep Space Optical Communication (DSOC) project aboard the Psyche spacecraft. The receiver system consists of a fiber interconnect, up to sixteen superconducting nanowire single-photon detectors (SNSPDs), and a field programmable gate array (FPGA) based receive modem. Previously, the receiver system architecture was described and test results without emulated link effects were presented. SNSPD device properties, which impact detection jitter and time delay, can limit the receiver dynamic range, especially when operating with varying flux rates (>10 dB) between detectors. Codeword error-rate curves with and without simulated clock drifts attributed to Doppler shift and space transmitter clock differences are presented. Results with ±66 ppm clock differences show minimal performance impact (<0.2 dB). Test results show that the receiver dynamic range (>28 dB) is limited by changing SNSPD detection delays at high photon flux rates.

optical communications↗
NASA NTRS1982

Electrically reconfigurable logic array

To compose the complicated systems using algorithmically specialized logic circuits or processors, one solution is to perform relational computations such as union, division and intersection directly on hardware. These relations can be pipelined efficiently on a network of processors having an array configuration. These processors can be designed and implemented with a few simple cells. In order to determine the state-of-the-art in Electrically Reconfigurable Logic Array (ERLA), a survey of the available programmable logic array (PLA) and the logic circuit elements used in such arrays was conducted. Based on this survey some recommendations are made for ERLA devices.

Agarwal, R. K.↗
NASA NTRS1991

Development of visual 3D virtual environment for control software

Virtual environments for software visualization may enable complex programs to be created and maintained. A typical application might be for control of regional electric power systems. As these encompass broader computer networks than ever, construction of such systems becomes very difficult. Conventional text-oriented environments are useful in programming individual processors. However, they are obviously insufficient to program a large and complicated system, that includes large numbers of computers connected to each other; such programming is called 'programming in the large.' As a solution for this problem, the authors are developing a graphic programming environment wherein one can visualize complicated software in virtual 3D world. One of the major features of the environment is the 3D representation of concurrent process. 3D representation is used to supply both network-wide interprocess programming capability (capability for 'programming in the large') and real-time programming capability. The authors' idea is to fuse both the block diagram (which is useful to check relationship among large number of processes or processors) and the time chart (which is useful to check precise timing for synchronization) into a single 3D space. The 3D representation gives us a capability for direct and intuitive planning or understanding of complicated relationship among many concurrent processes. To realize the 3D representation, a technology to enable easy handling of virtual 3D object is a definite necessity. Using a stereo display system and a gesture input device (VPL DataGlove), our prototype of the virtual workstation has been implemented. The workstation can supply the 'sensation' of the virtual 3D space to a programmer. Software for the 3D programming environment is implemented on the workstation. According to preliminary assessments, a 50 percent reduction of programming effort is achieved by using the virtual 3D environment. The authors expect that the 3D environment has considerable potential in the field of software engineering.

Hirose, Michitaka↗
NASA NTRS1999

SRAM Based Re-programmable FPGA for Space Applications

An SRAM (static random access memory)-based reprogrammable FPGA (field programmable gate array) is investigated for space applications. A new commercial prototype, named the RS family, was used as an example for the investigation. The device is fabricated in a 0.25 micrometers CMOS technology. Its architecture is reviewed to provide a better understanding of the impact of single event upset (SEU) on the device during operation. The SEU effect of different memories available on the device is evaluated. Heavy ion test data and SPICE simulations are used integrally to extract the threshold LET (linear energy transfer). Together with the saturation cross-section measurement from the layout, a rate prediction is done on each memory type. The SEU in the configuration SRAM is identified as the dominant failure mode and is discussed in detail. The single event transient error in combinational logic is also investigated and simulated by SPICE. SEU mitigation by hardening the memories and employing EDAC (error detection and correction) at the device level are presented. For the configuration SRAM (CSRAM) cell, the trade-off between resistor de-coupling and redundancy hardening techniques are investigated with interesting results. Preliminary heavy ion test data show no sign of SEL (single event latch-up). With regard to ionizing radiation effects, the increase in static leakage current (static I(sub CC)) measured indicates a device tolerance of approximately 50krad(Si).

Wang, J. J.↗
NASA NTRS2008

VIRTEX-4 VQ static SEU Characterization Summary

This report is the result of the combined efforts of members within the Xilinx Radiation Test Consortium (XRTC), sometimes known as the Xilinx SEE Test Consortium. The XRTC is a voluntary association of aerospace entities, including leading aerospace companies, universities and national laboratories, combining resources to characterize reconfigurable FPGAs for aerospace applications. Previous publications of Virtex-4 radiation results are for commercial (non-epitaxial) devices; see, for example, Refs. 1-4. A notable exception is Ref. 5, which presents XRTC upset measurements of storage elements in the PowerPC405s in the XQR4VFX60. This report of upset susceptibility to heavy ions and protons of the static memory elements in the Virtex-4QV family is a direct parallel to the XRTC report on the thin epitaxial devices in the Virtex-2 family released four years ago.

field programmable gate array (FPGA)↗
NASA NTRS2005

Qualification Strategies of Field Programmable Gate Arrays (FPGAs) for Space Application

This viewgraph document reviews the issue of using Field Programmable Gate Arrays (FPGAs) in Space Application, and the some of the strategies for qualifying the FPGA. Qualification and risk management of such complex systems requires new approaches. The paper presents a matrix approach to qualification has been presented that: - Complements historical specifications - Highlights the importance of device physics as a cornerstone to qualification. - Provides levels of risk management that expressly document trade offs. - Stresses the role of the FPGA vendor as team member in the development of modern spacecraft.

Mil Standard 883↗
NASA NTRS1993

Device For Controlling Crystallization Of Protein

Variable sandwich spacer enables optimization of evaporative driving force that governs crystallization of protein from solution. Mechanically more rigid than hanging-drop and sitting-drop devices. Large oscillations and dislodgment of drop of solution in response to vibrations suppressed by glass plates. Other advantages include: suitable for automated delivery, stable handling, and programmable evaporation of protein solution; controlled configuration enables simple and accurate determination of volume of solution without disrupting crystallization; pH and concentration of precipitant controlled dynamically because pH and concentration coupled to rate of evaporation, controllable via adjustment of gap between plates; and enables variation of ratio between surface area and volume of protein solution. Alternative version, plates oriented vertically instead of horizontally.

Noever, David A.↗
NASA NTRS1998

Summary of Proton Test on the Quick Logic QL3025 at Indiana University

This issue of the Programmable Logic Application Notes is a compilation of topics: (1) Proton irradiation tests were performed on the Quick Logic QL3025 at the Indian University Cyclotron facility. The devices, tests, and results are discussed; (2) The functional failure of EEPROM's in heavy ion environment is presented; (3) the Act 1 architecture is summarized; (4) Antifuse hardness and hardness testing is updated; the single even upset (SEU) response of hardwired flip-flops is also presented; (4) Total dose results of the ACT 2 and ACT 3 circuits is presented in a chart; (5) Recent sub-micron devices testing of total dose is presented in a chart along with brief discussion; and (6) a reference to the WWW site for more articles of interest.

Katz, Richard↗
NASA NTRS2013

Victim Simulator for Victim Detection Radar

Testing of victim detection radars has traditionally used human subjects who volunteer to be buried in, or climb into a space within, a rubble pile. This is not only uncomfortable, but can be hazardous or impractical when typical disaster scenarios are considered, including fire, mud, or liquid waste. Human subjects are also inconsistent from day to day (i.e., they do not have the same radar properties), so quantitative performance testing is difficult. Finally, testing a multiple-victim scenario is difficult and expensive because of the need for multiple human subjects who must all be coordinated. The solution is an anthropomorphic dummy with dielectric properties that replicate those of a human, and that has motions comparable to human motions for breathing and heartbeat. Two airfilled bladders filled and drained by solenoid valves provide the underlying motion for vinyl bags filled with a dielectric gel with realistic properties. The entire assembly is contained within a neoprene wetsuit serving as a "skin." The solenoids are controlled by a microcontroller, which can generate a variety of heart and breathing patterns, as well as being reprogrammable for more complex activities. Previous electromagnetic simulators or RF phantoms have been oriented towards assessing RF safety, e.g., the measurement of specific absorption rate (SAR) from a cell phone signal, or to provide a calibration target for diagnostic techniques (e.g., MRI). They are optimized for precise dielectric performance, and are typically rigid and immovable. This device is movable and "positionable," and has motion that replicates the small-scale motion of humans. It is soft (much as human tissue is) and has programmable motions.

Lux, James P.↗