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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 235 records · Page 13
All sourcesNASA NTRSDOE OSTI
NASA NTRS2005

Development of a Thin-Film Solar Cell Interconnect for the Powersphere Concept

Dual junction amorphous silicon (a-Si) solar cells produced on polyimide substrate have been selected as the best candidate to produce a lightweight solar array for the PowerSphere program. The PowerSphere concept features a space-inflatable, geodetic solar array approximately 0.6 meters in diameter and capable of generating about 20W of electrical power. Trade studies of various wiring concepts and connection methods led to an interconnect design with a copper contact that wraps around the edge, to the back of the solar cell. Applying Plasma Vapor Deposited (PVD) copper film to both sides and the edge of the solar cell produces the wrap around contact. This procedure results in a contact pad on the back of the solar cell, which is then laser welded to a flex circuit material. The flex circuit is constructed of copper in a custom designed routing pattern, and then sandwiched in a Kapton insulation layer. The flex circuit then serves as the primary power distribution system between the solar cells and the spacecraft. Flex circuit material is the best candidate for the wiring harness because it allows for low force deployment of the solar cells by the inflatable hinges on the PowerSphere. An additional frame structure, fabricated and assembled by ILC Dover, will reinforce the wrap around contact-flex blanket connection, thus providing a mechanically robust solar cell interconnect for the PowerSphere multifunctional program. The PowerSphere team will use the wraparound contact design approach as the primary solution for solar cell integration and the flex blanket for power distribution.

Simburger, Edward J.↗
NASA NTRS2006

A Novel, Free-Space Optical Interconnect Employing Vertical-Cavity Surface Emitting Laser Diodes and InGaAs Metal-Semiconductor-Metal Photodetectors for Gbit/s RF/Microwave Systems

Emerging technologies and continuing progress in vertical-cavity surface emitting laser (VCSEL) diode and metal-semiconductor-metal (MSM) photodetector research are making way for novel, high-speed forms of optical data transfer in communication systems. VCSEL diodes operating at 1550 nm have only recently become commercially available, while MSM photodetectors are pushing the limits of contact lithography with interdigitated electrode widths reaching sub micron levels. We propose a novel, free-space optical interconnect operating at about 1Gbit/s utilizing VCSEL diodes and MSM photodetectors. We report on development, progress, and current work, which are as follows: first, analysis of the divergent behavior of VCSEL diodes for coupling to MSM photodetectors with a 50 by 50 m active area and second, the normalized frequency response of the VCSEL diode as a function of the modulating frequency. Third, the calculated response of MSM photodetectors with varying electrode width and spacing on the order of 1 to 3 m as well as the fabrication and characterization of these devices. The work presented here will lead to the formation and characterization of a fully integrated 1Gbit/s free-space optical interconnect at 1550 nm and demonstrates both chip level and board level functionality for RF/microwave digital systems.

Savich, Gregory R.↗
NASA NTRS2005

Electronics box having internal circuit cards interconnected to external connectors sans motherboard

An electronics chassis box includes a pair of opposing sidewalls, a pair of opposing end walls, a bottom surface, a top cover, and ring connectors assemblies mounted in selective ones of the walls of the electronic box. Boss members extend from the bottom surface at different heights upon which circuit cards are mounted in spatial relationship to each other. A flex interconnect substantially reduces and generally eliminates the need of a motherboard by interconnecting the circuit cards to one another and to external connectors mounted within the ring connector assemblies.

Hockett, John E.↗
NASA NTRS1995

Method for fabricating an interconnected array of semiconductor devices

A method of forming an array of interconnected solar cells. A flexible substrate carrying semiconductor and conductive layers is divided into individual devices by slitting the substrate along the web length. The individual devices are then connected with one another in series by laminating the substrate onto an insulating backing and by depositing conducting interconnection layers which join the lower conductor of one device with the top conductor of the adjoining device.

Grimmer, Derrick P.↗
NASA NTRS1976

Process for making a multilayer interconnect system

A process for making an interconnect system for a multilayer circuit pattern. The interconnect system is formed having minimized through-hole space consumption so as to be suitable for high density, closely meshed circuit patterns.

Zachry, Clyde L.↗
NASA NTRS2011

Decentralized Adaptive Control of Systems with Uncertain Interconnections, Plant-Model Mismatch and Actuator Failures

Decentralized adaptive control is considered for systems consisting of multiple interconnected subsystems. It is assumed that each subsystem s parameters are uncertain and the interconnection parameters are not known. In addition, mismatch can exist between each subsystem and its reference model. A strictly decentralized adaptive control scheme is developed, wherein each subsystem has access only to its own state but has the knowledge of all reference model states. The mismatch is estimated online for each subsystem and the mismatch estimates are used to adaptively modify the corresponding reference models. The adaptive control scheme is extended to the case with actuator failures in addition to mismatch.

Patre, Parag↗
NASA NTRS2014

Copper Nanowire Production for Interconnect Applications

A method of fabricating metallic Cu nanowires with lengths up to about 25 micrometers and diameters in a range 20-100 nanometers, or greater if desired. Vertically oriented or laterally oriented copper oxide structures (CuO and/or Cu2O) are grown on a Cu substrate. The copper oxide structures are reduced with 99+ percent H or H2, and in this reduction process the lengths decrease (to no more than about 25 micrometers), the density of surviving nanostructures on a substrate decreases, and the diameters of the surviving nanostructures have a range, of about 20-100 nanometers. The resulting nanowires are substantially pure Cu and can be oriented laterally (for local or global interconnects) or can be oriented vertically (for standard vertical interconnects).

Han, Jin-Woo↗
NASA NTRS2015

Processing and Prolonged 500 C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype ICs with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3-and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient.

Silicon Carbide↗
NASA NTRS2015

Processing and Prolonged 500 C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype IC's with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3- and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient. Improved reproducibility remains to be accomplished.

JFET↗
NASA NTRS2018

Interconnection of Semiconductor Devices in Extreme Environment Microelectronic Integrated Circuit Chips

A process of fabrication and the resulting integrated circuit device is made of patterned metal electrical interconnections between semiconductor devices residing on and forming extremely harsh environment integrated circuit chips. The process enables more complicated wide band gap semiconductor integrated circuits with more than one level of interconnect to function for prolonged time periods (over 1000 hours) at much higher temperatures (500 C).

Spry, David J.↗
NASA NTRS2017

Pt: Ti Diffusion Barrier, Interconnect, and Simultaneous Ohmic Contacts to n- and p-type 4H-SiC

We report the initial results of using co-sputtered Pt:Ti 80:20 at. % composition ratio metallization as a diffusion barrier against gold (Au) and oxygen (O), as an interconnect layer, as well as forming simultaneous ohmic contacts to n-and p-type 4H-SiC. Having a single conductor with such combined multi-functional attributes would appreciably reduce the fabrication costs, processing time and complexity that are inherent in the production of SiC based devices. Auger Electron Spectroscopy, Focused Ion Beam-assisted Field Emission Scanning Electron Microscopy and Energy Dispersive Spectroscopy analyses revealed no Au and O migration to the SiC contact surface and minimal diffusion through the Pt:Ti barrier layer after 15 minutes of exposure at 800 °C in atmosphere, thus offering potential long term stability of the ohmic contacts. Specific contact resistance values of 7 x 10(exp -5) and 7.4 x 10(exp -4) Ω-sq.cm were obtained on the n (N(sub d)=7 x 10(exp 18) per cu.cm and p (N(sub a)=2 x 10(exp 20) per cu. cm) -type 4H-SiC, respectively. The resistivity of 75 μΩ-cm was obtained for the Pt:Ti layer that was sandwiched between two SiO2 layers and annealed in pure O ambient up to 900 °C, which offers promise as a high temperature interconnect metallization.

Simultaneous Ohmic Contact↗
NASA NTRS2026

Synchronized Eruptions on Io: Possible Evidence of Interconnected Subsurface Magma Reservoirs

On 27 December 2024, Juno's JIRAM (Jovian InfraRed Auroral Mapper) instrument observed an unprecedented volcanic event in Io's southern hemisphere, covering a vast region of ∼65,000 km2, near 73°S, 140°E. Within the imaged region, only one hot spot was previously known (Pfd454). This feature was earlier estimated to cover an area of 300 km2 with a total power output of 34 GW. JIRAM results show that the region produces a power output of 140–260 TW, over 1,000 times higher than earlier estimates and likely exceeding the brightest eruption ever recorded on Io, that of Surt in 2001 (∼80 TW). Three adjacent hot spots also exhibited dramatic power increases: P139, PV18, and an unnamed feature south of the main one that surged to ∼1 TW, placing all of them among the top 10 most powerful hot spots observed on Io. A temperature analysis of the features supports the simultaneous onset of these brightenings and suggests a single eruptive event propagating beneath the surface across hundreds of kilometers; this is the first time this has been observed on Io. This in turn would imply a connection among the hotspots' magma reservoirs, while other nearby hotspots that have been known to be active in the recent past, such as Kurdalagon Patera, appear unaffected. The simultaneity supports models of massive, interconnected magma reservoirs. The topology of these regional magma systems may resemble that of a large-scale sponge, in which the massive reservoirs are the pores, interconnected through a largely solid outer shell.

A Mura↗
DOE OSTI2021

Properties of the Inter-area Modes of the U.S. Eastern Interconnection System

With an increase in the oscillation events observed in the U.S. Eastern Interconnection (EI), it has become increasingly important to have a good understanding of the EI system oscillatory behavior. However, as compared to the Western Interconnection system (WI), not much work has been done in this regard for the EI system. Therefore, in this paper, a thorough analysis is carried out to identify inter-area modes and their properties for the EI system using model-based approach. Multi-channel Prony method is used in this paper for estimating system modes and mode-shapes.

Agrawal, Urmila↗
DOE OSTI2023

Online Tracking of Two Dominant Inter-Area Modes of Oscillation in the Eastern Interconnection

Reliable power system operation requires that small-signal stability be maintained at all times. Mode meters are measurement-based tools that provide operators with situational awareness of the system's stability margin. They operate by continually tracking the inter-area modes of oscillation that govern small-signal stability. This paper reports on the deployment of mode meters for online monitoring of two dominant modes of oscillation in the United States' Eastern Interconnection (EI). The use of measurements from system operators across the interconnection to provide continuous tracking is novel in the EI. Results from over four months of analysis reveal diurnal patterns in the modes and demonstrate that they can be tracked through a variety of system conditions. The results from this study continue to build an understanding of the EI's modes that will inform future modeling and monitoring efforts.

Follum, James D.↗
DOE OSTI2024

Method of additively manufacturing an integrated circuit of an interconnect packaging structure

A method of manufacturing an interconnect packaging structure is provided. In one aspect, the method includes forming a first body defining a cavity around at least one integrated circuit using an additive manufacturing machine, depositing a conductive transmission line on the first body and electrically coupling the conductive transmission line and the at least one integrated circuit with a conductive interconnect.

Papapolymerou, Ioannis↗
DOE OSTI2023

Experimental review of the performances of protective coatings for interconnects in solid oxide fuel cells

Ferritic stainless-steel interconnects are used in solid oxide fuel cells; however, coatings are required to improve their performance. Although several types of coatings have been proposed, they have been scarcely investigated under similar conditions. This study compares the characteristics of uncoated Crofer 22 APU and eight different coatings on Crofer 22 APU for up to 3,000 hours at 800°C. The coatings were deposited at various research laboratories around the world, and the experiments were performed at Chalmers University of Technology, Sweden. Cross-sections of the samples were analysed using scanning electron microscopy and energy-dispersive x-ray spectroscopy. The (Co,Mn)-based coated steels showed more than 50-fold lower chromium evaporation and at least 3 times thinner Cr 2 O 3 scale thickness compared to uncoated steel. The coated steel samples showed lower area-specific resistance (ASR) values than the uncoated steel after 3,000 hours of exposure, irrespective of the coating thickness, composition and deposition method.

25 ENERGY STORAGE↗
DOE OSTI2023

Grid Strength Analysis for Integrating 30 GW of Offshore Wind Generation by 2030 in the U.S. Eastern Interconnection

Offshore wind is a key player in the transition to a decarbonized electric gird, and the United States has set ambitious goals of integrating 30 GW of offshore wind capacity by 2030 and 110 GW by 2050. To facilitate this integration, the National Renewable Energy Laboratory and the Pacific Northwest National Laboratory are conducting the Atlantic Offshore Wind Transmission Study to assess transmission solutions. To achieve the 110-GW target by 2050, meticulous planning for network expansion and resource allocation is essential; however, meeting the 2030 goals requires integrating offshore wind power with minimal system upgrades, thus necessitating a careful study of grid strength and stability. The study team developed the Automated System-wide Strength Evaluation Tool (ASSET) to assess system strength under various operating conditions and contingencies, focusing on the proposed integration of 30 GW of offshore wind power by 2030. In this paper, we provide a summary of key features of the ASSET software and results of the grid strength analysis for integrating 30 GW of offshore wind generation by 2030 in the U.S. Eastern Interconnection.

Automated System-wide Strength Evaluation Tool (AS↗