MICROELECTRONIC, MICROPOWER DIGITAL CIRCUITS AND LOW LEVEL AMPLIFIERS FOR SPACE APPLICATIONS
Microelectronic function blocks and their use in low level amplifiers for space applications
SPACECRAFT ELECTRONIC EQUIPMENT↗
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High Electron Mobility Transistor Structures on Sapphire Substrates Using CMOS Compatible Processing Techniques
System-on-a-chip (SOC) processes are under intense development for high-speed, high frequency transceiver circuitry. As frequencies, data rates, and circuit complexity increases, the need for substrates that enable high-speed analog operation, low-power digital circuitry, and excellent isolation between devices becomes increasingly critical. SiGe/Si modulation doped field effect transistors (MODFETs) with high carrier mobilities are currently under development to meet the active RF device needs. However, as the substrate normally used is Si, the low-to-modest substrate resistivity causes large losses in the passive elements required for a complete high frequency circuit. These losses are projected to become increasingly troublesome as device frequencies progress to the Ku-band (12 - 18 GHz) and beyond. Sapphire is an excellent substrate for high frequency SOC designs because it supports excellent both active and passive RF device performance, as well as low-power digital operations. We are developing high electron mobility SiGe/Si transistor structures on r-plane sapphire, using either in-situ grown n-MODFET structures or ion-implanted high electron mobility transistor (HEMT) structures. Advantages of the MODFET structures include high electron mobilities at all temperatures (relative to ion-implanted HEMT structures), with mobility continuously improving to cryogenic temperatures. We have measured electron mobilities over 1,200 and 13,000 sq cm/V-sec at room temperature and 0.25 K, respectively in MODFET structures. The electron carrier densities were 1.6 and 1.33 x 10(exp 12)/sq cm at room and liquid helium temperature, respectively, denoting excellent carrier confinement. Using this technique, we have observed electron mobilities as high as 900 sq cm/V-sec at room temperature at a carrier density of 1.3 x 10(exp 12)/sq cm. The temperature dependence of mobility for both the MODFET and HEMT structures provides insights into the mechanisms that allow for enhanced electron mobility as well as the processes that limit mobility, and will be presented.
Mueller, Carl↗
A comparison of hardware description languages
Several high level languages which evolved over the past few years for describing and simulating the structure and behavior of digital systems, on digital computers are assessed. The characteristics of the four prominent languages (CDL, DDL, AHPL, ISP) are summarized. A criterion for selecting a suitable hardware description language for use in an automatic integrated circuit design environment is provided.
Shiva, S. G.↗
High-Performance Satellite/Terrestrial-Network Gateway
A gateway has been developed to enable digital communication between (1) the high-rate receiving equipment at NASA's White Sands complex and (2) a standard terrestrial digital communication network at data rates up to 622 Mb/s. The design of this gateway can also be adapted for use in commercial Earth/satellite and digital communication networks, and in terrestrial digital communication networks that include wireless subnetworks. Gateway as used here signifies an electronic circuit that serves as an interface between two electronic communication networks so that a computer (or other terminal) on one network can communicate with a terminal on the other network. The connection between this gateway and the high-rate receiving equipment is made via a synchronous serial data interface at the emitter-coupled-logic (ECL) level. The connection between this gateway and a standard asynchronous transfer mode (ATM) terrestrial communication network is made via a standard user network interface with a synchronous optical network (SONET) connector. The gateway contains circuitry that performs the conversion between the ECL and SONET interfaces. The data rate of the SONET interface can be either 155.52 or 622.08 Mb/s. The gateway derives its clock signal from a satellite modem in the high-rate receiving equipment and, hence, is agile in the sense that it adapts to the data rate of the serial interface.
Beering, David R.↗
Building Reliable Printed Circuit Boards - the Lessons Learned
"Printed circuit boards (PCBs) are the baseline for electronics manufacturing upon which electronic components are mounted and formed into electronic systems. PCBs are used in a variety of electronic circuits from simple one-transistor amplifiers to large super computers. A PCB serves three main functions: 1) it provides the necessary mechanical support for the components in the circuit 2) it provides the necessary electrical interconnections, and 3) it bears some form of legend which identifies the components it carries. The failure modes on the PCBs can be categorized in a hierarchical structure, in which the mechanisms and causes are site or location dependant. This one day workshop will discuss a variety of failure mechanisms that effect the functionality of PCBs. These mechanisms can be related to how PCB materials are selected, PCBs are designed, manufactured, tested and used in the field conditions. The workshop will begin with an overview of PCB manufacturing, materials and processes. With the help of examples and case studies, a wide range of failure mechanisms will be discussed, case studies are focused on digital circuits, however some failures in analog, double sided boards are also presented. The workshop then provides the guideline for selection of methodologies for identifying potential failure mechanisms based on the failure history and how a systematic root cause failure analysis of the PCB can result in prevention of future issues."
Sood, Bhanu↗
Time-division multiplexer uses digital gates
Device eliminates errors caused by analog gates in multiplexing a large number of channels at high frequency. System was designed for use in aerospace work to multiplex signals for monitoring such variables as fuel consumption, pressure, temperature, strain, and stress. Circuit may be useful in monitoring variables in process control and medicine as well.
Myers, C. E.↗
Eight-Bit-Slice GaAs General Processor Circuit
Novel GaAs 8-bit slice enables quick and efficient implementation of variety of fast GaAs digital systems ranging from central processing units of computers to special-purpose processors for communications and signal-processing applications. With GaAs 8-bit slice, designers quickly configure and test hearts of many digital systems that demand fast complex arithmetic, fast and sufficient register storage, efficient multiplexing and routing of data words, and ease of control.
Weissman, John↗
Micromachined TWTs for THz Radiation Sources
The Terahertz (THz) region of the electromagnetic spectrum (about 300 - 3000 GHz in frequency or about 0.1 - 1 mm free space wavelength) has enormous potential for high-data-rate communications, spectroscopy, astronomy, space research, medicine, biology, surveillance, remote sensing, industrial process control, etc. It has been characterized as the most scientifically rich, yet under-utilized, region of the electromagnetic spectrum. The most critical roadblock to full exploitation of the THz band is lack of coherent radiation sources that are powerful (0.001 - 1.0 W continuous wave), efficient (> 1%), frequency agile (instantaneously tunable over 1% bandwidths or more), reliable, and comparatively inexpensive. To develop vacuum electron device (VED) radiation sources satisfying these requirements, fabrication and packaging approaches must be heavily considered to minimize costs, in addition to the basic interaction physics and circuit design. To minimize size of the prime power supply, beam voltage must be minimized, preferably 10 kV. Solid state sources satisfy the low voltage requirement, but are many orders of magnitude below power, efficiency, and bandwidth requirements. On the other hand, typical fast-wave VED sources in this regime (e.g., gyrotrons, FELs) tend to be large, expensive, high voltage and very high power devices unsuitable for most of the applications cited above. VEDs based on grating or inter-digital (ID) circuits have been researched and developed. However, achieving forward-wave amplifier operation with instantaneous fractional bandwidths > 1% is problematic for these devices with low-energy (< 15 kV) electron beams. Moreover, the interaction impedance is quite low unless the beam-circuit spacing is kept particularly narrow, often leading to significant beam interception. One solution to satisfy the THz source requirements mentioned above is to develop micromachined VEDs, or "micro-VEDs". Among other benefits, micro-machining technologies provide superior high frequency wall conductivity as a result of superior surface smoothness compared with conventional mechanical or electric discharge machining approaches. Micro-VED technologies are already being applied to the development of millimeter-wave klystrons at Stanford Linear Accelerator Center and submillimeter-wave klystrons at the University of Leeds. We are investigating the use of micro-machining technologies to develop THz regime TWTs, with emphasis on folded-waveguide TWTs. The folded-waveguide TWT (FW-TWT) has several features that make it attractive for THz-regime micro-VED applications. It is a relatively simple circuit to design and fabricate, it is amenable to precision pattern replication by micro-machining, and it is has been demonstrated capable of forward-wave amplification with appreciable bandwidth. We are conducting experimental and computational studies of micro-VED FW-TWTs to examine their feasibility for applications at frequencies from 200 - 1000 GHz.
Booske, John H.↗
Efficient G(sup 4)FET-Based Logic Circuits
A total of 81 optimal logic circuits based on four-gate field-effect transistors (G(sup 4)4FETs) have been designed to implement all Boolean functions of up to three variables. The purpose of this development was to lend credence to the expectation that logic circuits based on G(sup 4)FETs could be more efficient (in the sense that they could contain fewer transistors), relative to functionally equivalent logic circuits based on conventional transistors. A G(sup 4)FET a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G(sup 4)FET can also be regarded as a single device having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of a silicon-on-insulator substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. One such option is to design a G(sup 4)FET to function as a three-input NOT-majority gate, which has been shown to be a universal and programmable logic gate. Optimal NOT-majority-gate, G(sup 4)FET-based logic-circuit designs were obtained in a comparative study that also included formulation of functionally equivalent logic circuits based on NOR and NAND gates implemented by use of conventional transistors. In the study, the problem of finding the optimal design for each logic function and each transistor type was solved as an integer-programming optimization problem. Considering all 81 non-equivalent Boolean functions included in the study, it was found that in 63% of the cases, fewer logic gates (and, hence, fewer transistors) would be needed in the G(sup 4)FET-based implementations.
Vatan, Farrokh↗
Digital single-sideband mixer.
Description of a simple single-sideband (SSB) mixer design that yields either a sum-frequency output with the difference-frequency output suppressed or vice-versa, and uses only 'digital' logic devices and no reactive or frequency-selective 'analog' (linear) circuit elements. A pair of outputs is generated in phase quadrature. It is shown that SSB frequency conversion can be accomplished for many applications much more efficiently with simple digital circuitry than in the usual way with complicated linear frequency selective filter and phasing circuits.
Counselman, C. C., III↗
Sampling Downconverter For Radio-Frequency Signals
Phase and delay errors reduced greatly. Proposed GaAs integrated-circuit for receiver of radio signals at gigahertz frequencies samples incoming signal in phase and in quadrature, digitizes it, and down-converts it to baseband in single step. Incorporates both digital and analog components in design offering improved stability, versatility, and sampling bandwidth. Eliminates need for several components found in conventional analog designs, including mixers, postmixer filters, and 90 degree phase shifter.
Thomas, J. B.↗
Re-Configurable Electronics Characterization under Extreme Thermal Environment
The need for reconfigurable electronics is driven by requirements to survive longer missions and harsher environments. It is possible to compensate for degradations in Extreme Environments (EE). EE has effect on electronics: circuits are designed to exploit device characteristics and when a certain temperature or radiation range is exceeded the circuit function gradually degrades. It is possible to employ Hardening by reconfiguration (HBR) to mitigate drifts, degradation, or damage on electronic devices in EE by using reconfigurable devices and an adaptive self-reconfiguration of circuit topology. In this manner degraded components can be salvaged, and completely damaged components can be bypassed. The challenge of conventional design is replaced with that of designing a recover process that automatically performs the (re) design in place of the designer. The objective of testing a Digital Signal Processor (DSP) under the extreme temperatures was to determine the lowest temperature at which the DAP can operate. The objective of testing a Xilinx VirtexII Pro FPGA board was to initially find our whether the evaluation board and the FPGA would survive and continue at temperature ranges from -180 C, and 120 C. The Virtex II functioned correctly at the temperatures tested. The next test was done on the GM-C filter building block using the same temperature range as the Virtex II. The current lower and upper limits were shown to be reduced as the temperature gets lower. The device function can be recovered by increasing the Vb from .08V to .85V. The negative and positive saturation voltages increases as the temperature gets higher. The function of the device can be recovered by decreasing the Vb from .8V to around .75V. The next test was performed to test the recovery of the GmC low pass filter through Vb in a filter circuit. The test indicate that bias voltage control adjustment is an efficient mechanism for circuit recovery at extreme temperatures.
reliability↗
A systolic architecture for the correlation and accumulation of digital sequences
A fully systolic architecture for the implementation of digital sequence correlator/accumulators is described. These devices consist of a two-dimensional array of processing elements that are conceived for efficient fabrication in Very Large Scale Integrated (VLSI) circuits. A custom VLSI chip that was implemented using these concepts is described. The chip, which contains a four-lag three-level sequence correlator and four bits of accumulation with overflow detection, was designed using the Integrated UNIX-Based Computer Aided Design (CAD) System. Applications of such devices include the synchronization of coded telemetry data, alignment of both real time and non-real time Very Large Baseline Interferometry (VLBI) signals, and the implementation of digital filters and processes of many types.
Deutsch, L. J.↗
FPGA Based Reconfigurable ATM Switch Test Bed
Various issues associated with "FPGA Based Reconfigurable ATM Switch Test Bed" are presented in viewgraph form. Specific topics include: 1) Network performance evaluation; 2) traditional approaches; 3) software simulation; 4) hardware emulation; 5) test bed highlights; 6) design environment; 7) test bed architecture; 8) abstract sheared-memory switch; 9) detailed switch diagram; 10) traffic generator; 11) data collection circuit and user interface; 12) initial results; and 13) the following conclusions: Advances in FPGA make hardware emulation feasible for performance evaluation, hardware emulation can provide several orders of magnitude speed-up over software simulation; due to the complexity of hardware synthesis process, development in emulation is much more difficult than simulation and requires knowledge in both networks and digital design.
Chu, Pong P.↗
Weather satellite picture receiving stations, APT digital scan converter
The automatic picture transmission digital scan converter is used at ground stations to convert signals received from scanning radiometers to data compatible with ground equipment designed to receive signals from vidicons aboard operational meteorological satellites. Information necessary to understand the circuit theory, functional operation, general construction and calibration of the converter is provided. Brief and detailed descriptions of each of the individual circuits are included, accompanied by a schematic diagram contained at the end of each circuit description. Listings of integral parts and testing equipment required as well as an overall wiring diagram are included. This unit will enable the user to readily accept and process weather photographs from the operational meteorological satellites.
Vermillion, C. H.↗
Improved charge injection device and a focal plane interface electronics board for stellar tracking
An improved Charge Injection Device (CID) stellar tracking sensor and an operating sensor in a control/readout electronics board were developed. The sensor consists of a shift register scanned, 256x256 CID array organized for readout of 4x4 subarrays. The 4x4 subarrays can be positioned anywhere within the 256x256 array with a 2 pixel resolution. This allows continuous tracking of a number of stars simultaneously since nine pixels (3x3) centered on any star can always be read out. Organization and operation of this sensor and the improvements in design and semiconductor processing are described. A hermetic package incorporating an internal thermoelectric cooler assembled using low temperature solders was developed. The electronics board, which contains the sensor drivers, amplifiers, sample hold circuits, multiplexer, analog to digital converter, and the sensor temperature control circuits, is also described. Packaged sensors were evaluated for readout efficiency, spectral quantum efficiency, temporal noise, fixed pattern noise, and dark current. Eight sensors along with two tracker electronics boards were completed, evaluated, and delivered.
Michon, G. J.↗
An 8-PSK TDMA uplink modulation and coding system
The combination of 8-phase shift keying (8PSK) modulation and greater than 2 bits/sec/Hz drove the design of the Nyquist filter to one specified to have a rolloff factor of 0.2. This filter when built and tested was found to produce too much intersymbol interference and was abandoned for a design with a rolloff factor of 0.4. The preamble is limited to 100 bit periods of the uncoded bit period of 5 ns for a maximum preamble length of 500 ns or 40 8PSK symbol times at 12.5 ns per symbol. For 8PSK modulation, the required maximum degradation of 1 dB in -20 dB cochannel interference (CCI) drove the requirement for forward error correction coding. In this contract, the funding was not sufficient to develop the proposed codec so the codec was limited to a paper design during the preliminary design phase. The mechanization of the demodulator is digital, starting from the output of the analog to digital converters which quantize the outputs of the quadrature phase detectors. This approach is amenable to an application specific integrated circuit (ASIC) replacement in the next phase of development.
Ames, S. A.↗
Low-Power Radio-Frequency SiGe Analog-to-Digital Converter
A low-power, radio-frequency analog-to-digital converter (RF-ADC) for soil moisture remote sensing was designed and fabricated. The RF-ADC is the fundamental component used in a direct-sampling digital radiometer, which is proposed to minimize the power dissipation and system complexity for synthetic thinned array radiometer. The circuit was implemented using 0.8 micron 35-GHz silicon germanium BiCMOS technology. The total power dissipation was 222 mW.
Thompson, Willie L, II↗