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At least 235 records · Page 13
All sourcesNASA NTRSDOE OSTI
NASA NTRS2004

Application of Thermo-Mechanical Measurements of Plastic Packages for Reliability Evaluation of PEMS

Thermo-mechanical analysis (TMA) is typically employed for measurements of the glass transition temperature (Tg) and coefficients of thermal expansion (CTE) in molding compounds used in plastic encapsulated microcircuits (PEMs). Application of TMA measurements directly to PEMs allows anomalies to be revealed in deformation of packages with temperature, and thus indicates possible reliability concerns related to thermo-mechanical integrity and stability of the devices. In this work, temperature dependencies of package deformation were measured in several types of PEMs that failed environmental stress testing including temperature cycling, highly accelerated stress testing (HAST) in humid environments, and bum-in (BI) testing. Comparison of thermo-mechanical characteristics of packages and molding compounds in the failed parts allowed for explanation of the observed failures. The results indicate that TMA of plastic packages might be used for quality evaluation of PEMs intended for high-reliability applications.

Sharma, Ashok K.↗
NASA NTRS2005

Failure Analysis of CCD Image Sensors Using SQUID and GMR Magnetic Current Imaging

During electrical testing of a Full Field CCD Image Senor, electrical shorts were detected on three of six devices. These failures occurred after the parts were soldered to the PCB. Failure analysis was performed to determine the cause and locations of these failures on the devices. After removing the fiber optic faceplate, optical inspection was performed on the CCDs to understand the design and package layout. Optical inspection revealed that the device had a light shield ringing the CCD array. This structure complicated the failure analysis. Alternate methods of analysis were considered, including liquid crystal, light and thermal emission, LT/A, TT/A SQUID, and MP. Of these, SQUID and MP techniques were pursued for further analysis. Also magnetoresistive current imaging technology is discussed and compared to SQUID.

Felt, Frederick S.↗
NASA NTRS2001

Packaging Technology Developed for High-Temperature Silicon Carbide Microsystems

High-temperature electronics and sensors are necessary for harsh-environment space and aeronautical applications, such as sensors and electronics for space missions to the inner solar system, sensors for in situ combustion and emission monitoring, and electronics for combustion control for aeronautical and automotive engines. However, these devices cannot be used until they can be packaged in appropriate forms for specific applications. Suitable packaging technology for operation temperatures up to 500 C and beyond is not commercially available. Thus, the development of a systematic high-temperature packaging technology for SiC-based microsystems is essential for both in situ testing and commercializing high-temperature SiC sensors and electronics. In response to these needs, researchers at Glenn innovatively designed, fabricated, and assembled a new prototype electronic package for high-temperature electronic microsystems using ceramic substrates (aluminum nitride and aluminum oxide) and gold (Au) thick-film metallization. Packaging components include a ceramic packaging frame, thick-film metallization-based interconnection system, and a low electrical resistance SiC die-attachment scheme. Both the materials and fabrication process of the basic packaging components have been tested with an in-house-fabricated SiC semiconductor test chip in an oxidizing environment at temperatures from room temperature to 500 C for more than 1000 hr. These test results set lifetime records for both high-temperature electronic packaging and high-temperature electronic device testing. As required, the thick-film-based interconnection system demonstrated low (2.5 times of the room-temperature resistance of the Au conductor) and stable (decreased 3 percent in 1500 hr of continuous testing) electrical resistance at 500 C in an oxidizing environment. Also as required, the electrical isolation impedance between printed wires that were not electrically joined by a wire bond remained high (greater than 0.4 GW) at 500 C in air. The attached SiC diode demonstrated low (less than 3.8 W/mm2) and relatively consistent dynamic resistance from room temperature to 500 C. These results indicate that the prototype package and the compatible die-attach scheme meet the initial design standards for high-temperature, low-power, and long-term operation. This technology will be further developed and evaluated, especially with more mechanical tests of each packaging element for operation at higher temperatures and longer lifetimes.

Chen, Liang-Yu↗
DOE OSTI2022

High Temperature Optocoupler for 3D High Density Power Modules

The goal of this proposed research is to develop a reliable high-temperature optocouplers, which can operate at 250°C with at least ten-year lifetime, and replace isolation transforms as the galvanic isolation solution for the 3D integration of high density power modules. The electrification of future transportations (i.e., electric vehicles) will continuously drive the demand for high density power modules. Optocouplers (i.e., packaged light emitter and detector) as a promising candidate to replace bulky isolation transformers are highly desirable to facilitate the continuous scale-down of gate driver circuitry that will lead to 3D high density power modules and achieve disruptive performance in terms of thermal management, power density, power efficiency, reliability and operating environments. However, regular semiconductor optoelectronic materials and devices have significant difficulty functioning in the harsh environments designated for high density power module usage (such as operation at high temperatures). Ultimately, it is not the intrinsic properties of power devices that prevent their use at higher temperatures, but rather the low voltage electronics needed to drive them and the packaging that surrounds them. The typical operating temperature for optocouplers is only up to 100°C, due to the limitations of light emitting diode (LED) devices inside and packaging materials. A systematic characterization methodology will be developed to analyze the performance, lifetime and reliability of LED devices and distinguish multiple failure mechanisms at high temperatures. An original methodology of “design for reliability” will be developed to design the optoelectronic devices with high reliability and long lifetime at high temperatures. A new architecture of high temperature high reliable optocouplers will be developed, fabricated and demonstrated with continuous operating at 250°C. The development of efficient, reliable high density 3D power modules is the foundation for energy efficiency and energy reliability. Enabled with advanced 3D integration and packaging technologies, high density power module solutions can achieve much more superior performance over the conventional discrete solutions in terms of efficiency, thermal management and power density. The proposed concept of high temperature optocouplers as the galvanic isolation solution for high density power modules will bring together interdisciplinary research involving the wide bandgap materials, optoelectronics, high reliable device design, electronics packaging and power modules. A streamline of skilled personnel would be trained including graduate and undergraduate students, local engineers and scientists which are in great demand to both academia and optoelectronics industry. The proposed research topics, such as, solid state lighting and high temperature device reliability, are currently of major interest at the Department of Energy, in particular, Sandia National Laboratories. This project can enhance collaborations between the University of Arkansas (UA) and Sandia National Laboratories. The findings of the proposed research are expected to be integrated into high density 3-D power modules at the Engineering Research Center for Power Optimization for Electro-Thermal Systems (POETS).

42 ENGINEERING↗
DOE OSTI2021

Low Thermal Resistance (0.5 K/W) Ga 2 O 3 Schottky Rectifiers With Double-Side Packaging

The low thermal conductivity of Ga 2 O 3 has arguably been the most serious concern for Ga 2 O 3 power and RF devices. Despite many simulation studies, there is no experimental report on the thermal resistance of a large-area, packaged Ga 2 O 3 device. This work fills this gap by demonstrating a 15-A double-side packaged Ga 2 O 3 Schottky barrier diode (SBD) and measuring its junction-to-case thermal resistance (R θJC ) in the bottom-side- and junction-side-cooling configurations. The R θJC characterization is based on the transient dual interface method, i.e., JEDEC 51-14 standard. The R θJC of the junction- and bottom-cooled Ga 2 O 3 SBD was measured to be 0.5 K/W and 1.43 K/W, respectively, with the former R θJC lower than that of similarly-rated commercial SiC SBDs. This low R θJC is attributable to the heat extraction directly from the Schottky junction instead of through the Ga 2 O 3 chip. Here, the R θJC lower than that of commercial SiC devices proves the viability of Ga 2 O 3 devices for high-power applications and manifest the significance of proper packaging for their thermal management.

42 ENGINEERING↗
NASA NTRS2016

Experimental Durability Testing of 4H SiC JFET Integrated Circuit Technology at 727 C

We have reported SiC integrated circuits (IC's) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 C [1, 2]. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 C [3]. However, this thermal ramp was not ended until a peak temperature of 880 C (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology. Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 C. In one test, the temperature was ramped and then held at 727 C, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 C before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 C (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 C.

JFET↗
NASA NTRS2016

Experimental Durability Testing of 4H SiC JFET Integrated Circuit Technology at 727 Degrees Centigrade

We have reported SiC integrated circuits (ICs) with two levels of metal interconnect that have demonstrated prolonged operation for thousands of hours at their intended peak ambient operational temperature of 500 degrees Centigrade. However, it is recognized that testing of semiconductor microelectronics at temperatures above their designed operating envelope is vital to qualification. Towards this end, we previously reported operation of a 4H-SiC JFET IC ring oscillator on an initial fast thermal ramp test through 727 degrees Centigrade. However, this thermal ramp was not ended until a peak temperature of 880 degrees Centigrade (well beyond failure) was attained. Further experiments are necessary to better understand failure mechanisms and upper temperature limit of this extreme-temperature capable 4H-SiC IC technology.Here we report on additional experimental testing of custom-packaged 4H-SiC JFET IC devices at temperatures above 500 degrees Centigrade. In one test, the temperature was ramped and then held at 727 degrees Centigrade, and the devices were periodically measured until electrical failure was observed. A 4H-SiC JFET on this chip electrically functioned with little change for around 25 hours at 727 degrees Centigrade before rapid increases in device resistance caused failure. In a second test, devices from our next generation 4H-SiC JFET ICs were ramped up and then held at 700 degrees Centigrade (which is below the maximum deposition temperature of the dielectrics). Three ring oscillators functioned for 8 hours at this temperature before degradation. In a third experiment, an alternative die attach of gold paste and package lid was used, and logic circuit operation was demonstrated for 143.5 hours at 700 degrees Centigrade.

Silicon Carbide↗
DOE OSTI2023

pyTDGL: Time-dependent Ginzburg-Landau in Python

Time-dependent Ginzburg-Landau (TDGL) theory is a phenomenological model for the dynamics of superconducting systems. Due to its simplicity in comparison to microscopic theories and its effectiveness in describing the observed properties of the superconducting state, TDGL is widely used to interpret or explain measurements of superconducting devices. Here, we introduce pyTDGL, a Python package that solves a generalized TDGL model for superconducting thin films of arbitrary geometry, enabling simulations of vortex and phase dynamics in mesoscopic superconducting devices. pyTDGL can model the nonlinear magnetic response and dynamics of multiply connected films, films with multiple current bias terminals, and films with a spatially inhomogeneous critical temperature. We demonstrate these capabilities by modeling quasi-equilibrium vortex distributions in irregularly shaped films, and the dynamics and current-voltage-field characteristics of nanoscale superconducting quantum interference devices (nanoSQUIDs).

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2023

Novel multi-channel skipper-CCD packages for dark matter searches

The next generation of skipper Charge Coupled Device (skipper-CCD) experiments for rare-event searches will bring new challenges for the packaging and read-out of the detectors. Scaling the active mass and simultaneously reducing the experimental backgrounds in two orders of magnitude will require a novel high-density Silicon-based package, that must be massively produced and stored. In this work, we present the design, first production, and testing of multi-channel Silicon packages with photon shielding, along with the outlook for the next steps toward producing 1500 wafers that will add up to a 10 kg skipper-CCD detector.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
NASA NTRS2012

Array Technology for Terahertz Imaging

Heterodyne terahertz (0.3 - 3THz) imaging systems are currently limited to single or a low number of pixels. Drastic improvements in imaging sensitivity and speed can be achieved by replacing single pixel systems with an array of detectors. This paper presents an array topology that is being developed at the Jet Propulsion Laboratory based on the micromachining of silicon. This technique fabricates the array's package and waveguide components by plasma etching of silicon, resulting in devices with precision surpassing that of current metal machining techniques. Using silicon increases the versatility of the packaging, enabling a variety of orientations of circuitry within the device which increases circuit density and design options. The design of a two-pixel transceiver utilizing a stacked architecture is presented that achieves a pixel spacing of 10mm. By only allowing coupling from the top and bottom of the package the design can readily be arrayed in two dimensions with a spacing of 10mm x 18mm.

Terahertz↗
NASA NTRS2005

Thermoelectric Air/Soil Energy-Harvesting Device

A proposed thermoelectric device would exploit natural temperature differences between air and soil to harvest small amounts of electric energy. Because the air/soil temperature difference fluctuates between nighttime and daytime, it is almost never zero, and so there is almost always some energy available for harvesting. Unlike photovoltaic cells, the proposed device could operate in the absence of sunlight. Unlike a Stirling engine, which could be designed to extract energy from the air/soil temperature difference, the proposed device would contain no moving parts. The main attractive feature of the proposed device would be high reliability. In a typical application, this device would be used for low-power charging of a battery that would, in turn, supply high power at brief, infrequent intervals for operating an instrumentation package containing sensors and communication circuits. The device (see figure) would include a heat exchanger buried in soil and connected to a heat pipe extending up to a short distance above the ground surface. A thermoelectric microgenerator (TEMG) would be mounted on top of the heat pipe. The TEMG could be of an advanced type, now under development, that could maintain high (relative to prior thermoelectric generators) power densities at small temperature differentials. A heat exchanger exposed to the air would be mounted on top of the TEMG. It would not matter whether the air was warmer than the soil or the soil warmer than the air: as long as there was a nonzero temperature difference, heat would flow through the device and electricity would be generated. A study of factors that could affect the design and operation of the device has been performed. These factors include the thermal conductances of the soil, the components of the device, the contacts between the components of the device, and the interfaces between the heat exchangers and their environments. The study included experiments that were performed on a model of the device to demonstrate feasibility. Because a TEMG suitable for this device was not available, a brass dummy component having a known thermal conductance of 1.68 W/K was substituted for the TEMG in the models to enable measurement of heat flows. The model included a water-based heat pipe 30 in. (76.2 cm) long and 1 in. (2.54 cm) in diameter, wrapped with polyethylene insulation to reduce radial heat flow. Several different side heat exchangers were tested. On the basis of the measurements, it was predicted that if a prototype of the device were equipped with a TEMG, daily temperature fluctuations would cause its output power to fluctuate between 0 and about 0.1 mW, peaking to 0.35 mW during early afternoon.

Snyder, Jeffrey↗
NASA NTRS2008

Multiple internal seal ring micro-electro-mechanical system vacuum packaging method

A Multiple Internal Seal Ring (MISR) Micro-Electro-Mechanical System (MEMS) vacuum packaging method that hermetically seals MEMS devices using MISR. The method bonds a capping plate having metal seal rings to a base plate having metal seal rings by wafer bonding the capping plate wafer to the base plate wafer. Bulk electrodes may be used to provide conductive paths between the seal rings on the base plate and the capping plate. All seals are made using only metal-to-metal seal rings deposited on the polished surfaces of the base plate and capping plate wafers. However, multiple electrical feed-through metal traces are provided by fabricating via holes through the capping plate for electrical connection from the outside of the package through the via-holes to the inside of the package. Each metal seal ring serves the dual purposes of hermetic sealing and providing the electrical feed-through metal trace.

Hayworth, Ken J.↗
NASA NTRS2013

Microwave Kinetic Inductance Detector with Selective Polarization Coupling

A conventional low-noise detector requires a technique to both absorb incident power and convert it to an electrical signal at cryogenic temperatures. This innovation combines low-noise detector and readout functionality into one device while maintaining high absorption, controlled polarization sensitivity, and broadband detection capability. The resulting far-infrared detectors can be read out with a simple approach, which is compact and minimizes thermal loading. The proposed microwave kinetic inductance detector (MKID) consists of three basic elements. The first is the absorptive section in which the incident power is coupled to a superconducting resonator at far-infrared frequency above its superconducting critical frequency (where superconductor becomes normal conductor). This absorber's shape effectively absorbs signals in the desired polarization state and is resonant at the radio frequency (RF) used for readout of the device. Control over the metal film used in the absorber allows realization of structures with either a 50% broadband or 100% resonance absorptance over a 30% fractional bandwidth. The second element is a microwave resonator - which is realized from the thin metal films used to make the absorber as transmission lines - whose resonance frequency changes due to a variation in its kinetic inductance. The resonator's kinetic inductance is a function of the power absorbed by the device. A low-loss dielectric (mono-crystalline silicon) is used in a parallel-plate transmission line structure to realize the desired superconducting resonators. There is negligible coupling among the adjacent elements used to define the polarization sensitivity of each detector. The final component of the device is a microwave transmission line, which is coupled to the resonator, and allows detection of changes in resonance frequency for each detector in the focal plane array. The spiral shape of the detector's absorber allows incident power with two polarizations to couple to the detector equally. A stepped impedance resonator was used that allows the incident power absorbed in the detecting membrane area to be uniformly distributed in the detector's transmission line at the RF readout frequency. This maximizes the sensitivity of the detector. The signal is read out via a frequency multiplexing technique that requires a minimum number of interface transmission lines for readout. This reduces the packaging complexity and coupling to the device's thermal environment.

Wollack, Edward↗
NASA NTRS2014

NASA Wearable Technology CLUSTER 2013-2014 Report

Wearable technology has the potential to revolutionize the way humans interact with one another, with information, and with the electronic systems that surround them. This change can already be seen in the dramatic increase in the availability and use of wearable health and activity monitors. These devices continuously monitor the wearer using on-­‐body sensors and wireless communication. They provide feedback that can be used to improve physical health and performance. Smart watches and head mounted displays are also receiving a great deal of commercial attention, providing immediate access to information via graphical displays, as well as additional sensing features. For the purposes of the Wearable Technology CLUSTER, wearable technology is broadly defined as any electronic sensing, human interfaces, computing, or communication that is mounted on the body. Current commercially available wearable devices primarily house electronics in rigid packaging to provide protection from flexing, moisture, and other contaminants. NASA mentors are interested in this approach, but are also interested in direct integration of electronics into clothing to enable more comfortable systems. For human spaceflight, wearable technology holds a great deal of promise for significantly improving safety, efficiency, autonomy, and research capacity for the crew in space and support personnel on the ground. Specific capabilities of interest include: Continuous biomedical monitoring for research and detection of health problems. Environmental monitoring for individual exposure assessments and alarms. Activity monitoring for responsive robotics and environments. Multi-modal caution and warning using tactile, auditory, and visual alarms. Wireless, hands-free, on-demand voice communication. Mobile, on-demand access to space vehicle and robotic displays and controls. Many technical challenges must be overcome to realize these wearable technology applications. For example, to make a wearable device that is both functional and comfortable for long duration wear, developers must strive to reduce electronic mass and volume while also addressing constraints imposed by the body attachment method. Depending on the application, the device must be placed in a location that the user can see and reach, and that provides the appropriate access to air and the wearer's skin. Limited power is available from body-­‐worn batteries and heat must be managed to prevent discomfort. If the clothing is to be washed, there are additional durability and washability hurdles that traditional electronics are not designed to address. Finally, each specific capability has unique technical challenges that will likely require unique solutions. In addition to the technical challenges, development of wearable devices is made more difficult by the diversity of skills required and the historic lack of collaboration across domains. Wearable technology development requires expertise in textiles engineering, apparel design, software and computer engineering, electronic design and manufacturing, human factors engineering, and application-­‐specific fields such as acoustics, medical devices, and sensing. Knowledge from each of these domains must be integrated to create functional and comfortable devices. For this reason, the diversity of knowledge and experience represented in the Wearable Technology is critical to overcoming the fundamental challenges in the field.

Simon, Cory↗
NASA NTRS1987

Space station power semiconductor package

A package of high-power switching semiconductors for the space station have been designed and fabricated. The package includes a high-voltage (600 volts) high current (50 amps) NPN Fast Switching Power Transistor and a high-voltage (1200 volts), high-current (50 amps) Fast Recovery Diode. The package features an isolated collector for the transistors and an isolated anode for the diode. Beryllia is used as the isolation material resulting in a thermal resistance for both devices of .2 degrees per watt. Additional features include a hermetical seal for long life -- greater than 10 years in a space environment. Also, the package design resulted in a low electrical energy loss with the reduction of eddy currents, stray inductances, circuit inductance, and capacitance. The required package design and device parameters have been achieved. Test results for the transistor and diode utilizing the space station package is given.

Balodis, Vilnis↗
DOE OSTI2026

Enabling Long Term, Shelf‐Stable Perovskite Solar Cells: Alumina Barriers to Protect Perovskite Devices from Moisture and Oxygen

Current encapsulation architectures for thin-film metal halide perovskite do not adequately eliminate all ambient stressors. Here, we develop low transmission rate barrier layers using atomic layer deposited (ALD) aluminum oxide grown directly on the completed photovoltaic (PV) device stack to provide an additional seal, prior to full packaging. We investigate the effect of deposition temperature and oxidant chemistries on the barrier growth for protection of perovskite photovoltaic devices. We characterize the layers individually, then integrate into devices to detail the tradeoff between protection and deposition compatibility. To enhance compatibility and impermeability, we present an approach using water as the aluminum oxidant during nucleation and switching from water to ozone for the remainder of the growth. At 50 nm, the barrier results in a water vapor transmission rate (WVTR) of 4.5·10 −4 g/m 2 /day, and 1,000-hour device stability under 45°C with 85% relative humidity without further packaging. This barrier provides sufficient protection to enable minimal degradation of the perovskite solar cells while completely submerged in water for 140 minutes. Additionally, we characterize the oxygen transmission rate (OTR) to be 0.49 cm 3 /m 2 /day at 23°C and 0% relative humidity, which is 1.5 orders of magnitude improvement over the OTR of the current encapsulation.

14 SOLAR ENERGY↗
NASA NTRS2015

Flexible Micropost Arrays for Shear Stress Measurement

Increased fuel costs, heightened environmental protection requirements, and noise abatement continue to place drag reduction at the forefront of aerospace research priorities. Unfortunately, shortfalls still exist in the fundamental understanding of boundary-layer airflow over aerodynamic surfaces, especially regarding drag arising from skin friction. For example, there is insufficient availability of instrumentation to adequately characterize complex flows with strong pressure gradients, heat transfer, wall mass flux, three-dimensionality, separation, shock waves, and transient phenomena. One example is the acoustic liner efficacy on aircraft engine nacelle walls. Active measurement of shear stress in boundary layer airflow would enable a better understanding of how aircraft structure and flight dynamics affect skin friction. Current shear stress measurement techniques suffer from reliability, complexity, and airflow disruption, thereby compromising resultant shear stress data. The state-of-the-art for shear stress sensing uses indirect or direct measurement techniques. Indirect measurements (e.g., hot-wire, heat flux gages, oil interferometry, laser Doppler anemometry, small scale pressure drag surfaces, i.e., fences) require intricate knowledge of the studied flow, restrictive instrument arrangements, large surface areas, flow disruption, or seeding material; with smaller, higher bandwidth probes under development. Direct measurements involve strain displacement of a sensor element and require no prior knowledge of the flow. Unfortunately, conventional "floating" recessed components for direct measurements are mm to cm in size. Whispering gallery mode devices and Fiber Bragg Gratings are examples of recent additions to this type of sensor with much smaller (m) sensor components. Direct detection techniques are often single point measurements and difficult to calibrate and implement in wind tunnel experiments. In addition, the wiring, packaging, and installation of delicate micro-electromechanical devices impede the use of most direct shear sensors. Similarly, the cavity required for sensing element displacement is sensitive to particulate obstruction. This work was focused on developing a shear stress sensor for use in subsonic wind tunnel test facilities applicable to an array of test configurations. The non-displacement shear sensors described here have minimal packaging requirements resulting in minimal or no disturbance of boundary layer flow. Compared to previous concepts, device installation could be simple with reduced cost and down-time. The novelty lies in the creation of low profile (nanoscale to 100 μm) micropost arrays that stay within the viscous sub-layer of the airflow. Aerodynamic forces, which are related to the surface shear stress, cause post deflection and optical property changes. Ultimately, a reliable, accurate shear stress sensor that does not disrupt the airflow has the potential to provide high value data for flow physics researchers, aerodynamicists, and aircraft manufacturers leading to greater flight efficiency arising from more in-depth knowledge on how aircraft design impacts near surface properties.

Wohl, Christopher J.↗