Resilient s-ACD for Asynchronous Collaborative Solutions of Systems of Linear Equations
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Mathematics and Computing, Computer science↗
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Designing an Energy-Efficient Fully-Asynchronous Deep Learning Accelerator Engine
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Computer science↗
Digital Synchronizer without Metastability
A proposed design for a digital synchronizing circuit would eliminate metastability that plagues flip-flop circuits in digital input/output interfaces. This metastability is associated with sampling, by use of flip-flops, of an external signal that is asynchronous with a clock signal that drives the flip-flops: it is a temporary flip-flop failure that can occur when a rising or falling edge of an asynchronous signal occurs during the setup and/or hold time of a flip-flop. The proposed design calls for (1) use of a clock frequency greater than the frequency of the asynchronous signal, (2) use of flip-flop asynchronous preset or clear signals for the asynchronous input, (3) use of a clock asynchronous recovery delay with pulse width discriminator, and (4) tying the data inputs to constant logic levels to obtain (5) two half-rate synchronous partial signals - one for the falling and one for the rising edge. Inasmuch as the flip-flop data inputs would be permanently tied to constant logic levels, setup and hold times would not be violated. The half-rate partial signals would be recombined to construct a signal that would replicate the original asynchronous signal at its original rate but would be synchronous with the clock signal.
Simle, Robert M.↗
Computational chaos in massively parallel neural networks
A fundamental issue which directly impacts the scalability of current theoretical neural network models to massively parallel embodiments, in both software as well as hardware, is the inherent and unavoidable concurrent asynchronicity of emerging fine-grained computational ensembles and the possible emergence of chaotic manifestations. Previous analyses attributed dynamical instability to the topology of the interconnection matrix, to parasitic components or to propagation delays. However, researchers have observed the existence of emergent computational chaos in a concurrently asynchronous framework, independent of the network topology. Researcher present a methodology enabling the effective asynchronous operation of large-scale neural networks. Necessary and sufficient conditions guaranteeing concurrent asynchronous convergence are established in terms of contracting operators. Lyapunov exponents are computed formally to characterize the underlying nonlinear dynamics. Simulation results are presented to illustrate network convergence to the correct results, even in the presence of large delays.
Barhen, Jacob↗
RAID 7 disk array
Each RAID level reflects a different design architecture. Associated with each is a backdrop of imposed limitations, as well as possibilities which may be exploited within the architectural constraints of that level. There are three unique features that differentiate RAID 7 from all other levels. RAID 7 is asynchronous with respect to usage of I/O data paths. Each I/O drive (includes all data and one parity drives) as well as each host interface (there may be multiple host interfaces) has independent control and data paths. This means that each can be accessed completely, independently, of the other. This is facilitated by a separate device cache for each device/interface as well. RAID 7 is asynchronous with respect to device hierarchy and data bus utilization. Each drive and each interface is connected to a high speed data bus controlled by the embedded operating system to make independent transfers to and from central cache. RAID 7 is asynchronous with respect to the operation of an embedded real time process oriented operating system. This means that exclusive and independent of the host, or multiple host paths, the embedded OS manages all I/O transfers asynchronously across the data and parity drives. A key factor to consider is that of the RAID 7's ability to anticipate and match host I/O usage patterns. This yields the following benefits over RAID's built around micro-code based architectures. RAID 7 appears to the host as a normally connected Big Fast Disk (BFD). RAID 7 appears, from the perspective of the individual disk devices, to minimize the total number of accesses and optimize read/write transfer requests. RAID 7 smoothly integrates the random demands of independent users with the principles of spatial and temporal locality. This optimizes small, large, and time sequenced I/O requests which results in users having an I/O performance which approaches performance to that of main memory.
Stout, Lloyd↗
Stability and control of power systems with high penetrations of inverter-based resources: An accessible review of current knowledge and open questions
As power system renewable energy penetrations increase, the ways in which key renewable technologies such as wind and solar photovoltaics (PV) differ from thermal generators become more apparent. Many studies have examined the variability and uncertainty of such generators and described how generation and load can be balanced for a wide variety of annual energy penetrations, at timescales from seconds to years. Another important characteristic of these resources is asynchronicity, the result of using inverters to interface the prime energy source with the power system as opposed to synchronous generators. Unlike synchronous generators, whose frequency of alternating current (AC) injection is physically coupled to the rotation of the machine itself, inverter based asynchronous generators do not share the same physical coupling with the generated frequency. These subtle differences impact the operations of power systems developed around the characteristics of synchronous generators. In this paper we review current knowledge and open research questions concerning the interplay between asynchronous inverter-based resources (IBRs) and cycle- to second-scale power system dynamics, with a focus on how stability and control may be impacted or need to be achieved differently when there are high instantaneous penetrations of IBRs across an interconnection. This work does not seek to provide a comprehensive review of the latest developments, but is instead intended to be accessible to any reader with an engineering background and an interest in power systems and renewable energy. As such, the paper includes basic material on power electronics, control schemes for IBRs, and power system stability; and uses this background material to describe potential impacts of IBRs on power system stability, operational challenges associated with large amounts of distributed IBR generation, and modern power system simulation trends driven by IBR characteristics.
14 SOLAR ENERGY↗
Trigger-based Incremental Data Processing with Unified Sync and Async Model
In recent years, more and more applications in the cloud have needs to process large-scale on-line datasets, which evolve over time as new entries are added and existing entries are modified. Several programming frameworks, such as Percolator and Oolong, are proposed for such incremental data processing and can achieve efficient processing with an event-driven abstraction. However, these frameworks are inherently asynchronous, leaving the heavy burden of managing synchronization to applications' developers, which further significantly restricts their usabilities. In this study, we propose a trigger-based incremental computing framework in the cloud, called Domino, with both synchronous and asynchronous mechanisms to coordinate parallel triggers. With this new framework, both synchronous and asynchronous applications can be seamlessly developed. Use cases and extensive evaluation results confirm that it can deliver sufficient performance, and also is easy to use for incremental applications in large-scale distributed computing.
97 MATHEMATICS AND COMPUTING↗
Control strategy for a variable-speed wind energy conversion system
A control concept for a variable-speed wind energy conversion system is proposed, for which a self-exited asynchronous cage generator is used along with a system of thyristor converters. The control loops are the following: (1) regulation of the entrainment speed as function of available mechanical energy by acting on the resistance couple of the asynchronous generator; (2) control of electric power delivered to the asynchronous machine, functioning as a motor, for start-up of the vertical axis wind converter; and (3) limitation of the slip value, and by consequence, of the induction currents in the presence of sudden variations of input parameters.
Jacob, A.↗
Fairness of channel access for non-time-critical traffic using the FDDI token ring protocol
The Fiber Distributed Data Interface (FDDI) is an ANSI draft proposed standard for a 100 megabit per second fiber optic token ring. FDDI supports two types of traffic, synchronous and asynchronous. Synchronous traffic is time critical traffic; stations are assigned guaranteed bandwidth to support their synchronous needs. Asynchronous traffic is lower priority and is sent only if time permits. It is proved analytically that the FDDI access protocol provides all stations on the ring with equal access to the channel to transmit asynchronous frames, regardless of the relative sizes of synchronous bandwidth allocations for individual stations. Analytic results are supported with data from simulation runs.
Johnson, M. J.↗
Throughput analysis of the IEEE 802.4 token bus standard under heavy load
It has become clear in the last few years that there is a trend towards integrated digital services. Parallel to the development of public Integrated Services Digital Network (ISDN) is service integration in the local area (e.g., a campus, a building, an aircraft). The types of services to be integrated depend very much on the specific local environment. However, applications tend to generate data traffic belonging to one of two classes. According to IEEE 802.4 terminology, the first major class of traffic is termed synchronous, such as packetized voice and data generated from other applications with real-time constraints, and the second class is called asynchronous which includes most computer data traffic such as file transfer or facsimile. The IEEE 802.4 token bus protocol which was designed to support both synchronous and asynchronous traffic is examined. The protocol is basically a timer-controlled token bus access scheme. By a suitable choice of the design parameters, it can be shown that access delay is bounded for synchronous traffic. As well, the bandwidth allocated to asynchronous traffic can be controlled. A throughput analysis of the protocol under heavy load with constant channel occupation of synchronous traffic and constant token-passing times is presented.
Pang, Joseph↗
Compression of digital images over local area networks. Appendix 1: Item 3
Differential Pulse Code Modulation (DPCM) has been used with speech for many years. It has not been as successful for images because of poor edge performance. The only corruption in DPC is quantizer error but this corruption becomes quite large in the region of an edge because of the abrupt changes in the statistics of the signal. We introduce two improved DPCM schemes; Edge correcting DPCM and Edge Preservation Differential Coding. These two coding schemes will detect the edges and take action to correct them. In an Edge Correcting scheme, the quantizer error for an edge is encoded using a recursive quantizer with entropy coding and sent to the receiver as side information. In an Edge Preserving scheme, when the quantizer input falls in the overload region, the quantizer error is encoded and sent to the receiver repeatedly until the quantizer input falls in the inner levels. Therefore these coding schemes increase the bit rate in the region of an edge and require variable rate channels. We implement these two variable rate coding schemes on a token wing network. Timed token protocol supports two classes of messages; asynchronous and synchronous. The synchronous class provides a pre-allocated bandwidth and guaranteed response time. The remaining bandwidth is dynamically allocated to the asynchronous class. The Edge Correcting DPCM is simulated by considering the edge information under the asynchronous class. For the simulation of the Edge Preserving scheme, the amount of information sent each time is fixed, but the length of the packet or the bit rate for that packet is chosen depending on the availability capacity. The performance of the network, and the performance of the image coding algorithms, is studied.
Gorjala, Bhargavi↗
High performance interconnection between high data rate networks
The bridge/gateway system needed to interconnect a wide range of computer networks to support a wide range of user quality-of-service requirements is discussed. The bridge/gateway must handle a wide range of message types including synchronous and asynchronous traffic, large, bursty messages, short, self-contained messages, time critical messages, etc. It is shown that messages can be classified into three basic classes, synchronous and large and small asynchronous messages. The first two require call setup so that packet identification, buffer handling, etc. can be supported in the bridge/gateway. Identification enables resequences in packet size. The third class is for messages which do not require call setup. Resequencing hardware based to handle two types of resequencing problems is presented. The first is for a virtual parallel circuit which can scramble channel bytes. The second system is effective in handling both synchronous and asynchronous traffic between networks with highly differing packet sizes and data rates. The two other major needs for the bridge/gateway are congestion and error control. A dynamic, lossless congestion control scheme which can easily support effective error correction is presented. Results indicate that the congestion control scheme provides close to optimal capacity under congested conditions. Under conditions where error may develop due to intervening networks which are not lossless, intermediate error recovery and correction takes 1/3 less time than equivalent end-to-end error correction under similar conditions.
Foudriat, E. C.↗
Adaptive digital beamforming for a CDMA mobile communications payload
In recent years, Spread-Spectrum Code Division Multiple Access (CDMA) has become a very popular access scheme for mobile communications due to a variety of reasons: excellent performance in multipath environments, high scope for frequency reuse, graceful degradation near saturation, etc. In this way, a CDMA system can support simultaneous digital communication among a large community of relatively uncoordinated users sharing a given frequency band. Nevertheless, there are also important problems associated with the use of CDMA. First, in a conventional CDMA scheme, the signature sequences of asynchronous users are not orthogonal and, as the number of active users increases, the self-noise generated by the mutual interference between users considerably degrades the performance, particularly in the return link. Furthermore, when there is a large disparity in received powers - due to differences in slant range or atmospheric attenuation - the non-zero cross-correlation between the signals gives rise to the so-called near-far problem. This leads to an inefficient utilization of the satellite resources and, consequently, to a drastic reduction in capacity. Several techniques were proposed to overcome this problem, such as Synchronized CDMA - in which the signature sequences of the different users are quasi-orthogonal - and power control. At the expense of increased network complexity and user coordination, these techniques enable the system capacity to be restored by equitably sharing the satellite resources among the users. An alternative solution is presented based upon the use of time-reference adaptive digital beamforming on board the satellite. This technique enables a high number of independently steered beams to be generated from a single phased array antenna, which automatically track the desired user signal and null the unwanted interference source. In order to use a time-reference adaptive antenna in a communications system, the main challenge is to obtain a reference signal highly correlated with the desired user signal and uncorrelated with the interferences. CDMA lends itself very easily to the generation of such a reference signal, thanks to the a priori knowledge of the user's signature sequence. First, the integration of an adaptive antenna in an asynchronous CDMA system is analyzed. The adaptive antenna system can provide increased interference rejection - much higher than that afforded by the code alone - and, since CDMA is mainly interference limited, any reduction in interference converts directly and linearly into an increase in capacity. Analyses and computer simulations are presented that show how an asynchronous CDMA system incorporating adaptive beamforming can provide at least as much capacity as a synchronous system. More importantly, the proposed concept allows the near-far effect to be mitigated without requiring a tight coordination of the users in terms of transmitted power control or network synchronization. The system is extremely robust to the near-far effect because the signals reaching the satellite from directions other than that of the desired user - which are likely to have different power levels - are adaptively canceled by the antenna. Finally, a payload architecture is presented that illustrates the practical implementation of this concept. This digital payload architecture demonstrates that with the advent of high performance CMOS digital processing, the on-board implementation of complex DSP techniques - in particular Digital Beamforming - has become possible, being most attractive for Mobile Satellite Communications.
Munoz-Garcia, Samuel G.↗
Modeling and Analysis of Mixed Synchronous/Asynchronous Systems
Practical safety-critical distributed systems must integrate safety critical and non-critical data in a common platform. Safety critical systems almost always consist of isochronous components that have synchronous or asynchronous interface with other components. Many of these systems also support a mix of synchronous and asynchronous interfaces. This report presents a study on the modeling and analysis of asynchronous, synchronous, and mixed synchronous/asynchronous systems. We build on the SAE Architecture Analysis and Design Language (AADL) to capture architectures for analysis. We present preliminary work targeted to capture mixed low- and high-criticality data, as well as real-time properties in a common Model of Computation (MoC). An abstract, but representative, test specimen system was created as the system to be modeled.
Driscoll, Kevin R.↗
Online Distribution System State Estimation via Stochastic Gradient Algorithm
Distribution network operation is becoming more challenging because of the growing integration of intermittent and volatile distributed energy resources (DERs). This motivates the development of new distribution system state estimation (DSSE) paradigms that can operate at fast timescale based on real-time data stream of asynchronous measurements enabled by modern information and communications technology. To solve the real-time DSSE with asynchronous measurements effectively and accurately, this paper formulates a weighted least squares DSSE problem and proposes an online stochastic gradient algorithm to solve it. The performance of the proposed scheme is analytically guaranteed and is numerically corroborated with realistic data on IEEE 123-bus feeder.
distribution system state estimation↗
HDF5 in the exascale era: Delivering efficient and scalable parallel I/O for exascale applications
Accurately modeling real-world systems requires scientific applications at exascale to generate massive amounts of data and manage data storage efficiently. However, parallel input and output (I/O) faces challenges due to new application workflows and the state-of-the-art memory, interconnect, and storage architectures considered in exascale designs. The storage hierarchy has expanded with node-local persistent memory, solid-state storage, and traditional disk and tape-based storage, thus requiring efficiency at each layer and much more efficient data movement among these layers. This paper discusses how the ExaHDF5 project improved the I/O performance and data management for exascale architectures by enhancing HDF5, a widely used parallel I/O library. The team developed an Asynchronous I/O Virtual Object Layer (VOL) connector that allowed overlapping I/O with computation. They also created a Cache VOL to complement asynchronous I/O by incorporating fast storage layers, such as burst buffer and node-local storage, into the parallel I/O workflow through caching and staging data. Additionally, the team enabled data aggregation and I/O at the node level by using a Subfiling Virtual File Driver (VFD). To demonstrate superior I/O performance with HDF5 at exascale, the ExaHDF5 team collaborated with several exascale applications. In this paper, we show I/O performance improvements for three applications: Cabana (a particle-based simulation library), EQSIM (a regional earthquake simulation software), and E3SM (a climate system modeling library).
Asynchronous I/Ol↗