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At least 235 records · Page 13
All sourcesNASA NTRSDOE OSTI
NASA NTRS1973

Heat treatment effects in Cu2S-CdS heterojunction photovoltaic cells

The optical and electronic properties of single crystal Cu2S-CdS photovoltaic cells were investigated. In these cells trapped charge near the interface which is manifested by a persistent increase in junction capacitance (the photocapacitance) plays a significant role in determining the carrier transport properties. It was found that the severe degradation in short-circuit current observed in heat-treated cells can be separated into two components: (1) a relatively small thermal component occurring on heat-treatment in the dark, and (2) a much larger degradation caused by exposure to light at room temperature. By a short additional heat-treatment above approximately 100 C the cell can be completely restored to its condition before the optically caused degradation with no effect on the depletion layer width.

Fahrenbruch, A. L.↗
NASA NTRS1980

Electronic system for high power load control

Parallel current paths are divided into two groups, with control devices in the current paths of one group each having a current limiting resistor, and the control devices in the other group each having no limiting resistor, so that when the control devices of the second group are turned fully on, a short circuit is achieved by the arrangement of parallel current paths. Separate but coordinated control signals are provided to turn on the control devices of the first group and increase their conduction toward saturation as a function of control input, and when fully on, or shortly before, to turn on the control devices of the second group and increase their conduction toward saturation as a function of the control input as that input continues to increase. Electronic means may be used to generate signals. The system may be used for 1-V characteristic measurements of solar arrays as well as for other load control purposes.

Miller, E. L.↗
NASA NTRS1986

Dot junction solar cells

A design of solar cells with reduced junction area on the cell surface is investigated for reduction of saturation current and increase in open-circuit voltage. Equidiameter dot junctions distributed across the surface of the cell offer an efficient alternative, with variations in dot diameter and in the spacing between dots giving the required variations in the ratio of junction area to total surface area. A simplified analysis for short-circuit current and other cell parameters, which enables cell design optimization, is presented. Experimental solar-cell performance results, as functions of different area ratios, are presented and compared with the model. It is shown that saturation current reduction is possible for achieving efficiencies as high as 18 percent in flat-plate terrestrial applications.

Daud, T.↗
NASA NTRS1985

Fabrication and analysis of dot junction silicon solar cells

A design of solar cells with reduced junction area on the cell surface is investigated for reduction of saturation current and increase in open-circuit voltage. Equidiameter dot junctions distributed across the surface of the cell offer an efficient alternative, with variations in dot diameter and in the spacing between dots giving the required variations in the ratio of junctions area to total surface area. A simplified analysis for short-circuit current and other cell parameters, which enables cell design optimization, is presented. Efficiencies beyond 18 percent are obtainable in flat-plate terrestrial applications. Experimental solar-cell performance results, as functions of different area ratios, and bulk doping are presented. It is shown that saturation current reduction and open-circuit voltage increase is obtained by reduced junction area.

Crotty, G. T.↗
NASA NTRS2003

Could Zinc Whiskers Be Impacting Your Electronic Systems? Raise Your Awareness

During the past several decades electrical short circuits induced by "Zinc Whiskers" have been cited as the root cause of failure for various electronic systems (e.g., apnea monitors, telecom switches). These tiny filaments of zinc that may grow from some zinc-coated items (especially those coated by electroplating processes) have the potential to induce electrical shorts in exposed circuitry. Through this article, the authors describe a particular failure scenario attributed to zinc whiskers that has affected many facilities (including some NASA facilities) that utilized zinc-coated raised "access" floor tiles and support structures. Zinc whiskers that may be growing beneath your raised floor have the potential to wreak havoc on electronic systems operating above the floor.

Sampson, Michael↗
NASA NTRS2005

Space Shuttle Columbia Aging Wiring Failure Analysis

A Space Shuttle Columbia main engine controller 14 AWG wire short circuited during the launch of STS-93. Post-flight examination divulged that the wire had electrically arced against the head of a nearby bolt. More extensive inspection revealed additional damage to the subject wire, and to other wires as well from the mid-body of Columbia. The shorted wire was to have been constructed from nickel-plated copper conductors surrounded by the polyimide insulation Kapton, top-coated with an aromatic polyimide resin. The wires were analyzed via scanning electron microscope (SEM), energy dispersive X-Ray spectroscopy (EDX), and electron spectroscopy for chemical analysis (ESCA); differential scanning calorimetry (DSC) and thermal gravimetric analysis (TGA) were performed on the polyimide. Exemplar testing under laboratory conditions was performed to replicate the mechanical damage characteristics evident on the failed wires. The exemplar testing included a step test, where, as the name implies, a person stepped on a simulated wire bundle that rested upon a bolt head. Likewise, a shear test that forced a bolt head and a torque tip against a wire was performed to attempt to damage the insulation and conductor. Additionally, a vibration test was performed to determine if a wire bundle would abrade when vibrated against the head of a bolt. Also, an abrasion test was undertaken to determine if the polyimide of the wire could be damaged by rubbing against convolex helical tubing. Finally, an impact test was performed to ascertain if the use of the tubing would protect the wire from the strike of a foreign object.

McDaniels, Steven J.↗
NASA NTRS1980

Characterization of silicon-gate CMOS/SOS integrated circuits processed with ion implantation

The double layer metallization technology applied on p type silicon gate CMOS/SOS integrated circuits is described. A smooth metal surface was obtained by using the 2% Si-sputtered Al. More than 10% probe yield was achieved on solar cell controller circuit TCS136 (or MSFC-SC101). Reliability tests were performed on 15 arrays at 150 C. Only three arrays failed during the burn in, and 18 arrays out of 22 functioning arrays maintained the leakage current below 100 milli-A. Analysis indicates that this technology will be a viable process if the metal short circuit problem between the two metals can be reduced.

Woo, D. S.↗
NASA NTRS1977

Epitaxial solar-cell fabrication, phase 2

Dichlorosilane (SiH2Cl2) was used as the silicon source material in all of the epitaxial growths. Both n/p/p(+) and p/n/n(+) structures were studied. Correlations were made between the measured profiles and the solar cell parameters, especially cell open-circuit voltage. It was found that in order to obtain consistently high open-circuit voltage, the epitaxial techniques used to grow the surface layer must be altered to obtain very abrupt doping profiles in the vicinity of the junction. With these techniques, it was possible to grow reproducibly both p/n/n(+) and n/p/p(+) solar cell structures having open-circuit voltages in the 610- to 630-mV range, with fill-factors in excess of 0.80 and AM-1 efficiencies of about 13%. Combinations and comparisons of epitaxial and diffused surface layers were also made. Using such surface layers, we found that the blue response of epitaxial cells could be improved, resulting in AM-1 short-circuit current densities of about 30 mA/cm sq. The best cells fabricated in this manner had AM-1 efficiency of 14.1%.

Daiello, R. V.↗
NASA NTRS1987

Ferroresonant flux coupled battery charger

A battery charger for incorporation into an electric-powered vehicle is disclosed. The charger includes a ferroresonant voltage-regulating circuit for providing an output voltage proportional to the frequency of an input AC voltage. A high frequency converter converts a DC voltage supplied, for example, from a rectifier connected to a standard AC outlet, to a controlled frequency AC voltage which is supplied to the input of the ferroresonant circuit. The ferroresonant circuit includes an output, a saturable core transformer connected across the output, and a first linear inductor and a capacitor connected in series across the saturable core transformer and tuned to resonate at the third harmonic of the AC voltage from the high frequency converter. The ferroresonant circuit further includes a second linear inductor connected between the input of the ferroresonant circuit and the saturable core transformer. The output voltage from the ferroresonant circuit is rectified and applied across a pair of output terminals adapted to be connected to the battery to be charged. A feedback circuit compares the voltage across the output terminals with a reference voltage and controls the frequency of the AC voltage produced by the high frequency converter to maintain the voltage across the output terminals at a predetermined value. The second linear inductor provides a highly reactive load in the event of a fault across the output terminals to render the charger short-circuit proof.

McLyman, Colonel W. T.↗
NASA NTRS2007

Reliability Effects of Surge Current Testing of Solid Tantalum Capacitors

Solid tantalum capacitors are widely used in space applications to filter low-frequency ripple currents in power supply circuits and stabilize DC voltages in the system. Tantalum capacitors manufactured per military specifications (MIL-PRF-55365) are established reliability components and have less than 0.001% of failures per 1000 hours (the failure rate is less than 10 FIT) for grades D or S, thus positioning these parts among electronic components with the highest reliability characteristics. Still, failures of tantalum capacitors do happen and when it occurs it might have catastrophic consequences for the system. This is due to a short-circuit failure mode, which might be damaging to a power supply, and also to the capability of tantalum capacitors with manganese cathodes to self-ignite when a failure occurs in low-impedance applications. During such a failure, a substantial amount of energy is released by exothermic reaction of the tantalum pellet with oxygen generated by the overheated manganese oxide cathode, resulting not only in destruction of the part, but also in damage of the board and surrounding components. A specific feature of tantalum capacitors, compared to ceramic parts, is a relatively large value of capacitance, which in contemporary low-size chip capacitors reaches dozens and hundreds of microfarads. This might result in so-called surge current or turn-on failures in the parts when the board is first powered up. Such a failure, which is considered as the most prevalent type of failures in tantalum capacitors [I], is due to fast changes of the voltage in the circuit, dV/dt, producing high surge current spikes, I(sub sp) = Cx(dV/dt), when current in the circuit is unrestricted. These spikes can reach hundreds of amperes and cause catastrophic failures in the system. The mechanism of surge current failures has not been understood completely yet, and different hypotheses were discussed in relevant literature. These include a sustained scintillation breakdown model [1-3]; electrical oscillations in circuits with a relatively high inductance [4-6]; local overheating of the cathode [5,7, 8]; mechanical damage to tantalum pentoxide dielectric caused by the impact of MnO2 crystals [2,9, 10]; or stress-induced-generation of electron traps caused by electromagnetic forces developed during current spikes [11]. A commonly accepted explanation of the surge current failures is that at unlimited current supply during surge current conditions, the self-healing mechanism in tantalum capacitors does not work, and what would be a minor scintillation spike if the current were limited, becomes a catastrophic failure of the part [l, 12]. However, our data show that the scintillation breakdown voltages are significantly greater that the surge current breakdown voltages, so it is still not clear why the part, which has no scintillations, would fail at the same voltage during surge current testing (SCT).

Teverovsky, Alexander↗
NASA NTRS1991

Testing interconnected VLSI circuits in the Big Viterbi Decoder

The Big Viterbi Decoder (BVD) is a powerful error-correcting hardware device for the Deep Space Network (DSN), in support of the Galileo and Comet Rendezvous Asteroid Flyby (CRAF)/Cassini Missions. Recently, a prototype was completed and run successfully at 400,000 or more decoded bits per second. This prototype is a complex digital system whose core arithmetic unit consists of 256 identical very large scale integration (VLSI) gate-array chips, 16 on each of 16 identical boards which are connected through a 28-layer, printed-circuit backplane using 4416 wires. Special techniques were developed for debugging, testing, and locating faults inside individual chips, on boards, and within the entire decoder. The methods are based upon hierarchical structure in the decoder, and require that chips or boards be wired themselves as Viterbi decoders. The basic procedure consists of sending a small set of known, very noisy channel symbols through a decoder, and matching observables against values computed by a software simulation. Also, tests were devised for finding open and short-circuited wires which connect VLSI chips on the boards and through the backplane.

Onyszchuk, I. M.↗
NASA NTRS1980

Radiation damage in high voltage silicon solar cells

High open circuit voltage cell designs based on 0.1 Ohm cm p-type silicon were irradiated with 1 MeV electrons and their performance determined to fluences as high as 10 to the 15th power per sq cm. Of the three cell designs, radiation induced degradation was greatest in the high low emitter (HLE) cell. The diffused and ion implanted cells degraded approximately equally but less than the HLE cell. Degradation was greatest in an HLE cell exposed to X-rays before electron irradiation. The cell regions controlling both short circuit current and open circuit voltage degradation were defined in all three cell types. An increase in front surface recombination velocity accompanied time dependent degradation of an HLE cell after X-irradiation. It was speculated that this was indirectly due to a decrease in positive charge at the silicon oxide interface. Modifications aimed at reducing radiation induced degradation are proposed for all three cell types.

Weinberg, I.↗
NASA NTRS1980

Radiation damage in high voltage silicon solar cells

Three high open-circuit voltage cell designs based on 0.1 ohm-cm p-type silicon were irradiated with 1 MeV electrons and their performance determined to fluences as high as 10 to the 15th/sq cm. Of the three cell designs, radiation induced degradation was greatest in the high-low emitter (HLE) cell. The diffused and ion implanted cells degraded approximately equally but less than the HLE cell. Degradation was greatest in an HLE cell exposed to X-rays before electron irradiation. The cell regions controlling both short-circuit current and open-circuit voltage degradation were defined in all three cell types. An increase in front surface recombination velocity accompanied time dependent degradation of a HLE cell after X-irradiation. It was speculated that this was indirectly due to a decrease in positive charge at the silicon-oxide interface. Modifications aimed at reducing radiation induced degradation are proposed for all three cell types.

Weinberg, I.↗
NASA NTRS1980

Radiation damage in high voltage silicon solar cells

Three high open-circuit voltage cell designs based on 0.1 ohm-cm p-type silicon were irradiated with 1 MeV electrons and their performance determined to fluences as high as 10 to the 15th power/sq cm. Of the three cell designs, radiation induced degradation was greatest in the high-low emitter (HLE cell). The diffused and ion implanted cells degraded approximately equally but less than the HLE cell. Degradation was greatest in an HLE cell exposed to X-rays before electron irradiation. The cell regions controlling both short-circuit current and open-circuit voltage degradation were defined in all three cell types. An increase in front surface recombination velocity accompanied time dependent degradation of an HLE cell after X-irradiation. It was speculated that this was indirectly due to a decrease in positive charge at the silicon-oxide interface. Modifications aimed at reducing radiation induced degradation are proposed for all three cell types.

Weinberg, I.↗
NASA NTRS1986

Swept frequency technique for dispersion measurement of microstrip lines

Microstrip lines used in microwave integrated circuits are dispersive. Because a microstrip line is an open structure, the dispersion can not be derived with pure TEM, TE, or TM mode analysis. Dispersion analysis has commonly been done using a spectral domain approach, and dispersion measurement has been made with high Q microstrip ring resonators. Since the dispersion of a microstrip line is fully characterized by the frequency dependent phase velocity of the line, dispersion measurement of microstrip lines requires the measurement of the line wavelength as a function of frequency. In this paper, a swept frequency technique for dispersion measurement is described. The measurement was made using an automatic network analyzer with the microstrip line terminated in a short circuit. Experimental data for two microstrip lines on 10 and 30 mil Cuflon substrates were recorded over a frequency range of 2 to 20 GHz. Agreement with theoretical results computed by the spectral domain approach is good. Possible sources of error for the discrepancy are discussed.

Lee, R. Q.↗
NASA NTRS1989

Distortion and regulation characterization of a Mapham inverter

Output-voltage total harmonic distortion (THD) of a 20-kHz, 6-kVA Mapham resonant inverter is characterized as a function of its switching-to-resonant frequency ratio, f(s)/f(r), using the EASY5 Engineering Analysis System. EASY5 circuit simulation results are compared with hardware test results to verify the accuracy of the simulations. The effects of load on the THD versus f(s)/f(r) is investigated for resistive, leading, and lagging power factor load impedances. The effect of the series output capacitor on the Mapham inverter output-voltage distortion and inherent load regulation is characterized under loads of various power factors and magnitudes. An optimum series capacitor value which improves the inherent load regulation to better than 3 percent is identified. The optimum series capacitor value is different from the value predicted from a modeled frequency domain analysis. An explanation is proposed which takes into account the conduction overlap in the inductor pairs during steady-state inverter operation, which decreases the effective inductance of a Mapham inverter. A fault protection and current limit method is discussed which allows the Mapham inverter to operate into a short circuit, even when the inverter resonant circuit becomes overdamped.

Sundberg, Richard C.↗
NASA NTRS1989

Distortion and regulation characterization of a Mapham inverter

Output voltage Total Harmonic Distortion (THD) of a 20kHz, 6kVA Mapham resonant inverter is characterized as a function of its switching-to-resonant frequency ratio, f sub s/f sub r, using the EASY5 engineering analysis system. EASY5 circuit simulation results are compared with hardware test results to verify the accuracy of the simulations. The effects of load on the THD versus f sub s/f sub r ratio is investigated for resistive, leading, and lagging power factor load impedances. The effect of the series output capacitor on the Mapham inverter output voltage distortion and inherent load regulation is characterized under loads of various power factors and magnitudes. An optimum series capacitor value which improves the inherent load regulation to better than 3 percent is identified. The optimum series capacitor value is different than the value predicted from a modeled frequency domain analysis. An explanation is proposed which takes into account the conduction overlap in the inductor pairs during steady-state inverter operation, which decreases the effective inductance of a Mapham inverter. A fault protection and current limit method is discussed which allows the Mapham inverter to operate into a short circuit, even when the inverter resonant circuit becomes overdamped.

Sundberg, Richard C.↗
NASA NTRS1991

Recent advances in the ITO/InP solar cell

It was demonstrated that Indium Tin Oxide (ITO)/InP solar cells can now be made on as-received p(-) bulk substrates which are of nearly equal quality to those which could previously only be made on epitaxially grown p(-) InP base layers. Although this advancement is due in part to both increases in substrate quality and a better understanding of back contact formation, it appears that the passivation/compensation effects resulting from having H2 in the sputtering gas tends to reduce significantly the performance differences previously observed between these two substrates. It is shown that since high efficiency ITO/InP cells can be made from as-received substrates, and since the type conversion process is not highly spatially dependent, large area ITO/InP cells (4 sq cm) with efficiencies approaching 17 percent (Global) can be made. Furthermore, the measured open circuit voltages (V sub OC) and quantum efficiencies (QEs) from these large cells suggest that, when they are processed using optimum grid designs, the efficiencies will be nearly equal to that of the smaller cells thus far produced. It has been shown, through comparative experiments involving ITO/InP and IO/InP cells, that Sn may not be the major cause of type conversion of the InP surface and thus further implies that the ITO may not be an essential element in this type of device. Specifically, very efficient photovoltaic solar cells were made by sputtering (Sn free) In2O3 showing that type conversion and subsequent junction formation will occur even in the absence of the sputtered SN species. The result suggests that sputter damage may indeed be the important mechanism(s) of type conversion. Finally, an initial study of the stability of the ITO/InP cell done over the course of about one year has indicated that the J(sub SC) (short circuit current) and the fill factor (FF) are measurably stable within experimental certainty.

Gessert, T. A.↗