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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 235 records · Page 13
All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

Optimization of Source Material for in-situ Arsenic Doping via Vapor Transport Deposition of CdTe Films

In-situ doping of CdTe/CdSeTe films with arsenic is performed using pre-doped source material prepared by high pressure Bridgman (HPB) melt growth. Arsenic level in the source material is varied from 1018-1020 cm-3. Correspondingly, dopant incorporation in the films prepared using vapor transport deposition (VTD) varied from 3x1017 cm-3–1x1018cm-3. In this range, dopant activation is found to inversely correlate with the dopant incorporation, suggesting compensation. The results from this study indicate film properties can be adjusted by source material.

41 EE - Solar Energy Technologies Office (EE-4S)↗
DOE OSTI2025

Coupling of electronic transition to ferroelectric order in a 2D semiconductor

A ferroelectric material often exhibits a soft transverse optical (TO) phonon mode which governs its phase transition. Charge coupling to this ferroelectric soft mode may further mediate emergent physical properties, including superconductivity and defect tolerance in semiconductors. However, direct experimental evidence for such coupling is scarce. Here we show that a photogenerated coherent phonon couples strongly to the electronic transition above the bandgap in the van der Waals (vdW) two-dimensional (2D) ferroelectric semiconductor NbOI 2 . Using terahertz time-domain spectroscopy and first-principles calculations, we identify this mode as the TO phonon responsible for ferroelectric order. This exclusive coupling occurs only with the above-gap electronic transition and is absent in the valence band as revealed by resonant inelastic X-ray scattering. Our findings suggest a new role of the soft TO phonon mode in electronic and optical properties of ferroelectric semiconductors.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Cadmium Telluride Accelerator Consortium (CTAC)

The United States is the leader in cadmium telluride (CdTe) photovoltaic (PV) manufacturing, and CdTe is the second most-deployed solar technology in the world. The CdTe Accelerator Consortium (CTAC) was formed to enhance U.S. technology leadership and competitiveness in CdTe photovoltaics (PV) including increasing cell efficiencies, decreasing module costs, and maintaining or increasing domestic CdTe PV material and module production. Leadership for the 3-year consortium was selected by an NREL team through a competitive solicitation. CTAC was formally announced on August 1st by U.S. Secretary of Energy Jennifer M. Granholm and U.S. Representative Marcy Kaptur at an event held at University of Toledo. We will give an overview of CTAC research directions along with their goals and activities. We can also discuss how CTAC relates to the National Renewable Energy Laboratory (NREL) and to the U.S. Manufacturing of Advanced Cadmium Telluride Photovoltaics Consortium (US-MAC). Visit our poster to find out who leads CTAC and how you can get involved.

costs↗
DOE OSTI2021

Etching with electron beam-generated plasmas: Selectivity versus ion energy in silicon-based films

In the ideal case, plasma-enhanced atomic layer etching enables the ability to not only remove one monolayer of material but also leave adjacent layers undamaged. This dual mandate requires fine control over the flux of species to ensure efficacy, while maintaining an often arduously low ion energy. Electron beam-generated plasmas are well-suited for etching at low ion energies as they are generally characterized by highly charged particle densities (10 10 –10 11 cm –3 ) and low electron temperatures (<1.0 eV), which provide the ability to deliver a large flux of ions whose energies are <5 eV. Raising the ion energy with substrate biasing thus enables process control over an energy range that extends down to values commensurate with the bond strength of most material systems. In this work, we discuss silicon nitride etching using pulsed, electron beam-generated plasmas produced in argon-SF6 backgrounds. We pay particular attention to the etch rates and selectivity versus oxidized silicon nitride and polycrystalline silicon as a function of ion energy from a few eV up to 50 eV. Here, we find the blanket etch rate of Si 3 N 4 to be in the range of 1 A/s, with selectivities (versus SiO 2 and poly-Si) greater than 10:1 when ion energies are below 30 eV.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗
DOE OSTI2021

Mechanisms for long carrier lifetime in Cd(Se)Te double heterostructures

II–VI semiconductors are used in numerous electro-optical applications. For example, CdTe-based solar technology is cost competitive with other electricity generation sources, yet there is still significant room to improve. Carrier lifetime has historically been well below the radiative recombination limit. Lifetimes reaching beyond 100 ns can significantly enhance performance and enable novel device structures. Here, double heterostructures (DHs) with passivated interfaces demonstrate lifetimes exceeding 1 µs, yet this appears only for CdSeTe and not for CdTe DHs. We compare the passivation mechanisms in CdTe and CdSeTe DHs. CdSeTe lifetimes on the order of 1 µs correspond to a combination of superior intragrain lifetime, extremely low grain boundary recombination and greater Te4+ interfacial presence compared to CdTe.

36 MATERIALS SCIENCE↗
DOE OSTI2020

Doping CdSexTe1-x/CdTe Graded Absorber Films with Arsenic for Thin-Film Photovoltaics

CdTe thin-film photovoltaics have demonstrated some of the lowest costs of electricity generation owing to its low material cost and ease of manufacturing. However, the full potential of polycrystalline CdTe photovoltaics can only be realized if the open-circuit voltage can be increased beyond 1 V Open-circuit voltage ~850-900 mV has been consistently observed for state-of-the-art polycrystalline CdTe solar cells. Open-circuit voltage of over 1V has been demonstrated for single crystal CdTe devices by doping with Group V elements. Therefore, this study is aimed at understanding behavior of polycrystalline CdTe devices with arsenic doping, its activation and process and performance optimization in order to overcome current voltage limitations in CdTe solar cells.

14 SOLAR ENERGY↗
DOE OSTI2024

Impacts of Non-Ideal Back Contact on Capacitance Measurements in CdTe Solar Cells

CdTe solar cells suffer from a non-ideal back contact which can strongly affect the equivalent circuit model and complicate capacitance measurements. Here, five different back contact materials are deposited on identical CdTe absorbers and their influence on capacitance measurements is characterized. A five-element equivalent circuit model is shown to represent a CdTe solar cell with a non-ideal back contact, and capacitance-frequency (C-f) measurements on each sample clearly show the influence of this contact. Capacitance-voltage (C-V) measurements on each sample show the influence of frequency on measured capacitance. In the AlGaOx/Au sample, temperature dependent C-fs show the back barrier height to be 240 meV, and ongoing measurements will give a comparison of back barrier heights for all samples. This study provides insight into the efficacy of various back contacts and highlights potential errors in the interpretation of capacitance measurements due to the presence of the back contact.

cadmium compounds↗
DOE OSTI2024

Characterization of n-Type Iodine-Doped and Indium-Doped CdTe/Cd-Se-Te Thin Films Fabricated by Close-Spaced Sublimation Epitaxy

In this study, n-type CdTe thin films, specifically iodine-doped CdTe (CdTe:I), indium-doped CdTe (CdTe:In), and indium-doped Cd-Se-Te (CST:In), were synthesized using close-spaced sublimation epitaxy (CSSE). Characterization techniques secondary ion mass spectrometry (SIMS), electron backscatter diffraction (EBSD), Hall-effect measurements, and time-resolved photoluminescence (TRPL) were employed to analyze the chemical, structural, and electronic properties of these materials. The results indicated epitaxial single crystal CSSE films grew on the single crystal substrates, with carrier density ranging from 10^14 - 10^16 cm -3 , and after post-annealing, the minority-carrier lifetimes reach near the radiative limit. Additionally, a preliminary exploration of homojunction structures with an n- type (CdTe:In /CST:In /CdTe:I) /CdTe:P /Cu /Mo configuration was performed. The best device performance was achieved with CdTe:I including CdS aiding in band alignment, resulting in a power conversion efficiency (..eta..) of 2.61% with open circuit voltage (Voc) of 850 mV, fill factor (FF) of 47.8%, and short-circuit current (Jsc) of 6.44 mA/cm 2 . The observed low Jsc and efficiency may be attributed to a buried junction and a poor interface, due to dopant interdiffusion. Consequently, further investigations focusing on interface optimization, diffusion blocking, and reduced recombination through passivation, are crucial to enhancing the efficiency of CSSE CdTe homojunction devices in the future.

cadmium compounds↗
DOE OSTI2025

Semiconducting Electrides Derived from Sodalite: A First-Principles Study

Electrides are ionic crystals, with electrons acting as anions occupying well-defined lattice sites. These exotic materials have attracted considerable attention in recent years for potential applications in catalysis, rechargeable batteries, and display technology. Among this class of materials, electride semiconductors can further expand the horizon of potential applications due to the presence of a band gap. However, there are only limited reports on semiconducting electrides, hindering the understanding of their physical and chemical properties. In recent work, we initiated an approach to derive potential electrides via selective removal of symmetric Wyckoff sites of anions from existing complex minerals. Herein, we present a follow-up effort to design semiconducting electrides from parental complex sodalites. Among four candidate compounds, we found that a cubic Ca 4 Al 6 O 12 structure with the I-43m space group symmetry exhibits perfect electron localization at the sodalite cages, with a narrow electronic band gap of 1.8 eV, making it suitable for use in photocatalysis. Analysis of the electronic structures reveals that a lower electronegativity of the surrounding cations drives greater electron localization and promotes the formation of an electride band near the Fermi level. Our work proposes an alternative approach for designing new semiconducting electrides under ambient conditions and offers guidelines for further experimental exploration.

36 MATERIALS SCIENCE↗
DOE OSTI2026

Heterogeneous Integration of Flipped Oxide Heterostructure Membranes for Nanoelectronics

Freestanding complex oxide membranes enable the release and transfer of epitaxial films, offering new design freedoms for next‐generation electronics. While the LaAlO 3 /SrTiO 3 (LAO/STO) heterostructure exhibits remarkable tunable conductivity at its interface, the active interface remains buried beneath the substrate, limiting access to this functionality. Here, we demonstrate how the LAO/STO heterostructure, in membrane form, can be flipped and precisely positioned on silicon and other platforms using polymer‐free micromanipulation. The transferred membranes preserve atomically smooth surfaces, high crystallinity, and key electronic properties. Through the 44‐nm insulating STO layer, ultra‐low‐voltage electron‐beam lithography (ULV‐EBL) writes conductive nanostructures at the now‐accessible STO/LAO interface, offering the potential to function as programmable local gates that modulate charge carriers in the underlying silicon. The platform establishes a general strategy for integrating complex oxide heterostructures with semiconductors, quantum materials, and flexible substrates, enabling new architectures for reprogrammable nanoelectronic devices.

36 MATERIALS SCIENCE↗
DOE OSTI2025

Epitaxy of Emerging Materials and Advanced Heterostructures for Microelectronics and Quantum Sciences

Abstract Epitaxy, a process to prepare crystalline materials in nanostructures and thin films, is the core technology for preparing high‐quality materials as a key enabler of next‐generation microelectronics and quantum information system. Progress in epitaxy has been expanding the choice of materials and their heterostructures beyond the combinations limited by materials compatibility. However, the improvement of material quality, physical implementation of materials with unique properties, and integration of incommensurate materials in an architecture have been the challenging issues. Emerging materials, including 2D materials and quantum materials, have opened opportunities to study epitaxy mechanisms and realize various functional devices. Acceleration of discovery and progress in epitaxy research should be accomplished by “understanding of epitaxy under various circumstances at multiple length scales” and “integration of experiments and models.” In the perspective, a basic summary of the status of epitaxially grown materials, the challenges in epitaxy research, and integration of modeling epitaxy and ultimate control of the epitaxy process with advanced characterization techniques are discussed.

Materials Science↗
DOE OSTI2025

Nb 2 O 5 Protection Layers for Hydrogen Evolution by p-InP Photocathodes in Acidic Electrolytes

Coatings of HfO 2 , Ta 2 O 5 , TiO 2 , and Nb 2 O 5 were evaluated as protection layers for p-InP photocathodes in aqueous acidic electrolytes. Each candidate protection layer was characterized based on interfacial conduction of photogenerated electrons, the thermodynamic and kinetic stability of the overlayer over the relevant potential and pH range for cathodic fuel-forming half-reactions, and inhibition of the primary anodic and/or chemical dissolution processes that limit electrode stability. The conduction of photogenerated electrons and inhibition of anodic oxidation was evaluated using V 3+ / 2+ in 5.0 M HCl(aq) as a one-electron redox couple with a potential close to that of hydrogen evolution in acidic media. Failure modes due to cathodic plating of metal, as well as anodic dissolution and chemical dissolution processes, were evaluated for photocathodes made from etched p-InP, platinized p-InP, and p-InP photoelectrodes that had been coated with the various oxide films and then platinized for use in photoelectrochemical hydrogen evolution in acidic aqueous electrolytes. Nb 2 O 5 best met all of the criteria, contrasting with TiO 2 , which is thermodynamically and kinetically unstable in acid over the potential range relevant for the hydrogen evolution and/or CO 2 reduction electrochemical half-reactions. Furthermore, these protocols should be useful for other materials and semiconductors to determine the effectiveness of protection layers for photocathodes.

Electrodes↗
DOE OSTI2025

Local Interface Effects Modulate Global Charge Order and Optical Properties of 1T–TaS2/1H–WSe2 Heterostructures

1T-TaS2 is a layered charge density wave (CDW) crystal exhibiting sharp phase transitions and associated resistance changes. These resistance steps could be exploited for information storage, underscoring the importance of controlling and tuning the CDW states. Given the importance of out-of-plane interactions in 1T-TaS2, modulating interlayer interactions by heterostructuring is a promising method for tailoring CDW phase transitions. In this work, we investigate the optical and electronic properties of heterostructures comprising 1T-TaS2 and monolayer 1H-WSe2. By systematically varying the thickness of 1T-TaS2 and its azimuthal alignment with 1H-WSe2, we find that intrinsic moiré strain and interfacial charge transfer introduce CDW disorder in 1T-TaS2 and modify the CDW ordering temperature. Furthermore, our studies reveal that the interlayer alignment impacts the exciton dynamics in 1H-WSe2, indicating that heterostructuring can concurrently tailor the electronic phases in 1T-TaS2 and the optical properties of 1H-WSe2. This work presents a promising approach for engineering the optoelectronic behavior of heterostructures that integrate CDW materials and semiconductors.

charge density wave↗
DOE OSTI2020

Numerical simulation of high-efficiency, scalable, all-back-contact Cd(Se,Te) solar cells

In this work, all-back-contact thin film photovoltaic devices in lattice back contact (LBC) configuration are studied by device simulation to set the requirements for achieving efficiency > 20% with lateral contact spacing > 50 µm. The numerical device model is first validated against published data for an LBC perovskite device and extended to predict the performance of Cd(Se,Te)-based polycrystalline devices. Recent advances in the electronic properties of Cd(Se,Te) films have made high efficiency LBC devices feasible with industrially-scalable contact dimensions. Constraints on bulk, interface, and contact properties are quantified and discussed

14 SOLAR ENERGY↗
DOE OSTI2020

Fully Transparent GaN Homojunction Tunnel Junction-Enabled Cascaded Blue LEDs.

A sidewall activation process was optimized for buried magnesium-doped p-GaN layers yielding a significant reduction in tunnel junction-enabled light emitting diode (LED) forward voltage. This buried activation enabled the realization of cascaded blue LEDs with fully transparent GaN homojunction tunnel junctions. The initial optimization of buried p-GaN activation was performed on PN junctions grown by metal organic chemical vapor deposition (MOCVD) buried under hybrid tunnel junctions grown by MOCVD and molecular beam epitaxy. Next the activation process was implemented in cascaded blue LEDs emitting at 450 nm, which were enabled by fully transparent GaN homojunction tunnel junctions. The tunnel junction-enabled multi-active region blue LEDs were grown monolithically by MOCVD. This work demonstrates a state-of-the-art tunnel junction-enabled cascaded LED utilizing homojunction tunnel junctions which do not contain any heterojunction interface.

42 ENGINEERING↗
DOE OSTI2022

Restored Passivation after Complete Removal of Front Poly-Si Between the Grid in Poly-Si/SiO2 Front/Back Cells

This work explores the use of wet chemical etching to completely remove the front poly-Si layer between grid lines of a front/back poly-Si/SiO2 passivated contact device. The purpose of the work is to provide excellent passivation under the metal grid, but to also maximize Jsc by eliminating optical absorption in the front poly-Si. We show that after a high temperature anneal to distribute carriers in the poly-Si/SiO2/c-Si interface all of the poly-Si can be removed selectively with TMAH, using the SiO2 as an etch-stop layer. The etched surface can be repassivated back to its original level with the addition of a SiNx/Al2O3 stack grown on the preserved tunnelling oxide layer followed by a short forming gas anneal. Using symmetric 100 - 200 nm intrinsically doped poly-Si/SiO2 on textured n-type wafer templates we show absolute device efficiency enhancement from 15% to 21% by increasing the Jsc by 12 mA/cm2 after removing the front poly-Si and repassivating while effectively preserving the Voc, and FF of the device. IQE values are similar to PERC devices in the short wavelength range.

etching↗
DOE OSTI2023

Controlled Dielectric Breakdown to Form Pinhole Passivating Contacts

This contribution explores an alternate route to forming pinhole-based poly-Si/dielectric/c-Si passivating contacts. The method utilizes controlled dielectric breakdown or electroforming to produce nanoscale pinholes in a thick (non-tunnelling) dielectric which, when annealed, allows dopant atoms to pass from doped poly-Si through the pinholes and into the c-Si wafer, forming conductive pathways. We show that the pinholes lose passivation after electroforming but can be repassivated with a forming gas anneal. N-type contacts show contact resistivities of ~20 mOhm-cm2, but p-type contacts are ~100 mOhm-cm2. Devices show a distinct kink in the J-V curve indicative of a barrier to transport. The method can be expanded to optimized dielectric passivation stacks (not just thin, single layers) and can be formed in parallel over the faces of the wafer in selected areas (pinholes only under the grid lines).

CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SU↗
DOE OSTI2023

Low-efficiency-droop c -plane InGaN/GaN light-emitting diodes through the use of thick single quantum wells and doped barriers

Efficiency droop at high current densities is a problem for InGaN-based light-emitting diodes (LEDs), especially for conventional c-plane devices. The large internal electric fields in c-plane quantum wells (QWs) lead to an increase in the active region carrier density (n), causing the electrical efficiency droop onset to occur at low current densities. Here, we present an approach to reduce the internal electric fields (Eint) in c-plane QWs by placing doped p-type and n-type GaN barriers close to the QW. The reduced Eint also allows a thick QW active region design, which helps to lower n to further reduce the droop. The concept of using doped barriers to control Eint is explained using theory and device simulations. Following that, multiple series of thick single QW (SQW) LEDs were grown and characterized. Key parameters in the epitaxial design such as the doping levels and the relative position of the doped barriers were systematically studied and optimized. In conclusion, by using optimized doped barriers and a thick SQW, c-plane LEDs with a low-efficiency droop of 14% at 300 A/cm2 [with respect to the peak external quantum efficiency (EQE)] and a high peak EQE of 49% were demonstrated.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗