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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 235 records · Page 13
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

Stabilization of magnetic bubbles in [Ni/Co]n multilayers on an oxygen-reconstructed Nb(110) surface via an ultra-thin Cu interlayer

Magnetic thin films hosting topological spin textures, such as magnetic skyrmions, hold high potential for breakthroughs in the field of spintronics, due to good scalability and energy efficiency. Novel computational architectures such as memory-in-logic devices rely on material platforms able to host those topological spin textures. Furthermore, recently proposed designs of novel quantum information technologies are based on heterostructures where topological spin textures are in direct proximity to a superconducting layer. Here, we demonstrate the stabilization of out-of-plane magnetic bubbles in highly ordered [Ni/Co]n multilayers on a Nb(110) single crystal. This is achieved without the need for the removal of the well-known Nb(110)-oxide surface reconstruction, due to the introduction of an ultra-thin Cu interlayer in between the Nb substrate and the magnetic multilayer. The Cu interlayer generates a well-ordered hexagonal surface, which is key for the epitaxial growth of the [Ni/Co]n multilayers hosting the desired out-of-plane anisotropy. The magnetic ground state of the prepared material stacks is directly imaged via spin-polarized low-energy electron microscopy, revealing the presence of magnetic bubble domains with lateral sizes as small as 450 nm.

Dibajeh, Ahmad↗
DOE OSTI2020

Topological spin texture in Janus monolayers of the chromium trihalides Cr(I, X ) 3

Topological magnetic states are promising for ultradense memory and logic devices. Recent progress in two-dimensional magnets encourages the idea to realize topological states, such as skyrmions and merons, in freestanding monolayers. However, monolayers such as CrI 3 lack Dzyaloshinskii-Moriya interactions (DMIs) and thus do not naturally exhibit skyrmions/merons but rather a ferromagnetic state. Here we propose the fabrication of Cr(I, $X)_3$ Janus monolayers, in which the Cr atoms are covalently bonded to the underlying I ions and top-layer Br or Cl atoms. By performing first-principles calculations and Monte Carlo simulations, we identify strong enough DMIs, which leads to not only helical cycloid phases, but also to topologically nontrivial states, such as the intrinsic domain wall skyrmions in Cr(I, Br) 3 and the magnetic-field-induced bimerons in Cr(I, Cl) 3 . Finally, microscopic origins of such spin textures are revealed as well.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2021

Spontaneous Valley Polarization of Itinerant Electrons

Memory or transistor devices based on an electron’s spin rather than its charge degree of freedom offer certain distinct advantages and comprise a cornerstone of spintronics. Recent years have witnessed the emergence of a new field, valleytronics, which seeks to exploit an electron’s valley index rather than its spin. An important component in this quest would be the ability to control the valley index in a convenient fashion. Here we show that the valley polarization can be switched from zero to 1 by a small reduction in density, simply tuned by a gate bias, in a two-dimensional electron system. This phenomenon, which is akin to Bloch spin ferromagnetism, arises fundamentally as a result of electron-electron interaction in an itinerant, dilute electron system. Essentially, the kinetic energy favors an equal distribution of electrons over the available valleys, whereas the interaction between electrons prefers single-valley occupancy below a critical density. The gate-bias-tuned transition we observe is accompanied by a sudden, twofold change in sample resistance, making the phenomenon of interest for potential valleytronic transistor device applications. Finally, our observation constitutes a quintessential demonstration of valleytronics in a very simple experiment.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2022

Ferroelectric HfO 2 and the importance of strain

Ferroelectric oxides based on HfO 2 show tremendous promise for the next generation of memory and logic devices. The ferroelectric polymorph is one of several that can be derived from the high symmetry cubic fluorite structure of HfO 2 . A single grain of HfO 2 may consist of a coherent mixture of multiple orientational and translational variants of different polymorphs. Here, we use symmetry-adapted strain-order parameters to elucidate the relationship between the different HfO 2 polymorphs and their symmetrically equivalent variants. We use first-principles electronic structure methods to identify minimum energy pathways and map them in subspaces of the symmetry-adapted strain order parameters. We next investigate the atomic structure of domain boundaries that separate coexisting variants of ferroelectric HfO 2 . Further, we rely on Gibbsian excess quantities and a precise specification of mechanical boundary conditions to describe the thermodynamic properties of domain boundaries. Our first-principles calculations show that the O and Hf shuffle arrangement within a domain boundary is closely related to the intermediate shuffle patterns of the homogeneous pathways between ferroelectric variants. Furthermore, the preferred structure within a boundary is very sensitive to local strain constraints imposed by the adjacent ferroelectric variants, leading to highly anisotropic domain boundary energies.

36 MATERIALS SCIENCE↗
DOE OSTI2024

Modeling the Impacts of Material Properties on Oscillatory Neuron Behavior

In this study, neuromorphic computing, which mimics the functions of biological brains, offers improvements in both latency and energy efficiency over typical von Neumann computing architectures. Spiking neural networks can be especially power-efficient because they encode information temporally and can use more sparse electrical inputs. Here, we study the design of volatile memristors (variable resistors with memory) for neuronal devices, with particular consideration toward the feasibility of all-on-chip oscillation using built-in capacitance. We use circuit simulations to model the behavior of oscillator neurons with a range of realistic material properties. We find that energy inputs increase with insulating-phase resistivity, thermal conductivity, and device aspect ratio. However, we also find that the minimum capacitance needed for oscillation decreases with increasing insulating-phase resistivity, which opposes the constraints for power efficiency. Based on published data on NbO 2 , VO 2 , and EuNiO 3 , we find that existing materials can be engineered for all-on-chip spiking using their parasitic capacitance.

36 MATERIALS SCIENCE↗
DOE OSTI2025

Large enhancement of ferroelectric properties of perovskite oxides via nitrogen incorporation

Perovskite oxides have a wide variety of physical properties that make them promising candidates for versatile technological applications including nonvolatile memory and logic devices. Chemical tuning of those properties has been achieved, to the greatest extent, by cation-site substitution, while anion substitution is much less explored due to the difficulty in synthesizing high-quality, mixed-anion compounds. Here, nitrogen-incorporated BaTiO3 thin films have been synthesized by reactive pulsed-laser deposition in a nitrogen growth atmosphere. The enhanced hybridization between titanium and nitrogen induces a large ferroelectric polarization of 70 μC/cm2 and high Curie temperature of ~1213 K, which are ~2.8 times larger and ~810 K higher than in bulk BaTiO3, respectively. These results suggest great potential for anion-substituted perovskite oxides in producing emergent functionalities and device applications.

Wang, Tao↗
DOE OSTI2020

System and method for controlling an energy beam of an additive manufacturing system

An additive manufacturing system includes an energy beam generator that generates an energy beam to melt and fuse raw materials for a part and a computing device that controls operation of the energy beam generator. The computing device includes a memory element that stores or access a three-dimensional model of the part, and a processing element that receives at least a portion of the three-dimensional model and controls a parameter of the energy beam generator according to a gradient function so as to apply a variable amount of heat to the raw material that forms an overhang on the part.

42 ENGINEERING↗
DOE OSTI2023

Classification based anomaly detection

An example device includes processing circuitry and a memory. The memory includes instructions that cause the device to perform various functions. The functions include receiving datastreams from a plurality of sensors of a high performance computing system, classifying each datastream of the each sensor to one of a plurality of datastream models, selecting an anomaly detection algorithm from a plurality of anomaly detection algorithms for each datastream, determining parameters of the each anomaly detection algorithm, determining an anomaly threshold for each datastream, and generating an indication that the sensor associated with the datastream is acting anomalously.

Serebryakov, Sergey↗
DOE OSTI2025

IRIS-MEMFLOW: Data Flow-Enabled Portable Memory Orchestration in IRIS Runtime for Diverse Heterogeneity

Task-based programming models and execution paradigms provide a means to decompose a computation by expressing it as a graph in which each node represents a specific computation operating on memory objects and the edges define the dependencies in the execution flow. In this execution model, independent nodes in the graph can be executed concurrently in different computing devices, making it suitable for heterogeneous systems in which computing devices with different architectures coexist. However, careful memory orchestration across heterogeneous devices is needed because copies of the same memory object may reside in multiple devices during execution. Manually ensuring such an orchestration is quite challenging. Not only must an application developer guard against race conditions, but they must also optimize data movement between the host and devices because unnecessary data movement significantly impacts performance. To mitigate these challenges, we enhance the IRIS heterogeneous runtime and introduce IRIS-MEMFLOW–a data flow–enabled portable memory abstraction for seamlessly orchestrating memory in diverse heterogeneous computing environments. By using data-flow analysis, IRIS-MEMFLOW guards against race conditions while multiple heterogeneous devices access memory objects. IRIS-MEMFLOW also optimizes data movement between the host and devices without manual intervention. As a result, IRIS provides improved programming productivity, performance, and portability for multidevice heterogeneous executions in high-performance computing and cloud systems that run diverse architectures from different vendors. The efficacy of IRIS-MEMFLOW is evaluated through experiments that show its capability in terms of programming productivity, multidevice heterogeneity, portability, and low overhead versus the state of the art.

Monil, M. A. H. [ORNL] (ORCID:0000000334194037)↗
DOE OSTI2021

A domain wall-magnetic tunnel junction artificial synapse with notched geometry for accurate and efficient training of deep neural networks

Inspired by the parallelism and efficiency of the brain, several candidates for artificial synapse devices have been developed for neuromorphic computing, yet a nonlinear and asymmetric synaptic response curve precludes their use for backpropagation, the foundation of modern supervised learning. Spintronic devices—which benefit from high endurance, low power consumption, low latency, and CMOS compatibility—are a promising technology for memory, and domain-wall magnetic tunnel junction (DW-MTJ) devices have been shown to implement synaptic functions such as long-term potentiation and spike-timing dependent plasticity. In this work, we propose a notched DW-MTJ synapse as a candidate for supervised learning. Using micromagnetic simulations at room temperature, we show that notched synapses ensure the non-volatility of the synaptic weight and allow for highly linear, symmetric, and reproducible weight updates using either spin transfer torque (STT) or spin–orbit torque (SOT) mechanisms of DW propagation. We use lookup tables constructed from micromagnetics simulations to model the training of neural networks built with DW-MTJ synapses on both the MNIST and Fashion-MNIST image classification tasks. Accounting for thermal noise and realistic process variations, the DW-MTJ devices achieve classification accuracy close to ideal floating-point updates using both STT and SOT devices at room temperature and at 400 K. Our work establishes the basis for a magnetic artificial synapse that can eventually lead to hardware neural networks with fully spintronic matrix operations implementing machine learning.

42 ENGINEERING↗
DOE OSTI2021

Superconducting neural networks with disordered Josephson junction array synaptic networks and leaky integrate-and-fire loop neurons

Fully coupled randomly disordered recurrent superconducting networks with additional open-ended channels for inputs and outputs are considered the basis to introduce a new architecture to neuromorphic computing in this work. Various building blocks of such a network are designed around disordered array synaptic networks using superconducting devices and circuits as an example, while emphasizing that a similar architectural approach may be compatible with several other materials and devices. A multiply coupled (interconnected) disordered array of superconducting loops containing Josephson junctions [equivalent to superconducting quantum interference devices (SQUIDs)] forms the aforementioned collective synaptic network that forms a fully recurrent network together with compatible neuron-like elements and feedback loops, enabling unsupervised learning. This approach aims to take advantage of superior power efficiency, propagation speed, and synchronizability of a small world or a random network over an ordered/regular network. Additionally, it offers a significant factor of increase in scalability. Here, a compatible leaky integrate-and-fire neuron made of superconducting loops with Josephson junctions is presented, along with circuit components for feedback loops as needed to complete the recurrent network. Several of these individual disordered array neural networks can further be coupled together in a similarly disordered way to form a hierarchical architecture of recurrent neural networks that is often suggested as similar to a biological brain.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2022

Promoting prefetched data from a cache memory to registers in a processor

An electronic device includes a processor having a cache memory, a plurality of physical registers, and a promotion logic functional block. The promotion logic functional block promotes prefetched data from a portion of a cache block in the cache memory into a given physical register, the promoting including storing the prefetched data in the given physical register. Upon encountering a load micro-operation that loads data from the portion of the cache block into a destination physical register, the promotion logic functional block sets the processor so that the prefetched data stored in the given physical register is provided to micro-operations that depend on the load micro-operation.

Kotra, Jagadish↗
DOE OSTI2023

Late Breaking Results: COPPER: Computation Obfuscation by Producing Permutations for Encoding Randomly

Deployed embedded devices face security risks due to increased ease of physical access to the devices by unauthorized users. Capable adversaries can intercept a device to recover the data in memory, including results of performed sensitive computations. Device owners require data confidentiality on their physically insecure devices. To satisfy this goal we implement a novel method, COPPER (Computation Obfuscation by Producing Permutations for Encoding Randomly), to create data which never exists on the device digitally in plaintext format and which is subsequently used for computation. In this paper we utilize COPPER to calculate a moving average computation on encoded data.

embedded systems↗
DOE OSTI2024

When in-memory computing meets spiking neural networks—A perspective on device-circuit-system-and-algorithm co-design

This review explores the intersection of bio-plausible artificial intelligence in the form of spiking neural networks (SNNs) with the analog in-memory computing (IMC) domain, highlighting their collective potential for low-power edge computing environments. Through detailed investigation at the device, circuit, and system levels, we highlight the pivotal synergies between SNNs and IMC architectures. Additionally, we emphasize the critical need for comprehensive system-level analyses, considering the inter-dependencies among algorithms, devices, circuit, and system parameters, crucial for optimal performance. An in-depth analysis leads to the identification of key system-level bottlenecks arising from device limitations, which can be addressed using SNN-specific algorithm–hardware co-design techniques. This review underscores the imperative for holistic device to system design-space co-exploration, highlighting the critical aspects of hardware and algorithm research endeavors for low-power neuromorphic solutions.

Physics↗
DOE OSTI2020

Diagnosing and Destroying Non-Markovian Noise

Nearly every protocol used to analyze the performance of quantum information processors is based on an assumption that the errors experienced by the device during logical operations are constant in time and are insensitive to external contexts. This assumption is pervasive, rarely stated, and almost always wrong. Quantum devices that do behave this way are termed "Markovian:' but nearly every system we have ever probed has displayed drift or crosstalk or memory effects they are all non-Markovian. Strong non-Markovianity introduces spurious effects in characterization protocols and violates assumptions of the fault-tolerance threshold theorems. This SAND report details a three year laboratory-directed research and development (LDRD) project entitled, "Diagnosing and Destroying non-Markovian Noise in Quantum Information Processors." This program was initiated to build tools to study non-Markovian dynamics and quantum systems and develop robust methodologies for eliminating it. The program achieved a number of notable successes, including the first statistically rigorous protocol for identifying and characterizing drift in quantum systems, a formalism for modeling memory effects in quantum devices, and the successful suppression of drift in a Sandia trapped-ion quantum processor.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

Impacts of noise and structure on quantum information encoded in a quantum memory

As larger, higher-quality quantum devices are built and demonstrated in quantum information applications, such as quantum computation and quantum communication, the need for high-quality quantum memories to store quantum states becomes ever more pressing. Future quantum devices likely will use a variety of physical hardware, some being used primarily for processing of quantum information and others for storage. Here we study the correlation of the structure of quantum information with physical noise models of various possible quantum memory implementations. Through numerical simulation of different noise models and approximate analytical formulas applied to a variety of interesting quantum states, we provide comparisons between quantum hardware with different structure, including both qubit- and qudit-based quantum memories. Our findings point to simple, experimentally relevant formulas for the relative lifetimes of quantum information in different quantum memories and have relevance to the design of hybrid quantum devices.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2023

Hybrid stochastic synapses enabled by scaled ferroelectric field-effect transistors

Achieving brain-like density and performance in neuromorphic computers necessitates scaling down the size of nanodevices emulating neuro-synaptic functionalities. However, scaling nanodevices results in reduction of programming resolution and emergence of stochastic non-idealities. While prior work has mainly focused on binary transitions, in this work, we leverage the stochastic switching of a three-state ferroelectric field-effect transistor to implement a long-term and short-term two-tier stochastic synaptic memory with a single device. Experimental measurements are performed on a scaled 28 nm high-k metal gate technology-based device to develop a probabilistic model of the hybrid stochastic synapse. In addition to the advantage of ultra-low programming energies afforded by scaling, our hardware–algorithm co-design analysis reveals the efficacy of the two-tier memory in comparison to binary stochastic synapses in on-chip learning tasks—paving the way for algorithms exploiting multi-state devices with probabilistic transitions beyond deterministic ones.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2021

Energy-efficient Mott activation neuron for full-hardware implementation of neural networks

To circumvent the von Neumann bottleneck, substantial progress has been made towards in-memory computing with synaptic devices. However, compact nanodevices implementing non-linear activation functions are required for efficient full-hardware implementation of deep neural networks. Here, in this work, we present an energy-efficient and compact Mott activation neuron based on vanadium dioxide and its successful integration with a conductive bridge random access memory (CBRAM) crossbar array in hardware. The Mott activation neuron implements the rectified linear unit function in the analogue domain. The neuron devices consume substantially less energy and occupy two orders of magnitude smaller area than those of analogue complementary metal–oxide semiconductor implementations. The LeNet-5 network with Mott activation neurons achieves 98.38% accuracy on the MNIST dataset, close to the ideal software accuracy. We perform large-scale image edge detection using the Mott activation neurons integrated with a CBRAM crossbar array. Our findings provide a solution towards large-scale, highly parallel and energy-efficient in-memory computing systems for neural networks.

electrical and electronic engineering↗