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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 235 records · Page 13
All sourcesNASA NTRSDOE OSTI
NASA NTRS1992

Ring-array processor distribution topology for optical interconnects

The existing linear and rectangular processor distribution topologies for optical interconnects, although promising in many respects, cannot solve problems such as clock skews, the lack of supporting elements for efficient optical implementation, etc. The use of a ring-array processor distribution topology, however, can overcome these problems. Here, a study of the ring-array topology is conducted with an aim of implementing various fast clock rate, high-performance, compact optical networks for digital electronic multiprocessor computers. Practical design issues are addressed. Some proof-of-principle experimental results are included.

Li, Yao↗
NASA NTRS1992

High performance interconnection between high data rate networks

The bridge/gateway system needed to interconnect a wide range of computer networks to support a wide range of user quality-of-service requirements is discussed. The bridge/gateway must handle a wide range of message types including synchronous and asynchronous traffic, large, bursty messages, short, self-contained messages, time critical messages, etc. It is shown that messages can be classified into three basic classes, synchronous and large and small asynchronous messages. The first two require call setup so that packet identification, buffer handling, etc. can be supported in the bridge/gateway. Identification enables resequences in packet size. The third class is for messages which do not require call setup. Resequencing hardware based to handle two types of resequencing problems is presented. The first is for a virtual parallel circuit which can scramble channel bytes. The second system is effective in handling both synchronous and asynchronous traffic between networks with highly differing packet sizes and data rates. The two other major needs for the bridge/gateway are congestion and error control. A dynamic, lossless congestion control scheme which can easily support effective error correction is presented. Results indicate that the congestion control scheme provides close to optimal capacity under congested conditions. Under conditions where error may develop due to intervening networks which are not lossless, intermediate error recovery and correction takes 1/3 less time than equivalent end-to-end error correction under similar conditions.

Foudriat, E. C.↗
NASA NTRS1992

On the use of ANN interconnection weights in optimal structural design

The present paper describes the use of interconnection weights of a multilayer, feedforward network, to extract information pertinent to the mapping space that the network is assumed to represent. In particular, these weights can be used to determine an appropriate network architecture, and an adequate number of training patterns (input-output pairs) have been used for network training. The weight analysis also provides an approach to assess the influence of each input parameter on a selected output component. The paper shows the significance of this information in decomposition driven optimal design.

Hajela, P.↗
NASA NTRS1992

A continuum model for interconnected lattice trusses

A continuum model for interconnected lattice trusses based on the 1D Timoshenko beam approximation is developed using the NASA-LRC Phase Zero Evolutionary Model. The continuum model dynamics is presented in the canonical wave-equation form in a Hilbert space.

Balakrishnan, A. V.↗
NASA NTRS1993

Dissipative control of energy flow in interconnected systems

Dissipative energy flow controllers are designed for interconnected modal subsystems. Active feedback controllers for vibration suppression are then viewed as either an additional subsystem or a dissipative coupling. These controllers, which are designed by the LQG positive real control approach, maximize energy flow from a specified modal subsystem.

Kishimoto, Y.↗
NASA NTRS1992

Efficient hierarchical interconnection for multiprocessor systems

The authors present a novel approach to the design of a class of hierarchical interconnection networks for multiprocessor systems. This approach, based on an architecture providing separate networks for each level, gives a general and flexible way to construct efficient hierarchical networks. The performance and cost-effectiveness of the resulting networks are analyzed and compared in detail, using both unbuffered and buffered network models. It is shown that, if the design parameters are determined based on the degree of locality, the cost-effectiveness of a hierarchical network can be significantly improved. In addition, the authors investigate how to construct a cost-effectiveness hierarchical network by determining appropriate design parameters. Two associated algorithms are developed for this purpose.

Wei, Sizheng↗
NASA NTRS1995

Efficient modeling of interconnects and capacitive discontinuities in high-speed digital circuits

Modeling of interconnects and associated discontinuities with the recent advances high-speed digital circuits has gained a considerable interest over the last decade although the theoretical bases for analyzing these structures were well-established as early as the 1960s. Ongoing research at the present time is focused on devising methods which can be applied to more general geometries than the ones considered in earlier days and, at the same time, improving the computational efficiency and accuracy of these methods. In this thesis, numerically efficient methods to compute the transmission line parameters of a multiconductor system and the equivalent capacitances of various strip discontinuities are presented based on the quasi-static approximation. The presented techniques are applicable to conductors embedded in an arbitrary number of dielectric layers with two possible locations of ground planes at the top and bottom of the dielectric layers. The cross-sections of conductors can be arbitrary as long as they can be described with polygons. An integral equation approach in conjunction with the collocation method is used in the presented methods. A closed-form Green's function is derived based on weighted real images thus avoiding nested infinite summations in the exact Green's function; therefore, this closed-form Green's function is numerically more efficient than the exact Green's function. All elements associated with the moment matrix are computed using the closed-form formulas. Various numerical examples are considered to verify the presented methods, and a comparison of the computed results with other published results showed good agreement.

Oh, K. S.↗
NASA NTRS1995

Optical Interconnection Via Computer-Generated Holograms

Method of free-space optical interconnection developed for data-processing applications like parallel optical computing, neural-network computing, and switching in optical communication networks. In method, multiple optical connections between multiple sources of light in one array and multiple photodetectors in another array made via computer-generated holograms in electrically addressed spatial light modulators (ESLMs). Offers potential advantages of massive parallelism, high space-bandwidth product, high time-bandwidth product, low power consumption, low cross talk, and low time skew. Also offers advantage of programmability with flexibility of reconfiguration, including variation of strengths of optical connections in real time.

Liu, Hua-Kuang↗
NASA NTRS1996

Stackable Electronic Computer Modules And Interconnections

Design concept for multiprocessor computer system calls for digital electronic processing circuits of various functionalities contained within identically shaped and sized regular polygonal modules interconnected and stacked by use of rings around edges. Rings contain wide-band bus circuits configured to provide connections to adjacent modules in same layer of stack and/or to modules in different layers. Provides flexibility of configuration to implement any of large variety of designs.

Bolotin, Gary S.↗
NASA NTRS1999

Asymptotic Stability of Interconnected Passive Non-Linear Systems

This paper addresses the problem of stabilization of a class of internally passive non-linear time-invariant dynamic systems. A class of non-linear marginally strictly passive (MSP) systems is defined, which is less restrictive than input-strictly passive systems. It is shown that the interconnection of a non-linear passive system and a non-linear MSP system is globally asymptotically stable. The result generalizes and weakens the conditions of the passivity theorem, which requires one of the systems to be input-strictly passive. In the case of linear time-invariant systems, it is shown that the MSP property is equivalent to the marginally strictly positive real (MSPR) property, which is much simpler to check.

Isidori, A.↗
NASA NTRS1997

An Adaptive Method for Reducing Clock Skew in an Accumulative Z-Axis Interconnect System

This paper will present several methods for adjusting clock skew variations that occur in a n accumulative z-axis interconnect system. In such a system, delay between modules in a function of their distance from one another. Clock distribution in a high-speed system, where clock skew must be kept to a minimum, becomes more challenging when module order is variable before design.

Bolotin, Gary↗
NASA NTRS2001

Novel Vertical Interconnects With 180 Degree Phase Shift for Amplifiers, Filters, and Integrated Antennas

In this paper, novel low loss, wide-band coplanar stripline technology for RF/microwave integrated circuits is demonstrated on high resistivity silicon wafer. In particular, the fabrication process for the deposition of spin-on-glass (SOG) as a dielectric layer, the etching of microvias for the vertical interconnects, the design methodology for the multiport circuits and their measured/simulated characteristics are graphically illustrated. The study shows that circuits with very low loss, large bandwidth and compact size are feasible using this technology. This multilayer planar technology has potential to significantly enhance RF/microwave IC performance when combined with semiconductor devices and microelectromechanical systems (MEMS).

Goverdhanam, Kavita↗
NASA NTRS2000

Implementation of Self-Align Local Poly Interconnection on 0.25 Micron Flash Memory

For ETOX Flash technology. the self-aligned source module plays a critical role in minimizing cell size. For advanced Flash technology using the shallow-trench isolation (STI) scheme, however, it is difficult to form a stable source line. The Flash process in this experiment features an ETOX structure and with SIN spacer. Poly-Si (implanted poly) is used as the local interconnection material connecting the source line and was successfully implemented in the ETOX flash array in this paper.

C H Lee↗
NASA NTRS2005

Hot Chips and Hot Interconnects for High End Computing Systems

I will discuss several processors: 1. The Cray proprietary processor used in the Cray X1; 2. The IBM Power 3 and Power 4 used in an IBM SP 3 and IBM SP 4 systems; 3. The Intel Itanium and Xeon, used in the SGI Altix systems and clusters respectively; 4. IBM System-on-a-Chip used in IBM BlueGene/L; 5. HP Alpha EV68 processor used in DOE ASCI Q cluster; 6. SPARC64 V processor, which is used in the Fujitsu PRIMEPOWER HPC2500; 7. An NEC proprietary processor, which is used in NEC SX-6/7; 8. Power 4+ processor, which is used in Hitachi SR11000; 9. NEC proprietary processor, which is used in Earth Simulator. The IBM POWER5 and Red Storm Computing Systems will also be discussed. The architectures of these processors will first be presented, followed by interconnection networks and a description of high-end computer systems based on these processors and networks. The performance of various hardware/programming model combinations will then be compared, based on latest NAS Parallel Benchmark results (MPI, OpenMP/HPF and hybrid (MPI + OpenMP). The tutorial will conclude with a discussion of general trends in the field of high performance computing, (quantum computing, DNA computing, cellular engineering, and neural networks).

Saini, Subhash↗
NASA NTRS2004

Ceramic Interconnects with Low Sintering Temperature

Ceramic interconnects for use in solid oxide he1 cells are expected to operate between 900 to approximately 1000 C, sinter below 1400 C to allow co-firing and meet a number thermal mechanical requirements. The pervoskite type (ABO3) lanthanum chromite based materials have emerged as a leading candidate that will meet these criteria by varying the composition on the A and B sites. A need therefore exists to determine this material's temperature dependent electrical and mechanical properties with respect to these site substitutions. In this investigation oxide powders were prepared by the glycine-nitrate process. Ionic substitutions were carried out on A sites with Ca or Sr, and B sites with Co and Al, respectively. Only stoichiometric compositions were considered for the sake of stability. The powders and their ability to sinter were investigated by XRD, SEM, dilatometry and density measurements. The sintered materials were further examined by SEM, thermal expansion and electric conductivity measurements in order to elucidate the resulting microstructure, electrical and mechanical properties. In addition quantum mechanical calculations were performed to obtain insight into the effects of these dopants on the materials electronic band structure and lattice parameter.

Zhong, Zhi-Min↗
NASA NTRS2003

Using SPEEDES to simulate the blue gene interconnect network

JPL and the Center for Advanced Computer Architecture (CACR) is conducting application and simulation analyses of BG/L in order to establish a range of effectiveness for the Blue Gene/L MPP architecture in performing important classes of computations and to determine the design sensitivity of the global interconnect network in support of real world ASCI application execution.

SPEEDES BlueGene/L BG/L system-on-a-chip↗
NASA NTRS2006

Carbon Nanotube Interconnect

Method and system for fabricating an electrical interconnect capable of supporting very high current densities ( 10(exp 6)-10(exp 10) Amps/sq cm), using an array of one or more carbon nanotubes (CNTs). The CNT array is grown in a selected spaced apart pattern, preferably with multi-wall CNTs, and a selected insulating material, such as SiOw, or SiuNv is deposited using CVD to encapsulate each CNT in the array. An exposed surface of the insulating material is planarized to provide one or more exposed electrical contacts for one or more CNTs.

Li, Jun↗