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At least 217 records · Page 12

Low-Cutoff, High-Pass Digital Filtering of Neural Signals

The figure depicts the major functional blocks of a system, now undergoing development, for conditioning neural signals acquired by electrodes implanted in a brain. The overall functions to be performed by this system can be summarized as preamplification, multiplexing, digitization, and high-pass filtering. Other systems under development for recording neural signals typically contain resistor-capacitor analog low-pass filters characterized by cutoff frequencies in the vicinity of 100 Hz. In the application for which this system is being developed, there is a requirement for a cutoff frequency of 5 Hz. Because the resistors needed to obtain such a low cutoff frequency would be impractically large, it was decided to perform low-pass filtering by use of digital rather than analog circuitry. In addition, it was decided to timemultiplex the digitized signals from the multiple input channels into a single stream of data in a single output channel. The signal in each input channel is first processed by a preamplifier having a voltage gain of approximately 50. Embedded in each preamplifier is a low-pass anti-aliasing filter having a cutoff frequency of approximately 10 kHz. The anti-aliasing filters make it possible to couple the outputs of the preamplifiers to the input ports of a multiplexer. The output of the multiplexer is a single stream of time-multiplexed samples of analog signals. This stream is processed by a main differential amplifier, the output of which is sent to an analog-to-digital converter (ADC). The output of the ADC is sent to a digital signal processor (DSP).

Mojarradi,Mohammad↗

Positively Verifying Mating of Previously Unverifiable Flight Connectors

Current practice is to uniquely key the connectors, which, when mated, could not be verified by ground tests such as those used in explosive or non-explosive initiators and pyro valves. However, this practice does not assure 100-percent correct mating. This problem could be overcome by the following approach. Errors in mating of interchangeable connectors can result in degraded or failed space mission. Mating of all flight connectors considered not verifiable via ground tests can be verified electrically by the following approach. It requires two additional wires going through the connector of interest, a few resistors, and a voltage source. The test-point voltage V(sub tp) when the connector is not mated will be the same as the input voltage, which gets attenuated by the resistor R(sub 1) when the female (F) and male (M) connectors are mated correctly and properly. The voltage at the test point will be a function of R(sub 1) and R(sub 2). Monitoring of the test point could be done on ground support equipment (GSE) only, or it can be a telemetry point. For implementation on multiple connector pairs, a different value for R(sub 1) or R(sub 2) or both can be selected for each pair of connectors that would result in a unique test point voltage for each connector pair. Each test point voltage is unique, and correct test point voltage is read only when the correct pair is mated correctly together. Thus, this design approach can be used to verify positively the correct mating of the connector pairs. This design approach can be applied to any number of connectors on the flight vehicle.

Pandipati R. K. Chetty↗

Simple Cell Balance Circuit

A method has been developed for continuous cell voltage balancing for rechargeable batteries (e.g. lithium ion batteries). A resistor divider chain is provided that generates a set of voltages representing the ideal cell voltage (the voltage of each cell should be as if the cells were perfectly balanced). An operational amplifier circuit with an added current buffer stage generates the ideal voltage with a very high degree of accuracy, using the concept of negative feedback. The ideal voltages are each connected to the corresponding cell through a current- limiting resistance. Over time, having the cell connected to the ideal voltage provides a balancing current that moves the cell voltage very close to that ideal level. In effect, it adjusts the current of each cell during charging, discharging, and standby periods to force the cell voltages to be equal to the ideal voltages generated by the resistor divider. The device also includes solid-state switches that disconnect the circuit from the battery so that it will not discharge the battery during storage. This solution requires relatively few parts and is, therefore, of lower cost and of increased reliability due to the fewer failure modes. Additionally, this design uses very little power. A preliminary model predicts a power usage of 0.18 W for an 8-cell battery. This approach is applicable to a wide range of battery capacities and voltages.

Johnson, Steven D.↗

Progress Toward Accurate Measurements of Power Consumptions of DBD Plasma Actuators

The accurate measurement of power consumption by Dielectric Barrier Discharge (DBD) plasma actuators is a challenge due to the characteristics of the actuator current signal. Micro-discharges generate high-amplitude, high-frequency current spike transients superimposed on a low-amplitude, low-frequency current. We have used a high-speed digital oscilloscope to measure the actuator power consumption using the Shunt Resistor method and the Monitor Capacitor method. The measurements were performed simultaneously and compared to each other in a time-accurate manner. It was found that low signal-to-noise ratios of the oscilloscopes used, in combination with the high dynamic range of the current spikes, make the Shunt Resistor method inaccurate. An innovative, nonlinear signal compression circuit was applied to the actuator current signal and yielded excellent agreement between the two methods. The paper describes the issues and challenges associated with performing accurate power measurements. It provides insights into the two methods including new insight into the Lissajous curve of the Monitor Capacitor method. Extension to a broad range of parameters and further development of the compression hardware will be performed in future work.

Ashpis, David E.↗

Stacked Transformer for Driver Gain and Receive Signal Splitting

In a high-speed signal transmission system that uses transformer coupling, there is a need to provide increased transmitted signal strength without adding active components. This invention uses additional transformers to achieve the needed gain. The prior art uses stronger drivers (which require an IC redesign and a higher power supply voltage), or the addition of another active component (which can decrease reliability, increase power consumption, reduce the beneficial effect of serializer/deserializer preemphasis or deemphasis, and/or interfere with fault containment mechanisms), or uses a different transformer winding ratio (which requires redesign of the transformer and may not be feasible with high-speed signals that require a 1:1 winding ratio). This invention achieves the required gain by connecting the secondaries of multiple transformers in series. The primaries of these transformers are currently either connected in parallel or are connected to multiple drivers. There is also a need to split a receive signal to multiple destinations with minimal signal loss. Additional transformers can achieve the split. The prior art uses impedance-matching series resistors that cause a loss of signal. Instead of causing a loss, most instantiations of this invention would actually provide gain. Multiple transformers are used instead of multiple windings on a single transformer because multiple windings on the same transformer would require a redesign of the transformer, and may not be feasible with high-speed transformers that usually require a bifilar winding with a 1:1 ratio. This invention creates the split by connecting the primaries of multiple transformers in series. The secondary of each transformer is connected to one of the intended destinations without the use of impedance-matching series resistors.

Driscoll, Kevin R.↗

Iodine Hall Thruster Propellant Feed System for a CubeSat

There has been significant work recently in the development of iodine-fed Hall thrusters for in-space propulsion applications.1 The use of iodine as a propellant provides many advantages over present xenon-gas-fed Hall thruster systems. Iodine is a solid at ambient temperature (no pressurization required) and has no special handling requirements, making it safe for secondary flight opportunities. It has exceptionally high ρI sp (density times specific impulse), making it an enabling technology for small satellite near-term applications and providing system level advantages over mid-term high power electric propulsion options. Iodine provides thrust and efficiency that are comparable to xenonfed Hall thrusters while operating in the same discharge current and voltage regime, making it possible to leverage the development of flight-qualified xenon Hall thruster power processing units for the iodine application. Work at MSFC is presently aimed at designing, integrating, and demonstrating a flight-like iodine feed system suitable for the Hall thruster application. This effort represents a significant advancement in state-of-the-art. Though Iodine thrusters have demonstrated high performance with mission enabling potential, a flight-like feed system has never been demonstrated and iodine compatible components do not yet exist. Presented in this paper is the end-to-end integrated feed system demonstration. The system includes a propellant tank with active feedback-control heating, fill and drain interfaces, latching and proportional flow control valves (PFCV), flow resistors, and flight-like CubeSat power and control electronics. Hardware is integrated into a CubeSat-sized structure, calibrated and tested under vacuum conditions, and operated under under hot-fire conditions using a Busek BHT-200 thruster designed for iodine. Performance of the system is evaluated thorugh accurate measurement of thrust and a calibrated of mass flow rate measurement, which is a function of reservoir temperature/pressure, the flow resistors, and the setting of the PFCV. The calibration is performed using independent flow control monitoring techniques, providing an in situ measure of the flowrate as a function of controllable parameters. The reservoir temperature controls the iodine sublimation rate, providing propellant to ths thruster by pressurizing the propellant feed system to approx.1-2 psi. Control of the temperature and the PFCV are used to maintain reservoir pressure and keep the thruster discharge current constant.

Polzin, Kurt A.↗

Hydrogen Gas Sensors Fabricated on Atomically Flat 4H-SiC Webbed Cantilevers

This paper reports on initial results from the first device tested of a "second generation" Pt-SiC Schottky diode hydrogen gas sensor that: 1) resides on the top of atomically flat 4H-SiC webbed cantilevers, 2) has integrated heater resistor, and 3) is bonded and packaged. With proper selection of heater resistor and sensor diode biases, rapid detection of H2 down to concentrations of 20 ppm was achieved. A stable sensor current gain of 125 +/- 11 standard deviation was demonstrated during 250 hours of cyclic test exposures to 0.5% H2 and N2/air.

Neudeck, Philip G.↗

Demonstration of a Packaged Capacitive Pressure Sensor System Suitable for Jet Turbofan Engine Health Monitoring

In this paper, the development and characterization of a packaged pressure sensor system suitable for jet engine health monitoring is demonstrated. The sensing system operates from 97 to 117 MHz over a pressure range from 0 to 350 psi and a temperature range from 25 to 500 deg. The sensing system consists of a Clapp-type oscillator that is fabricated on an alumina substrate and is comprised of a Cree SiC MESFET, MIM capacitors, a wire-wound inductor, chip resistors and a SiCN capacitive pressure sensor. The pressure sensor is located in the LC tank circuit of the oscillator so that a change in pressure causes a change in capacitance, thus changing the resonant frequency of the sensing system. The chip resistors, wire-wound inductors and MIM capacitors have all been characterized at temperature and operational frequency, and perform with less than 5% variance in electrical performance. The measured capacitive pressure sensing system agrees very well with simulated results. The packaged pressure sensing system is specifically designed to measure the pressure on a jet turbofan engine. The packaged system can be installed by way of borescope plug adaptor fitted to a borescope port exposed to the gas path of a turbofan engine.

Harsh environment↗

Inrush Current Suppression Circuit and Method for Controlling When a Load May Be Fully Energized

A circuit and method for controlling when a load may be fully energized includes directing electrical current through a current limiting resistor that has a first terminal connected to a source terminal of a field effect transistor (FET), and a second terminal connected to a drain terminal of the FET. The gate voltage magnitude on a gate terminal of the FET is varied, whereby current flow through the FET is increased while current flow through the current limiting resistor is simultaneously decreased. A determination is made as to when the gate voltage magnitude on the gate terminal is equal to or exceeds a predetermined reference voltage magnitude, and the load is enabled to be fully energized when the gate voltage magnitude is equal to or exceeds the predetermined reference voltage magnitude.

Schwerman, Paul↗

Upscaling of 500 °C Durable SiC JFET-R Integrated Circuits

At HiTEC 2018, NASA Glenn Research Center reported the first demonstration of yearlong 500 °C operation of ceramic-packaged “Generation 10” ~200-transistor integrated circuits (ICs) based on two-level interconnect silicon carbide (4H-SiC) junction field effect transistors and resistors (JFET-R). This HiTEC 2021 submission updates on-going efforts at NASA Glenn spanning two subsequent prototype IC generations “11 and 12” to increase both complexity and durability of these ICs. Increased chip complexities of around 1000 transistors/chip for Gen. 11 and near 3000 transistors/chip for Gen. 12 are made possible by reductions in minimum layout feature sizes (including resistor width shrinkage from 6 µm to 2 µm) coupled with enlarged die size (from 3 x 3 mm to 5 x 5 mm). Gen. 11 ICs electrically tested to date include an 8-bit delta-sigma analog to digital converter (ADC) as well as upscaled random access memory (RAM) and nearly 1 kbit read only memory (ROM). However, Gen. 11 prototype ICs exhibited significantly lower yield and durability than Gen. 10 ICs. Development of revised processing is being investigated towards mitigating these issues in subsequent Gen. 12 fabrication run currently in progress.

silicon carbide↗

Progress Towards Prolonged Deployment of SiC JFET-R ICs Into Previously Inaccessible Hostile Environments

This invited presentation describes demonstration of semiconductor integrated circuits (ICs) and ceramic packaging that are arguably the most environmentally durable transistor electronics ever demonstrated. SiC junction field effect transistor-resistor (JFET-R) ICs with two-level interconnect have successfully operated for over 1 year in 500 °C air-ambient [1], 60 days in 460 °C and 9.3 MPa pressure caustic Venus surface environment test chamber [2], and radiation exposure through 7 Mrad(Si) total ionizing dose (TID) and 86 MeV-cm2/mg heavy ion strikes [3]. Furthermore, these ICs have also demonstrated operation from -190 °C to +812 °C (over 1000 °C T-span) without significant change in signal (input /output) or power supply voltages [4]. With modest adjustments, the SiC JFET-R fabrication process is compatible with semiconductor mass-production tools and materials. As an initial step towards this end, the processing that forms the SiC JFETs and resistors (without interconnect) for the NASA Glenn “Generation 12” design prototype JFET-R ICs was conducted at GE Research. Once the COVID-delayed IC interconnect and bond pad fabrication processing on these wafers is completed at NASA Glenn, the resulting chips will be packaged and oven-tested [5]. It is expected that further technology transfer to complete commercial production will lower investment and risk barriers to useful application deployment. For NASA, an initial high-value deployment is opening the Venus surface to extended missions for robotic scientific exploration.

Silicon Carbide↗

Select Electronic Parts Operation at Extreme Low Temperature

The purpose of the study presented in this paper is to extend the test period of a selected set of electronics parts at cryogenic condition to dwell period of about 24 hours to demonstrate extreme cold operational capability of these components. The parts tested are tantalum polymer, BX and P90 type ceramic capacitors, thick film resistors, analog multiplexers, a digital inverter, and a D-flip-flop. These parts were tested to assist identifying candidate components that can be used for development of a cold capable telemetry board. There are several past investigations that have shown that COTS (commercial-off-the-shelf) capacitors and resistors tested at cryogenic temperatures and frequencies up to 10MHz did not exhibit significant changes in capacitance and resistance values. Also, there are several test results for active parts. These past tests collected measurements during a temperature sweep from room temperature down to cryogenic temperature with very short dwell time at cryogenic temperature, and back to room temperature. This study extends the operational dwell time to at least 24 hours and returning to room temperature operation without significant degradation in performance, thus, demonstrating the potential for longer dwell time in actual operation in these extreme cold temperatures and a method for identifying the cold operability.

Ashtijou, Mohammad↗

Supply-noise-rejecting current source

Various technologies pertaining to a high-impedance current source are described herein. The current source outputs a substantially constant current by way of a first transistor that draws current from a supply. The current source is configured to feed-back noise from the supply to a feedback resistor at an input of an operational amplifier (op-amp) by way of a second transistor. The feedback resistor and the op-amp are configured such that responsive to receiving the supply noise feedback, the op-amp drives a gate voltage of the first transistor to cause the first transistor to reject the supply noise and cause the output of the current source to remain substantially constant.

42 ENGINEERING↗

Drivers for paralleled semiconductor switches

An apparatus includes a plurality of parallel-connected semiconductor switches (e.g., silicon carbide (SiC) metal oxide semiconductor field effect transistors (MOSFETs) or other wide-bandgap semiconductor switches) and a plurality of driver circuits having outputs configured to be coupled to control terminals of respective ones of the plurality of semiconductor switches and configured to drive the parallel-connected semiconductor switches responsive to a common switch state control signal. The driver circuits may have respective different power supplies, which may be adjustable. Respective output resistors may couple respective ones of the driver circuits to respective ones of the semiconductor switches. The output resistors may be adjustable.

Nojima, Geraldo↗

FET Junction Temperature Monitoring Using Novel On-Chip Solution

A novel junction temperature monitoring sensor is proposed and experimentally demonstrated for application in MOS-gate power devices. The sensor is created using the polycide gate electrode layer of the devices to create a temperature-sensitive resistor without any additional fabrication steps. The resistor is located on the field oxide with one end grounded at the device reference terminal to isolate it from the device current and voltage transients. It allows in-situ monitoring of the device junction temperature during active circuit operation. The technology has been implemented to monitor the junction temperature of Silicon Carbide Junction Barrier Schottky Field Effect Transistors (SiC JBSFETs) with the bi-directional FET (BiDFET).

Bidirectional switches, SiC bidirectional FET, BiD↗

Beam dynamics corrections in the measurement of the anomalous precession frequency at the Muon $g-2$ experiment at Fermilab

The Muon $g-2$ experiment at Fermilab (E989) aims to measure the anomalous magnetic moment of the muon with an accuracy of 140 ppb (parts per billions). This accuracy, obtained by adding in quadrature a statistical and a systematic contribution of comparable value (100 ppb), will allow to reduce the experimental uncertainty (from the previous E821 experiment at BNL \cite{bnl}) of a factor of 4, and represents one of the most precise tests of the Standard Model (SM) theory of elementary particles. The first result on the Run-1 dataset \cite{prl} was released on April 7, 2021, showing a very good agreement with the previous result from BNL experiment, with a slightly better uncertainty. The corresponding experimental average increases the significance of the discrepancy between the measured and Standard Model prediction of 4.2$\sigma$ \cite{white_paper}.\\ \noindent The measured quantity is the muon magnetic anomaly a$_\mu$=$\frac{g_\mu-2}{2}$ where g$_\mu$ is the gyromagnetic factor of the muon. Dirac's equation predicts g$_\mu$ = 2, while radiative corrections, dominated by the QED contribution due to an exchange of a virtual photon, causes a per-mille correction on this quantity. By including all the SM contributions, a$_\mu$ is known at 370 ppb. The E989 experiment measures $a_\mu$ injecting positive muons with momentum of 3.1 GeV/$c$ polarized longitudinally in bunches (called $fills$) with an average rate of 12 Hz, in a storage ring of 14 meters diameter. Due to the parity violation in the weak muon decay, high energy positrons produced are emitted preferably in the muon's spin direction. By counting the number of positrons with energy greater then 1.7 GeV in function of the time, the frequency precession of the muon spin is measured, that together with the measurement of the magnetic field, allows to extract $a_\mu$. The positrons are detected with 24 electromagnetic calorimeters, that measure the energy and the arrival time of the positrons, each made of 54 crystals of lead fluoride (PbF$_2$) read by silicon photomultipliers (SiPM). Together with calorimeters, two tracking detectors are used to make non-destructive measurements of the muon beam characteristic by reconstructing the muon decay position extrapolating backward the decay positrons. The knowledge of the beam motion inside the ring plays a fundamental role in the analysis of $a_{\mu}$, where the measured anomalous precession frequency $\omega_a$ must be corrected for four main beam dynamics effects. A first correction is associated with the presence of an electric field responsible of the vertical focusing on the storage ring, where vertical direction is orthogonal to the orbit and horizontal direction is along the storage ring radius. Due to the oscillations in the vertical direction, the so called vertical betatron oscillations, a second correction is necessary to account for an average angle associated with the muon motion off the ideal orbit. A third correction is caused by lost muons in the ring which have a different spin phase at the injection respect to the decay ones. Finally, due to the correlation between the vertical and horizontal beam motion of the muons and the acceptance of the calorimeter, a correction (called ``phase-acceptance") arises. In Run1, due to the presence of two damaged resistors in one electrostatic quadrupole, this correction had a prominent role. The replacement of the damaged resistors before Run2 decreased this effect by one order of magnitude, and a further reduction in Run-3 was provided by an improved orbit.\\ \noindent The work of this Thesis focuses on the beam dynamics corrections on $\omega_a$. Due to the prominent role in Run-1 a special attention has been put to the phase-acceptance correction\footnote{The effect of this correction on the E821 BNL measurement of the $g-2$ has been evaluated to be within the quoted systematic error.}. Chapter \ref{ch:anomalous_magnetic_moment} introduces the anomalous magnetic moment of the muon. Chapter \ref{ch:early_experiment} describes the history of the Muon $g-2$ experiments. Chapter \ref{ch:theory} discusses the Standard Model prediction and possible new physics scenario. Chapter \ref{ch:muon_g2_experiment} describes the E989 experiment, whose experimental technique and the apparatus are discussed focusing on the improvements needed to reach the final goal on $a_\mu$ measurement. The original work of the Thesis is discussed in the last 5 chapters. Chapter \ref{ch:experiment_technique} presents the analysis technique to extract $\omega_a$, Chapter \ref{ch:beam_dynamics} describes the beam dynamics in the E989 experiment, Chapter \ref{ch:beam_dynamics_correction} discusses the beam dynamics correction to $\omega_a$, and Chapter \ref{sec:pa_corr} focuses on the phase acceptance correction. Finally Chapter \ref{ch:run23_analysis_improvements} contains the Run-2/3 improvements which are expected to allow for an increased precision ons the beam dynamics co...

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Data Acquisition System Selection and Calibration of Resistive Moisture Content Measurements for Large-Scale Field Studies in Cold Climate Residential Building Envelope Performance

The residential building stock built before the energy codes were enforced has several significant inefficiency problems in terms of insulation and air leakage. To decrease these inefficiencies, building retrofits are necessary. However, if the envelope is not appropriately designed, excessive accumulation of moisture content and thus mold formation and decay inside the envelope layers can be a vital problem. This risk becomes higher, especially in extreme climate conditions such as cold winters and hot and humid summers as in some northern regions of the U.S. Field studies are essential to test the long-term hygrothermal performance of building envelopes. Although in-situ temperature, RH, and heat flux measurements are straightforward, moisture content measurements are cumbersome. Mainly, because of the heterogeneous nature of the wood materials, deviations and nonuniformities within the materials are unavoidable. Resistance measurements are one of the oldest methods used to measure the moisture content of wood and other building materials. In large-scale studies, it is commonly preferred to use multi-purpose data acquisition systems (DAQ) and custom-made or prefabricated moisture pins to measure the electrical resistance (and thus moisture content) of critical building materials. These multi-purpose DAQ systems generally provide lower costs and offer more flexibility. However, these systems require calibration and fine-tuning to achieve accurate moisture content measurements. A large-scale, two-year-long field study was conducted in northern Minnesota to monitor the hygrothermal performance of residential retrofit wall systems in cold climates. Two base case walls and sixteen different wall treatments were tested. Moisture contents were measured at various layers in each wall treatment using 85 sets of moisture pins. This paper focuses on the overall approach, fabrication, and calibration methodology for the combination of custom-made moisture pins and a multi-purpose DAQ. The aim is to directly use the low-excitation multi-purpose DAQ without any extra voltage regulator. A half-bridge circuit is used to measure wood resistance with 4V excitation voltage and 100 kΩ and 500 kΩ reference resistors. The system is calibrated for four different materials: Douglas fir, lodgepole pine, western red cedar, and oriented strand board (OSB). Calibration experiments were done under controlled conditions in 50% and 65% RH test chambers. Resistance-based moisture content calibration curves are obtained for each species. Results show that higher reference resistors provided better calibration curves for lower excitation voltages.

Desjarlais, Andre Omer↗

PID-Regulated Heating System for PIP-II Reference Line

The Proton Improvement Project-2 centers on building a new superconducting linear particle accelerator (Linac) at Fermilab. At the heart of the accelerator is the reference line, a critical system that defines the ideal path for the particle beam as it passes through magnets, RF cavities, and other beamline elements. Temperature stability is crucial for the reliable operation of RF components, such as mixers and filters. Fluctuations affect key performance parameters like conversion loss, isolation, and linearity. To mitigate any drift caused by ambient temperature changes, a heating plate assembly is utilized to maintain key components at a controlled temperature of 40°C. The system utilizes an aluminum 36”x36”x0.5” heat plate powered by a MOSFET-based control circuit, delivering approximately 460 W of thermal energy through a resistor array. Real-time temperature feedback is provided by a PT100 Resistance Temperature Detector (RTD), which interfaces with a Proportional–Integral–Derivative (PID) control algorithm to maintain closed-loop temperature regulation. The control signal actively modulates the gate voltage of an N channel MOSFET, dynamically adjusting power delivery in response to deviations from the temperature setpoint. Simulations and LTspice models validate the functionality and responsiveness of the circuit under varying conditions. The prototype has successfully demonstrated stable thermal control, paving the way for integration into the PIP-II infrastructure. The final design will feature an expanded resistor array, as well as communication with a PLC for continuous data acquisition and diagnostics. This work directly supports Fermilab’s broader mission by contributing to the stability and reliability of core accelerator systems, enhancing the precision of particle beam delivery for future physics experiments.

Mosher, Alexander [Fermilab]↗