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At least 217 records · Page 12
All sourcesNASA NTRSDOE OSTI
NASA NTRS1980

A Fourier transform with speed improvements for microprocessor applications

A fast Fourier transform algorithm for the RCA 1802microprocessor was developed for spacecraft instrument applications. The computations were tailored for the restrictions an eight bit machine imposes. The algorithm incorporates some aspects of Walsh function sequency to improve operational speed. This method uses a register to add a value proportional to the period of the band being processed before each computation is to be considered. If the result overflows into the DF register, the data sample is used in computation; otherwise computation is skipped. This operation is repeated for each of the 64 data samples. This technique is used for both sine and cosine portions of the computation. The processing uses eight bit data, but because of the many computations that can increase the size of the coefficient, floating point form is used. A method to reduce the alias problem in the lower bands is also described.

Lokerson, D. C.↗
NASA NTRS1981

Bi-directional communication interface for microprocessor-to-system/370

The design and operation of a bi-directional communication interface between a microcomputer and the IBM System/370 is documented. The hardware unit interconnects a modem to interface to the S/370, the microcomputer with an EIA I/O port, and a terminal for sending and receiving data from either the microcomputer or the S/370. Also described is the software necessary for the two-way interface. This interface is designed so that no modifications need to be made to the terminal, modem, or microcomputer.

Fischer, J. P.↗
NASA NTRS1981

Numerical algorithms for finite element computations on arrays of microprocessors

The development of a multicolored successive over relaxation (SOR) program for the finite element machine is discussed. The multicolored SOR method uses a generalization of the classical Red/Black grid point ordering for the SOR method. These multicolored orderings have the advantage of allowing the SOR method to be implemented as a Jacobi method, which is ideal for arrays of processors, but still enjoy the greater rate of convergence of the SOR method. The program solves a general second order self adjoint elliptic problem on a square region with Dirichlet boundary conditions, discretized by quadratic elements on triangular regions. For this general problem and discretization, six colors are necessary for the multicolored method to operate efficiently. The specific problem that was solved using the six color program was Poisson's equation; for Poisson's equation, three colors are necessary but six may be used. In general, the number of colors needed is a function of the differential equation, the region and boundary conditions, and the particular finite element used for the discretization.

Ortega, J. M.↗
NASA NTRS1980

Prototype microprocessor controller

A microcomputer controller for STDN antennas was developed. The microcomputer technology reduces the system's physical size by the implementation in firmware of functions. The reduction in the number of components increases system reliability and similar benefit is derived when a graphic video display is substituted for several control and indicator panels. A substantial reduction in the number of cables, connectors, and mechanical switches is achieved. The microcomputer based system is programmed to perform calibration and diagnostics, to update the satellite orbital vector, and to communicate with other network systems. The design is applicable to antennas and lasers.

Zarur, J.↗
NASA NTRS1981

Application of microprocessors in an upper atmosphere instrument package

A servo-driven magnetometer table measuring offset from magnetic north has been developed by NASA to calculate payload azimuth required to point at a celestial target. Used as an aid to the study of gamma-ray phenomena, the high-altitude balloon-borne instrument determines a geocentric reference system, and calculates a set of pointing directions with respect to the system. Principal components include the magnetometer, stepping motor, microcomputer, and gray code shaft encoder. The single-chip microcomputer is used to control the orientation of the system, and consists of a central processing unit, program memory, data memory and input/output ports. Principal advantages include a low power requirement, consuming 6 watts, as compared to 30 watts consumed by the previous system.

Lim, T. S.↗
NASA NTRS1981

A prototype interface unit for microprocessor based Loran-C receiver

An inexpensive data/command entry and CRT display system capable of alphanumeric and graphics moe operation and designed to operate in place of a separate ASCII terminal, is documented. The software to interface this unit to the 6502-based Loran C receiver is also described. The system simplifies receiver operations to a level typical of current avionics systems.

Novacki, S. M., III↗
NASA NTRS1982

Bi-directional communication interface for microprocessor-to-system/370

The design and operation of a bi-directional communication interface between a microcomputer and the IBM System/370 is documented. The hardware unit inter-connects a modem to interface to the S/370, the microcomputer with an EIA I/O port, and a terminal for sending and receiving data from either the microcomputer of the S/370. The software necessary for the two-way interface is also described. This interface was designed so that no modifications need to be made to the terminal, modem or microcomputer.

Fischer, J. P.↗
NASA NTRS1982

A prototype interface unit for microprocessor-based Loran-C receiver

A data/command entry ASCII keypad with a CRT display capable of alphanumeric and graphics mode operation which provides specialized data entry and display for the LORAN-C receiver/processor was developed. This unit will replace conventional communication terminal to simplify receiver operations to a level typical of current avionics systems.

Novacki, S. M., III↗
NASA NTRS1979

Evaluation of the IMP-16 microprocessor orbit determination system filter

The results of the numerical tests performed in evaluating the interplanetary monitoring platform-16 orbit determination system are presented. The system is capable of performing orbit determination from satellite to satellite tracking data in applications technology satellite range and range rate format. The estimation scheme used is a Kalman filter, sequential (recursive) estimator. Descriptions of the tests performed and tabulations of the numerical results are included.

Shenitz, C. M.↗
NASA NTRS1981

Cosmic ray induced errors in I2L microprocessors and logic devices

Large-scale integrated (LSI) devices fabricated with integrated injection logic (I2L) were studied by both heavy ion experiments and device analysis to determine the upset threshold, the charge collection volumes and ultimately the probability for upset in the galactic cosmic ray spectrum. The devices studied, the SEP9900A, the SBP9989 and the P-Code generator were fabricated by Texas Instruments, Inc.

Price, W. E.↗
NASA NTRS1982

New advances in the partial-reflection-drifts experiment using microprocessors

Improvements to the partial reflection drifts experiment are completed. The results of the improvements include real time processing and simultaneous measurements of the D region with coherent scatter. Preliminary results indicate a positive correlation between drift velocities calculated by both methods during a two day interval. The possibility now exists for extended observations between partial reflection and coherent scatter. In addition, preliminary measurements could be performed between partial reflection and meteor radar to complete a comparison of methods used to determine velocities in the D region.

Ruggerio, R. L.↗
NASA NTRS1983

Digital system upset. The effects of simulated lightning-induced transients on a general-purpose microprocessor

Flight critical computer based control systems designed for advanced aircraft must exhibit ultrareliable performance in lightning charged environments. Digital system upset can occur as a result of lightning induced electrical transients, and a methodology was developed to test specific digital systems for upset susceptibility. Initial upset data indicates that there are several distinct upset modes and that the occurrence of upset is related to the relative synchronization of the transient input with the processing sate of the digital system. A large upset test data base will aid in the formulation and verification of analytical upset reliability modeling techniques which are being developed.

Belcastro, C. M.↗
NASA NTRS1982

A fast microprocessor communication network design for interprocessor communications for an integrated flight control system

A node design with connectivity four is presented whose communication processor handles data at four million bits/sec on each of the four channels into the node, and on each of the four channels out of the node, for a total node capacity of 32 million bits/sec. An integrated flight control system real-time application of this communication network design is discussed. It is shown that such high speed node communication hardware, arranged in the topological configuration of a minimum diameter graph with connectivity four and all links active, has good potential for real time control applications requiring reliability, availability, and survivability characteristics.

Kelly, G. L.↗
NASA NTRS1982

On implementing self-checking microprocessors

A simple and general model of the interfaces and check circuits used for comparing and detecting faults in a pair of 16-bit processors is described, and problems encountered in the application of TI 9900 processors are discussed. The greatest incompatibility is found to lie between the rollback structures of the CPUs and the interface and check logic (ICL) model. The ICL model generates a reset when an error is detected, and a rollback is expected to occur when it is released. The TI 9900 requires a reset of minimum duration, and after release goes through an initialization cycle, obtains rollback parameters from fixed memory locations, and executes the rollback, consistent with the ICL. The ICL is relatively simple, having a complexity equivalent to fewer than 1000 gates.

Rennels, D. A.↗
NASA NTRS1983

ADA and multi-microprocessor real-time simulation

The selection of a high-order programming language for a real-time distributed network simulation is described. The additional problem of implementing a language on a possibly changing network is addressed. The recently designed language ADA (trademarked by DoD) was chosen since it provides the best model of the underlying application to be simulated.

Feyock, S.↗
NASA NTRS1983

Redundant asynchronous microprocessor system for fault tolerant flight control and navigation

Unlike their synchronized counterparts, redundant channels in an asynchronous flight system can, under no-fault conditions, exhibit cross-channel data disparities. Sources of these errors are examined in terms of the general, individual functions of the flight control and navigation application in the asynchronous digital environment. The effects of asynchronism on trajectory programmers, dynamic control algorithms and data reconstruction processes are examined in terms of data skews, data latencies, and clock rate uncertainties. An example is presented in which time corrections are applied to reduce the data disparities. Practical limitations of the approach of the example are discussed.

Dunn, W. R.↗
NASA NTRS1986

Interface Circuits for Self-Checking Microprocessors

Fault-tolerant-microcomputer concept based on enhancing "simple" computer with redundancy and self-checking logic circuits detect hardware faults. Interface and checking logic and redundant processors confer on 16-bit microcomputer ability to check itself for hardware faults. Checking circuitry also checks itself. Concept of self-checking complementary pairs (SCCP's) employed throughout ICL unit.

Rennels, D. A.↗