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At least 217 records · Page 12

Operational efficiency subpanel advanced mission control

Herein, the term mission control will be taken quite broadly to include both ground and space based operations as well as the information infrastructure necessary to support such operations. Three major technology areas related to advanced mission control are examined: (1) Intelligent Assistance for Ground-Based Mission Controllers and Space-Based Crews; (2) Autonomous Onboard Monitoring, Control and Fault Detection Isolation and Reconfiguration; and (3) Dynamic Corporate Memory Acquired, Maintained, and Utilized During the Entire Vehicle Life Cycle. The current state of the art space operations are surveyed both within NASA and externally for each of the three technology areas and major objectives are discussed from a user point of view for technology development. Ongoing NASA and other governmental programs are described. An analysis of major research issues and current holes in the program are provided. Several recommendations are presented for enhancing the technology development and insertion process to create advanced mission control environments.

Friedland, Peter↗

Parametric State Space Structuring

Structured approaches based on Kronecker operators for the description and solution of the infinitesimal generator of a continuous-time Markov chains are receiving increasing interest. However, their main advantage, a substantial reduction in the memory requirements during the numerical solution, comes at a price. Methods based on the "potential state space" allocate a probability vector that might be much larger than actually needed. Methods based on the "actual state space", instead, have an additional logarithmic overhead. We present an approach that realizes the advantages of both methods with none of their disadvantages, by partitioning the local state spaces of each submodel. We apply our results to a model of software rendezvous, and show how they reduce memory requirements while, at the same time, improving the efficiency of the computation.

Ciardo, Gianfranco↗

Incremental Parallelization of Non-Data-Parallel Programs Using the Charon Message-Passing Library

Message passing is among the most popular techniques for parallelizing scientific programs on distributed-memory architectures. The reasons for its success are wide availability (MPI), efficiency, and full tuning control provided to the programmer. A major drawback, however, is that incremental parallelization, as offered by compiler directives, is not generally possible, because all data structures have to be changed throughout the program simultaneously. Charon remedies this situation through mappings between distributed and non-distributed data. It allows breaking up the parallelization into small steps, guaranteeing correctness at every stage. Several tools are available to help convert legacy codes into high-performance message-passing programs. They usually target data-parallel applications, whose loops carrying most of the work can be distributed among all processors without much dependency analysis. Others do a full dependency analysis and then convert the code virtually automatically. Even more toolkits are available that aid construction from scratch of message passing programs. None, however, allows piecemeal translation of codes with complex data dependencies (i.e. non-data-parallel programs) into message passing codes. The Charon library (available in both C and Fortran) provides incremental parallelization capabilities by linking legacy code arrays with distributed arrays. During the conversion process, non-distributed and distributed arrays exist side by side, and simple mapping functions allow the programmer to switch between the two in any location in the program. Charon also provides wrapper functions that leave the structure of the legacy code intact, but that allow execution on truly distributed data. Finally, the library provides a rich set of communication functions that support virtually all patterns of remote data demands in realistic structured grid scientific programs, including transposition, nearest-neighbor communication, pipelining, gather/scatter, and redistribution. At the end of the conversion process most intermediate Charon function calls will have been removed, the non-distributed arrays will have been deleted, and virtually the only remaining Charon functions calls are the high-level, highly optimized communications. Distribution of the data is under complete control of the programmer, although a wide range of useful distributions is easily available through predefined functions. A crucial aspect of the library is that it does not allocate space for distributed arrays, but accepts programmer-specified memory. This has two major consequences. First, codes parallelized using Charon do not suffer from encapsulation; user data is always directly accessible. This provides high efficiency, and also retains the possibility of using message passing directly for highly irregular communications. Second, non-distributed arrays can be interpreted as (trivial) distributions in the Charon sense, which allows them to be mapped to truly distributed arrays, and vice versa. This is the mechanism that enables incremental parallelization. In this paper we provide a brief introduction of the library and then focus on the actual steps in the parallelization process, using some representative examples from, among others, the NAS Parallel Benchmarks. We show how a complicated two-dimensional pipeline-the prototypical non-data-parallel algorithm- can be constructed with ease. To demonstrate the flexibility of the library, we give examples of the stepwise, efficient parallel implementation of nonlocal boundary conditions common in aircraft simulations, as well as the construction of the sequence of grids required for multigrid.

VanderWijngaart, Rob F.↗

Shape Memory Actuated Normally Open Permanent Isolation Valve

A valve assembly for an in-space propulsion system includes an inlet tube, an outlet tube, a valve body coupling the inlet tube to the outlet tube and defining a propellant flow path, a valve stem assembly disposed within the valve body, an actuator body coupled to the valve body, the valve stem assembly extending from an interior of the valve body to an interior of the actuator body, and an actuator assembly disposed within the actuator body and coupled to the valve stem assembly, the actuator assembly including a shape memory actuator member that when heated to a transition temperature is configured to enable the valve stem assembly to engage the outlet tube and seal the propellant flow path.

Ramspacher, Daniel J.↗

PCM synchronization by word stuffing

When a transmitted word, consisting of a number of pulses, is detected and removed from the data stream, the space left by the removal is eliminated by a memory buffer. This eliminates the need for a clock synchronizer thereby removing instability problems.

Butman, S.↗

SEU hardened memory cells for a CCSDS Reed-Solomon encoder

A design technique to harden CMOS memory circuits against single event upset (SEU) in the space environment is reported. The design technique provides a recovery mechanism which is independent of the shape of the upsetting event. A RAM cell and flip-flop design are presented to demonstrate the method. The flip-flop was used in the control circuitry for a Reed-Solomon encoder designed for the Space Station and Explorer platforms.

Whitaker, Sterling↗

Approaches to the study of intelligence

A survey and an evaluation are conducted for the Rosenbloom et al. (1991) 'SOAR' model of intelligence, both as found in humans and in prospective AI systems, which views it as a representational system for goal-oriented symbolic activity based on a physical symbol system. Attention is given to SOAR's implications for semantic and episodic memory, symbol processing, and search within a uniform problem space; also noted are the relationships of SOAR to competing AI schemes, and its potential usefulness as a theoretical tool for cognitive psychology.

Norman, Donald A.↗

The SAMPEX Data Processing Unit

The paper discusses salient features of the SAMPEX Data Processing Unit (DPU), the primary function of which is to collect sensor data to create telemetry packets for transmission to the solid-state recorder located within the Small Explorer Data System. Particular attention is given to the sensor interface electronics, the space command interface, the spacecraft telemetry interface, and the memory mapper of the DPU system; the task scheduling concept; and system reconfiguring. A block diagram of the DPU system is included.

Mabry, D. J.↗

SEU hardening of CMOS memory circuit

This paper reports a design technique to harden CMOS memory circuits against Single Event Upset (SEU) in the space environment. A RAM cell and Flip Flop design are presented to demonstrate the method. The Flip Flop was used in the control circuitry for a Reed Solomon encoder designed for the Space Station.

Whitaker, S.↗

Space-Derived Sewer Monitor

The QuadraScan Longterm Flow Monitoring System is a second generation sewer monitor developed by American Digital Systems, Inc.'s founder Peter Petroff. Petroff, a former spacecraft instrumentation designer at Marshall Space Flight Center, used expertise based on principles acquired in Apollo and other NASA programs. QuadraScan borrows even more heavily from space technology, for example in its data acquisition and memory system derived from NASA satellites. "One-time" measurements are often plagued with substantial errors due to the flow of groundwater absorbed into the system. These system sizing errors stem from a basic informational deficiency: accurate, reliable data on how much water flows through a sewer system over a long period of time is very difficult to obtain. City officials are turning to "permanent," or long-term sewer monitoring systems. QuadraScan offers many advantages to city officials such as the early warning capability to effectively plan for city growth in order to avoid the crippling economic impact of bans on new sewer connections in effect in many cities today.

Source record↗

Compact, Reliable EEPROM Controller

A compact, reliable controller for an electrically erasable, programmable read-only memory (EEPROM) has been developed specifically for a space-flight application. The design may be adaptable to other applications in which there are requirements for reliability in general and, in particular, for prevention of inadvertent writing of data in EEPROM cells. Inadvertent writes pose risks of loss of reliability in the original space-flight application and could pose such risks in other applications. Prior EEPROM controllers are large and complex and do not provide all reasonable protections (in many cases, few or no protections) against inadvertent writes. In contrast, the present controller provides several layers of protection against inadvertent writes. The controller also incorporates a write-time monitor, enabling determination of trends in the performance of an EEPROM through all phases of testing. The controller has been designed as an integral subsystem of a system that includes not only the controller and the controlled EEPROM aboard a spacecraft but also computers in a ground control station, relatively simple onboard support circuitry, and an onboard communication subsystem that utilizes the MIL-STD-1553B protocol. (MIL-STD-1553B is a military standard that encompasses a method of communication and electrical-interface requirements for digital electronic subsystems connected to a data bus. MIL-STD- 1553B is commonly used in defense and space applications.) The intent was to both maximize reliability while minimizing the size and complexity of onboard circuitry. In operation, control of the EEPROM is effected via the ground computers, the MIL-STD-1553B communication subsystem, and the onboard support circuitry, all of which, in combination, provide the multiple layers of protection against inadvertent writes. There is no controller software, unlike in many prior EEPROM controllers; software can be a major contributor to unreliability, particularly in fault situations such as the loss of power or brownouts. Protection is also provided by a powermonitoring circuit.

Katz, Richard↗

Highly Reliable, High-Speed, Unidirectional Serial Data Links

Highly reliable, high-speed, unidirectional serial data-communication subsystems have been proposed to be installed in an upgrade of the computing systems aboard the space shuttles. The basic design concept of these serial data links is also adaptable to terrestrial use in applications in which there are requirements for highly reliable serial data communications. The hardware and software aspects of the architecture of the data links are dictated largely by a requirement, in the original space-shuttle application, for one computer to monitor the memory transactions and memory contents of other computers in real time with high reliability and without reliance on requests for retransmission. To minimize weight while affording a capability to transfer data at a required rate of 2.56 x 10(exp 8) bits per second, it was decided that the links would be serial ones of the fiber-channel type. [Fiber channel denotes a type of serial computer bus that is used to connect a computer (usually a supercomputer) with a high-speed data storage device. Depending on the specific application, the physical connection between the transmitter and receiver could be made via an optical fiber or a twisted pair of wires.] Heretofore, fiber-channel links have ordinarily been bidirectional and have operated under protocols that provide for receiving stations to detect errors and request retransmission when necessary. In the present case, the time taken by processing to request retransmission would conflict with the requirement for real-time transfer of data. To ensure reliability without retransmission, a link according to the proposal would utilize a modified version of the normal fiberchannel character set in conjunction with forward error correction by means of a Reed-Solomon code (see figure). The Reed-Solomon encoding and decoding and the translations between the normal and modified character sets would be effected by logic circuitry external to the fiber-channel transmitter and receiver, which would be commercial off-the-shelf units. The receiving end of the link could detect and correct errors at a rate as high as 4 million times per second, if necessary. The receiver detects uncorrectable double-byte errors. It has been estimated that uncorrectable-error rate would amount to one failure in about 10(exp 19) characters.

Cole, Robert M.↗

NASA and Blue Origin Collaborative Assessment of Precision Landing Algorithms and Computing

NASA’s Safe and Precise Landing Integrated Capabilities Evolution (SPLICE) project is developing sensor, algorithm, and compute technologies for precision landing and hazard avoidance. These technologies are being tested as an integrated Precision Landing and Hazard Avoidance (PL&HA) system on Blue Origin’s New Shephard suborbital vehicle. A key goal for the computing element of this technology development is to characterize the performance of the SPLICE software workloads on the project’s Descent and Landing Computer (DLC). The DLC is a multi-core processor designed as a surrogate for NASA’s High-Performance Space Computer (HPSC). Measurements of the SPLICE workload performance on the DLC provides NASA insight on how PL&HA capabilities will perform on the HPSC, and guidance on how the SPLICE algorithms can be implemented to best utilize the DLC platform. This insight can also be used to derive requirements to guide trade studies on candidate computing architectures, for use on platforms like Blue Moon. NASA and Blue Origin are collaborating under an agreement to pursue this mutual benefit. Performance metrics collected are based on measurement of common compute resources such as percentage used of memory bandwidth, I/O utilization, interrupt latency, and kernel vs. user space code residency. Where possible existing performance counters and metrics that are part of the operating system kernel are used. As the design has a significant FPGA component, performance counters are identified and instantiated in the fabric to measure DMA performance and interface metrics. Collection of metrics is performed on the DLC with a representative workload that simulates a full landing cycle of the Blue Origin New Shepard vehicle. Consideration is given to the other compute implementations and whether they can run SPLICE algorithms at the same rate and with the same latency as the DLC. One option being considered is the use of a RISC-V soft core instantiated in a radiation resilient FPGA fabric such as the Xilinx KU60. Select algorithms from the SPLICE code will be run for comparison with the DLC. This paper describes how the DLC is instrumented to collect performance measurements of the SPLICE workloads, preliminary results from these measurements, and their implications on SPLICE algorithm implementation. The results of experimentation to derive candidate requirements for architecture trades on a PL&HA computing system are also presented.

computer performance↗

Applications of cold hibernated elastic memory (CHEM) structures

Experiments and analyses have confirmed the feasibility of an innovative, new class of very simple, reliable, low mass, low packaging volume, and low-cost self-deployable structures for space and commercial applications.

shape memory polymers open cellular structures exp↗

Reliability and coverage analysis of non-repairable fault-tolerant memory systems

A method was developed for the construction of probabilistic state-space models for nonrepairable systems. Models were developed for several systems which achieved reliability improvement by means of error-coding, modularized sparing, massive replication and other fault-tolerant techniques. From the models developed, sets of reliability and coverage equations for the systems were developed. Comparative analyses of the systems were performed using these equation sets. In addition, the effects of varying subunit reliabilities on system reliability and coverage were described. The results of these analyses indicated that a significant gain in system reliability may be achieved by use of combinations of modularized sparing, error coding, and software error control. For sufficiently reliable system subunits, this gain may far exceed the reliability gain achieved by use of massive replication techniques, yet result in a considerable saving in system cost.

Cox, G. W.↗

Simulations of Sample-Up-The-Ramp for Space-Based Observations of Faint Sources

We have conducted simulations of a memory-efficient up-the-ramp sampling algorithm for infrared detector arrays. Our simulations use realistic sky models of galaxy brightness, shapes, and distributions, and include the contributions of zodiacal light and cosmic rays. A simulated readout is based on the HAWAII-2RG arrays, and includes read noise, dark current, pedestal, and other effects. The up-the-ramp algorithm rejects cosmic rays and produces a best estimate of the source flux under the assumption of very low signal-to-noise. We present an analysis of the fidelity of image brightness recovery with this algorithm.

Benford, Dominic J.↗

Data-Driven Study of Shape Memory Behavior of Multi-Component Ni-Ti Alloys

Ni-Ti based shape memory alloys (SMAs) have found wide-spread use in aerospace, automotive, biomedical, and commercial applications owing to their favorable properties and ease of operation. Especially important for many NASA applications is the ability to tune the martensitic transformation temperature of Ni-Ti alloys by varying the alloy composition and processing conditions. Recently, researchers at NASA have compiled an extensive database of shape memory properties of materials, including over 8,000 multi-component Ni-Ti alloys containing 37 different alloying elements. Using this dataset, machine learning models are trained to predict transformation temperatures, hysteresis, and transformation strain with extremely low mean absolute errors. These models are used to learn relationships between shape memory behavior and input parameters in the composition and processing space. ML predictions are validated through new experiments. The combination of an extensive experimental dataset and accurate learning models, together, make our approach highly suitable for the rapid discovery and design of novel SMAs with targeted properties. We are not aware of any current approaches capable of predicting SMA transformation behavior over such a wide range of compositions and processing conditions.

Shape memory alloys↗

Game-like tasks for comparative research: leveling the playing field

Game-like computer tasks offer many benefits for psychological research. In this paper, the usefulness of such tasks to bridge population differences (e.g., age, intelligence, species) is discussed and illustrated. A task called ALVIN was used to assess humans' and monkeys' working memory for sequences of colors with or without tones. Humans repeated longer lists than did the monkeys, and only humans benefited when the visual stimuli were accompanied by auditory cues. However, the monkeys did recall sequences at levels comparable to those reported elsewhere for children. Comparison of similarities and differences between the species is possible because the two groups were tested with exactly the same game-like paradigm.

NASA Discipline Number 06-10↗