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At least 217 records · Page 12

Enhancing scalability of a matrix-free eigensolver for studying many-body localization

We propose several techniques to enhance the parallel scalability of a matrix-free eigensolver designed for studying many-body localization (MBL) of quantum spin chain models with nearest-neighbor interactions and on-site disorder. This type of problem is computationally challenging because the dimension of the associated Hamiltonian matrix grows exponentially with respect to the number of spins L, and we need to average over different realizations of the random disorder to obtain relevant statistical behavior. For each disorder realization, we need to compute eigenvalues from different regions of the spectrum and their corresponding eigenvectors. In previous work, the interior eigenstates for a single eigenvalue problem are computed via the shift-and-invert Lanczos algorithm. Due to the extremely high memory footprint of the LU factorizations, this technique is not well suited for large L’s. For example, we need thousands of compute nodes on modern high performance computing infrastructures to go beyond L = 24. The matrix-free approach does not suffer from this memory bottleneck, however, its scalability is limited by a computation and communication load imbalance. To reduce this imbalance and to significantly enhance the scalability of the matrix-free eigensolver, we reorder the matrix and leverage the consistent space runtime, CSPACER. We also show its efficiency in managing irregular communication patterns at scale compared to optimized MPI non-blocking two-sided and one-sided RMA implementation variants. This effort enables us to study MBL for spin chains with a larger number of spins. The efficiency and effectiveness of the proposed algorithm is demonstrated by computing eigenstates on a massively parallel many-core high performance computer.

METIS↗

A graphics processing unit accelerated sparse direct solver and preconditioner with block low rank compression

We present the GPU implementation efforts and challenges of the sparse solver package STRUMPACK. The code is made publicly available on github with a permissive BSD license. STRUMPACK implements an approximate multifrontal solver, a sparse LU factorization which makes use of compression methods to accelerate time to solution and reduce memory usage. Multiple compression schemes based on rank-structured and hierarchical matrix approximations are supported, including hierarchically semi-separable, hierarchically off-diagonal butterfly, and block low rank. Here, in this paper, we present the GPU implementation of the block low rank (BLR) compression method within a multifrontal solver. Our GPU implementation relies on highly optimized vendor libraries such as cuBLAS and cuSOLVER for NVIDIA GPUs, rocBLAS and rocSOLVER for AMD GPUs and the Intel oneAPI Math Kernel Library (oneMKL) for Intel GPUs. Additionally, we rely on external open source libraries such as SLATE (Software for Linear Algebra Targeting Exascale), MAGMA (Matrix Algebra on GPU and Multi-core Architectures), and KBLAS (KAUST BLAS). SLATE is used as a GPU-capable ScaLAPACK replacement. From MAGMA we use variable sized batched dense linear algebra operations such as GEMM, TRSM and LU with partial pivoting. KBLAS provides efficient (batched) low rank matrix compression for NVIDIA GPUs using an adaptive randomized sampling scheme. The resulting sparse solver and preconditioner runs on NVIDIA, AMD and Intel GPUs. Interfaces are available from PETSc, Trilinos and MFEM, or the solver can be used directly in user code. We report results for a range of benchmark applications, using the Perlmutter system from NERSC, Frontier from ORNL, and Aurora from ALCF. For a high frequency wave equation on a regular mesh, using 32 Perlmutter compute nodes, the factorization phase of the exact GPU solver is about 6.5× faster compared to the CPU-only solver. The BLR-enabled GPU solver is about 13.8× faster than the CPU exact solver. For a collection of SuiteSparse matrices, the STRUMPACK exact factorization on a single GPU is on average 1.9× faster than NVIDIA’s cuDSS solver.

97 MATHEMATICS AND COMPUTING↗

Asynchronous distributed-memory task-parallel algorithm for compressible flows on unstructured 3D Eulerian grids

Here, we discuss the implementation of a finite element method, used to numerically solve the Euler equations of compressible flows, using an asynchronous runtime system (RTS). The algorithm is implemented for distributed-memory machines, using stationary unstructured 3D meshes, combining data-, and task-parallelism on top of the Charm++ RTS. Charm++’s execution model is asynchronous by default, allowing arbitrary overlap of computation and communication. Task-parallelism allows scheduling parts of an algorithm independently of, or dependent on, each other. Built-in automatic load balancing enables continuous redistribution of computational load by migration of work units based on real-time CPU load measurement. The RTS also features automatic checkpointing, fault tolerance, resilience against hardware failure, and supports power-, and energy-aware computation. We demonstrate scalability up to 25 x 10 9 cells at $\mathscr{O}$10 4 compute cores and the benefits of automatic load balancing for irregular workloads. The full source code with documentation is available at https://quinoacomputing.org.

42 ENGINEERING↗

Differential Power Processing for Ultra-Efficient Data Storage

Here this paper presents the hardware, software, and power codesign of an ultra-efficient data storage server with differential power processing (DPP). DPP can reduce the power conversion stress, improve the efficiency, and enhance the functionality of modular power electronics systems. The power inputs of a large number of hard disk drives (HDDs) were connected in series and supported by a multiport ac-coupled differential power processing (MAC-DPP) converter through a multiwinding transformer. Methods for controlling the multi-input multi-output power flow in the multiwinding transformer while avoiding core saturation were investigated. A ten-port MAC-DPP prototype with 700-W/in 3 power density was built to support a 450-W HDD storage system with ten series-stacked voltage domains. The prototype was tested on a 50-HDD server testbench, and the overall system loss is below 1 W (99.77% system efficiency). The server was able to maintain high-speed reading and writing operation of all 50 HDDs against the worst hot-swapping scenarios. A variety of hardware/software configurations and many cloud storage techniques were tested on the fully functioning server. Experimental results show that the energy efficiency of large-scale information systems (CPU/GPU clusters, memory banks, HDD arrays, etc.) can be greatly improved by software, hardware, and power codesign.

42 ENGINEERING↗

Demonstration of MOOSE-based Griffin reactor physics, code for heterogeneous lead-cooled fast reactor analysis

The MOOSE-based reactor physics code Griffin was assessed on a heterogeneous pin-resolved model of a prototype lead-cooled fast reactor assembly. This model was developed in preparation for future use in MOOSE-based multiphysics calculations for computing hot channel factors. Heterogeneous multigroup cross sections were prepared using the fast reactor multi-group cross section processing code MC{sup 2}-3 using a two-step method. Griffin simulations were performed using the DFEM-SN solver on 576 cores on Argonne's LCRC cluster. Diffusion-based acceleration methods were applied (NDA and CMFD). Reference solutions were generated with continuous energy MCNP and the hybrid MOC/finite element solver PROTEUS-MOC for code-to-code comparison. Space-angle convergence studies were conducted to observe convergence in k-eigenvalue and axial pin power distributions. The fully resolved Griffin calculation was within 68 pcm of the MCNP eigenvalue and exhibited max 1.2% relative error in the axial pin power distribution. Griffin produced nearly identical results to PROTEUS-MOC when using the same 9-group multigroup cross-section set. Griffin demonstrated favorable scaling in wall-clock time and memory usage when using diffusion-based acceleration methods. Griffin is capable of simulating the pin-resolved heterogeneous LFR assembly with good accuracy and performance, and is suitable for future use in coupled high-fidelity hot channel factor simulations. (authors)

21 SPECIFIC NUCLEAR REACTORS AND ASSOCIATED PLANTS↗

Tunnel magnetoresistance detection of skyrmions (Final Scientific/Technical Report for Magnon Current Transmission Through Insulators)

Micromagnetic simulations are used to investigate different strategies for tunnel magnetoresistance detection of the Néel skyrmion core direction and Bloch skyrmion chirality. When a Néel skyrmion passes beneath a perpendicularly magnetized dot separated by a tunnel barrier, a peak or dip in the tunnel magnetoresistance as a function of time shows a peak followed by a dip, or vice versa, depending on the chirality. The results are compared with existing detection methods based on the Hall resistance.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

GentenMPI: Distributed Memory Sparse Tensor Decomposition

GentenMPl is a toolkit of sparse canonical polyadic (CP) tensor decomposition algorithms that is designed to run effectively on distributed-memory high-performance computers. Its use of distributed-memory parallelism enables it to efficiently decompose tensors that are too large for a single compute node's memory. GentenMPl leverages Sandia's decades-long investment in the Trilinos solver framework for much of its parallel-computation capability. Trilinos contains numerical algorithms and linear algebra classes that have been optimized for parallel simulation of complex physical phenomena. This work applies these tools to the data science problem of sparse tensor decomposition. In this report, we describe the use of Trilinos in GentenMPl, extensions needed for sparse tensor decomposition, and implementations of the CP-ALS (CP via alternating least squares) and GCP-SGD (generalized CP via stochastic gradient descent) sparse tensor decomposition algorithms. We show that GentenMPl can decompose sparse tensors of extreme size, e.g., a 12.6-terabyte tensor on 8192 computer cores. We demonstrate that the Trilinos backbone provides good strong and weak scaling of the tensor decomposition algorithms.

97 MATHEMATICS AND COMPUTING↗

GrainGNN: A dynamic graph neural network for predicting 3D grain microstructure

We propose GrainGNN, a surrogate model for the evolution of polycrystalline grain structure under rapid solidification conditions in metal additive manufacturing. High fidelity simulations of solidification microstructures are typically performed using multicomponent partial differential equations (PDEs) with moving interfaces. The inherent randomness of the PDE initial conditions (grain seeds) necessitates ensemble simulations to predict microstructure statistics, e.g., grain size, aspect ratio, and crystallographic orientation. Here, currently such ensemble simulations are prohibitively expensive and surrogates are necessary.In GrainGNN, we use a dynamic graph to represent interface motion and topological changes due to grain coarsening. We use a reduced representation of the microstructure using hand-crafted features; we combine pattern finding and altering graph algorithms with two neural networks, a classifier (for topological changes) and a regressor (for interface motion). Both networks have an encoder-decoder architecture; the encoder has a multi-layer transformer long-short-term-memory architecture; the decoder is a single layer perceptron.We evaluate GrainGNN by comparing it to high-fidelity phase field simulations for in-distribution and out-of-distribution grain configurations for solidification under laser power bed fusion conditions. GrainGNN results in 80%–90% pointwise accuracy; and nearly identical distributions of scalar quantities of interest (QoI) between phase field and GrainGNN simulations compared using Kolmogorov-Smirnov test. GrainGNN's inference speedup (PyTorch on single x86 CPU) over a high-fidelity phase field simulation (CUDA on a single NVIDIA A100 GPU) is 150×–2000× for 100-initial grain problem. Further, using GrainGNN, we model the formation of 11,600 grains in 220 seconds on a single CPU core.

36 MATERIALS SCIENCE↗

Proximity Portability and in Transit , M-to-N Data Partitioning and Movement in SENSEI [Book Chapter]

In high-performance parallel in situ processing, the term in transit processing refers to those configurations where data must move from a producer to a consumer that runs on separate resources. In the context of parallel and distributed computing on an HPC platform one of the central challenges is to determine a mapping of data from producer ranks to consumer ranks. This problem is complicated by the heterogeneity that arises in producer-consumer pairs, such as when producer and consumer codes have different levels of concurrency, different scaling characteristics, or different data models. The resulting mapping and movement of data from M producer to N consumer ranks can have a significant impact on aggregate application performance, particularly when the data consumer requires only a subset of the overall data for its task. This chapter focuses on the design considerations that underlie SENSEI’s implementation to this challenging problem. These design considerations extend the core SENSEI architecture and include ideas like the need to accommodate flexibility in the choice of different partitioning methods, the ability for a data consumer to request and receive only the subset of data needed for its particular operation, and the ability to leverage any of several different data transport tools. The idea of proximity portability, being able to use different data transport methods as part of an in transit workflow, is illustrated through the use of three different transport layers where switching from one transport tool to another is accomplished with only a configuration file change. Here, the chapter also includes a performance analysis summary showing the performance gains that are possible in terms of multiple metrics, such as memory footprint, time to solution, and amount of data moved, when using optimized partitioners in an in transit setting, gains that are made possible by the implementation shaped by specific design considerations.

Bethel, E. Wes↗

Coupling of CTF and TRANSFORM using the Functional Mockup Interface

An in-memory coupling between the sub-channel thermal hydraulics code COBRA-TF (CTF), which is included in the Virtual Environment for Reactor Applications (VERA), and the systems code Transient Simulation Framework of Reconfigurable Models (TRANSFORM) was developed in this work. Data exchange is accomplished by using the Functional Mock-Up Interface (FMI), an open standard for coupling dynamic systems models together. The FMI-based coupling necessitated the development of a novel FORTRAN wrapper for communicating with Functional Mock-Up Units. This wrapper will facilitate future FMI-based code couplings with other FORTRAN-based programs. CTF-TRANSFORM is exercised on a simplified Molten Salt Reactor Experiment (MSRE) model in steady-state and transient configurations. The coupled CTF-TRANSFORM model is shown to predict core temperature deltas similar to those available in historical MSRE operational data and is shown to be robust to fast power transients.The coupling paves the way to performing sensitivity and design studies impossible with VERA/CTF alone, in which secondary and tertiary loop operating conditions and design parameters may be perturbed and their impact on the core operating conditions studied.

97 MATHEMATICS AND COMPUTING↗

Investigation of the OECD/NEA PWR MOX/UO{sub 2} core transient benchmark using a coupled whole core pin-by-pin route in WIMS

This paper investigates the new CAMELOT coupling route developed in WIMS, which uses prepared tabulated cross-sections combined with the flux solver MERLIN module and the integrated sub-channel thermal hydraulics solver ARTHUR module to solve for the coupled core state. This coupling route is applied to the OECD/NEA pressurized water reactor (PWR) core transient benchmark exercise, involving 3-D neutronics and thermal-hydraulics analysis of a full-sized PWR core featuring MOX fuel at various core states, as well as simulating a control rod ejection transient. Analysis of the results for each part of the benchmark demonstrate that the high-resolution pin-by-pin analysis used in WIMS closely matches the other participants in the benchmark, with differences of between 20-200 pcm for k-effective, 1-2.5% RMS difference for assembly-averaged powers, 2-8% difference in rod worth calculations, < 200 ppm for calculations of critical boron concentration, zero difference in delayed neutron fraction calculation and a very close match for power response to the rod ejection transient. This is the first application of the WIMS-CAMELOT approach for the transient analysis of a full-sized reactor and as such further improvements such as reducing computational cost through parallelization, optimisation and memory reduction, are currently in active development. This paper demonstrates the accuracy and flexibility of the CAMELOT coupling route, providing a straightforward and consistent user image that can be easily used for a variety of modelling problems involving coupled neutronics and thermal-hydraulics. (authors)

21 SPECIFIC NUCLEAR REACTORS AND ASSOCIATED PLANTS↗

Case Study: Field Evaluation of a Low-Cost Circuit-Level Electrical Submetering System

Circuit-level metering technologies provide the ability to monitor individual circuits within an electrical panel in a building, providing detailed power and energy consumption data at a much more granular level than was previously achievable in a cost-effective manner. While the fundamental hardware components of circuit-level—split-core current transformers (CTs) and power monitoring meters—have existed for some time, the new offerings in the market have tightly integrated these components, lower costs, and have streamlined data organization, transport, and access via software solutions accessible through web and application programming interfaces (API). NREL evaluated Meazon’s single-circuit metering system. The evaluation of the equipment under test (EUT) focused on three aspects: (1) accuracy of the data provided by the system, (2) ease of installation of this technology and ease of data integration into existing U.S. General Services Administration (GSA) analytics platforms, and (3) total cost of ownership and cost-effectiveness of the technology. The metering technology was tested in a field deployment where it was installed in low and high-voltage commercial electrical panels in the César E. Chávez Memorial Building in Denver, Colorado. The goals were to assess the metering accuracy, the ease of installation and data retrieval, and the total cost of ownership and cost-effectiveness. This technology proved easy to install by a certified electrician who completed the install of 6 meters in 2 separate panels (120/208 V and 277/480 V) and 2 circuit disconnects (along with associated commissioning) at the César E. Chávez Memorial Building in less than one day. The technology was installed in high- and low-voltage panels and with limited space in the electrical room, demonstrating the applicability of this technology to almost all commercial buildings in the GSA portfolio. Primary considerations for this technology include appropriate sizing of CTs for each circuit, selection of loads/circuits/panels that are of high value for detailed submetering (e.g., tailored for high-load devices), and how GSA would like to integrate these data with its existing energy management infrastructure. Through the field evaluation, we demonstrated data integration from the vendor system into the primary software component on the GSA enterprise-level energy management and information system, GSA Link. Data from the circuit-level metering were integrated into this platform and used to perform FDD. This demonstrated the ability of the EUT to augment existing energy management and information systems in buildings where GSA Link is deployed and provides a pathway for delivering FDD at other buildings throughout the portfolio.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗

Efficient multi-scale representation of visual objects using a biologically plausible spike-latency code and winner-take-all inhibition

Deep neural networks have surpassed human performance in key visual challenges such as object recognition, but require a large amount of energy, computation, and memory. In contrast, spiking neural networks (SNNs) have the potential to improve both the efficiency and biological plausibility of object recognition systems. Here we present a SNN model that uses spike-latency coding and winner-take-all inhibition (WTA-I) to efficiently represent visual stimuli using multi-scale parallel processing. Mimicking neuronal response properties in early visual cortex, images were preprocessed with three different spatial frequency (SF) channels, before they were fed to a layer of spiking neurons whose synaptic weights were updated using spike-timing-dependent-plasticity. We investigate how the quality of the represented objects changes under different SF bands and WTA-I schemes. We demonstrate that a network of 200 spiking neurons tuned to three SFs can efficiently represent objects with as little as 15 spikes per neuron. Furthermore, studying how core object recognition may be implemented using biologically plausible learning rules in SNNs may not only further our understanding of the brain, but also lead to novel and efficient artificial vision systems.

59 BASIC BIOLOGICAL SCIENCES↗

Revisiting Huffman Coding: Toward Extreme Performance on Modern GPU Architectures

Today's high-performance computing (HPC) applications are producing vast volumes of data, which are challenging to store and transfer efficiently during the execution, such that data compression is becoming a critical technique to mitigate the storage burden and data movement cost. Huffman coding is arguably the most efficient Entropy coding algorithm in information theory, such that it could be found as a fundamental step in many modern compression algorithms such as DEFLATE. On the other hand, today's HPC applications are more and more relying on the accelerators such as GPU on supercomputers, while Huffman encoding suffers from low throughput on GPUs, resulting in a significant bottleneck in the entire data processing. In this paper, we propose and implement an efficient Huffman encoding approach based on modern GPU architectures, which addresses two key challenges: (1) how to parallelize the entire Huffman encoding algorithm, including codebook construction, and (2) how to fully utilize the high memory-bandwidth feature of modern GPU architectures. The detailed contribution is fourfold. (1) We develop an efficient parallel codebook construction on GPUs that scales effectively with the number of input symbols. (2) We propose a novel reduction based encoding scheme that can efficiently merge the codewords on GPUs. (3) We optimize the overall GPU performance by leveraging the state-of-the-art CUDA APIs such as Cooperative Groups. (4) We evaluate our Huffman encoder thoroughly using six real-world application datasets on two advanced GPUs and compare with our implemented multithreaded Huffman encoder. Experiments show that our solution can improve the encoding throughput by up to 5.0× and 6.8× on NVIDIA RTX 5000 and V100, respectively, over the state-of-the-art GPU Huffman encoder, and by up to 3.3× over the multithread encoder on two 28-core Xeon Platinum 8280 CPUs.

Tian, Jiannan↗

Direct measurement of reduced exchange stiffness and its impact on magnetic vortex behavior in PyGd alloys

Thin films composed of sputtered transition metal/rare earth (TM/RE) ferrimagnets have emerged as promising building blocks for future spintronic devices, offering tunable magnetic properties critical for data storage, memory, and logic applications. However, understanding how the combination of TM and RE elements influences effective magnetic properties, such as exchange stiffness (Aex), remains challenging. Magnetic vortices provide a versatile tool for probing these properties in thin film systems. By combining magnetic imaging via soft x-ray microscopy and micromagnetic modeling, we quantify the effective exchange stiffness in PyGd ferrimagnetic disks with varying Gd concentrations. Our results indicate a reduction in Aex to below 3 pJ/m for a 20% Gd concentration when compared to reference Py, and values below 2 pJ/m for 30% Gd, reflecting weak Ni–Gd exchange coupling. These findings highlight the critical role of rare earth content in tuning the exchange stiffness. The reduced exchange stiffness facilitates a linear field response of the magnetization up to the edge of the disk, as well as significant deformations in the vortex core itself when compared to films with larger Aex. Our results are in line with, albeit lower than, recent measurements of the exchange stiffness in intermixed PyGd. This reduced exchange stiffness has implications for the development of spintronic devices based on ferrimagnetic skyrmions.

Jacob, Liyan↗

Revisiting Huffman Coding: Toward Extreme Performance on Modern GPU Architectures

Today's high-performance computing (HPC) applications are producing vast volumes of data, which are challenging to store and transfer efficiently during the execution, such that data compression is becoming a critical technique to mitigate the storage burden and data movement cost. Huffman coding is arguably the most efficient Entropy coding algorithm in information theory, such that it could be found as a fundamental step in many modern compression algorithms such as DEFLATE. On the other hand, today's HPC applications are more and more relying on the accelerators such as GPU on supercomputers, while Huffman encoding suffers from low throughput on GPUs, resulting in a significant bottleneck in the entire data processing. In this paper, we propose and implement an efficient Huffman encoding approach based on modern GPU architectures, which addresses two key challenges: (1) how to parallelize the entire Huffman encoding algorithm, including codebook construction, and (2) how to fully utilize the high memory-bandwidth feature of modern GPU architectures. The detailed contribution is fourfold. (1) We develop an efficient parallel codebook construction on GPUs that scales effectively with the number of input symbols. (2) We propose a novel reduction based encoding scheme that can efficiently merge the codewords on GPUs. (3) We optimize the overall GPU performance by leveraging the state-of-the-art CUDA APIs such as Cooperative Groups. (4) We evaluate our Huffman encoder thoroughly using six real-world application datasets on two advanced GPUs and compare with our implemented multi-threaded Huffman encoder. Experiments show that our solution can improve the encoding throughput by up to 5.0x and 6.8x on NVIDIA RTX 5000 and V100, respectively, over the state-of-the-art GPU Huffman encoder, and by up to 3.3x over the multi-thread encoder on two 28-core Xeon Platinum 8280 CPUs.

Tian, Jiannan↗

Gravitational-wave signature of core-collapse supernovae

Here, we calculate the gravitational-wave (GW) signatures of detailed 3D core-collapse supernova sim ulations spanning a range of massive stars. Most of the simulations are carried out to times late enough to capture more than 95% of the total GW emission. We find that the f/g-mode and f-mode of proto-neutron star oscillations carry away most of the GW power. The f-mode frequency inex orably rises as the proto-neutron star (PNS) core shrinks. We demonstrate that the GW emission is excited mostly by accretion plumes onto the PNS that energize modal oscillations and also high frequency (“haze”) emission correlated with the phase of violent accretion. The duration of the major phase of emission varies with exploding progenitor and there is a strong correlation between the total GW energy radiated and the compactness of the progenitor. Moreover, the total GW emissions vary by as much as three orders of magnitude from star to star. For black-hole formation, the GW signal tapers off slowly and does not manifest the haze seen for the exploding models. For such failed models, we also witness the emergence of a spiral shock motion that modulates the GW emission at a frequency near ~100 Hertz that slowly increases as the stalled shock sinks. We find significant angular anisotropy of both the high- and low-frequency (memory) GW emissions, though the latter have very little power.

79 ASTRONOMY AND ASTROPHYSICS↗

UPC++ v1.0 Programmer’s Guide (Rev. 2023.9.0)

UPC++ is a C++ library that supports Partitioned Global Address Space (PGAS) programming. It is designed for writing efficient, scalable parallel programs on distributed-memory parallel computers. The key communication facilities in UPC++ are one-sided Remote Memory Access (RMA) and Remote Procedure Call (RPC). The UPC++ control model is single program, multiple-data (SPMD), with each separate constituent process having access to local memory as it would in C++. The PGAS memory model additionally provides one-sided RMA communication to a global address space, which is allocated in shared segments that are distributed over the processes. UPC++ also features Remote Procedure Call (RPC) communication, making it easy to move computation to operate on data that resides on remote processes. UPC++ was designed to support exascale high-performance computing, and the library interfaces and implementation are focused on maximizing scalability. In UPC++, all communication operations are syntactically explicit, which encourages programmers to consider the costs associated with communication and data movement. Moreover, all communication operations are asynchronous by default, encouraging programmers to seek opportunities for overlapping communication latencies with other useful work. UPC++ provides expressive and composable abstractions designed for efficiently managing aggressive use of asynchrony in programs. Together, these design principles are intended to enable programmers to write applications using UPC++ that perform well even on hundreds of thousands of cores.

97 MATHEMATICS AND COMPUTING↗