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At least 217 records · Page 12

Comparison and Discussion on Shortcircuit Protections for Silicon-Carbide MOSFET Modules: Desaturation Versus Rogowski Switch-Current Sensor

Survivability of silicon-carbide (SiC) mosfet modules during short circuit (SC) is essential for modern power electronics systems due to large economic implications. SiC mosfet modules exhibit narrow SC withstand times and generally much lower SC robustness than silicon (Si) insulated-gate bipolar transistors (IGBTs). This puts a critical concern on their utilization, further stressing the importance of reliable protection. This article presents a comprehensive analysis and discussion on the SiC mosfet module SC protection and performance comparison between conventional desaturation detection, previously used for Si IGBT protection, and Rogowski switch-current sensor (RSCS) detection. In addition, this article presents the experimental design for soft turn-off as a reaction to the SC detection to avoid excessive overshoots during the abrupt turn-off of the SC current. To perform different types of SC with various fault inductances on different temperatures, and for the sake of fair comparison under the same conditions, a gate-driver unit for 1.2 kV SiC mosfet half-bridge modules is developed containing both detection methods. The results demonstrate that both methods are successful in protecting the module in all SC types, with superiority of the RSCS detection and concerns for desaturation detection in high-inductance and high dc-bus voltage SC events.

42 ENGINEERING↗

Efficient Measurement-Driven Eigenenergy Estimation with Classical Shadows

Quantum algorithms exploiting real-time evolution under a target Hamiltonian have demonstrated remarkable efficiency in extracting key spectral information. However, the broader potential of these methods, particularly beyond ground-state calculations, is underexplored. In this work, we introduce the framework of multiobservable dynamic mode decomposition (MODMD), which combines the observable dynamic mode decomposition (DMD), a measurement-driven eigensolver tailored for near-term implementation, with classical shadow tomography. MODMD leverages random scrambling in the classical shadow technique to construct, with exponentially reduced resource requirements, a signal subspace that encodes rich spectral information. Notably, we replace typical Hadamard-test circuits with a protocol designed to predict low-rank observables, thereby broadening the use of classical shadow tomography for predicting many low-rank observables. We establish theoretical guarantees on the spectral approximation from MODMD, taking into account distinct sources of error. In the ideal case, we prove that the spectral error scales as exp (−Δ⁢𝐸⁢𝑡 max ), where Δ⁢𝐸 is the Hamiltonian spectral gap and 𝑡 max is the maximal simulation time. This analysis provides a rigorous justification of the rapid convergence observed across simulations. To demonstrate the utility of our framework, we consider its application to fundamental tasks, such as determining the low-lying, i.e., ground or excited, energies of representative many-body systems. Our work paves the path for efficient designs of measurement-driven algorithms on near-term and early fault-tolerant quantum devices.

quantum algorithms & computation↗

A scalable superconducting nanowire memory array with row–column addressing

Scalable superconducting memory is required for the development of low-energy superconducting computers and fault-tolerant quantum computers. Conventional superconducting logic-based memory cells possess a large footprint that limits scaling; nanowire-based superconducting memory cells, although more compact, have high error rates, which hinders integration into large arrays. Here we report a 4 × 4 superconducting nanowire memory array that is designed for scalable row–column operations and has a functional density of 2.6 Mbit cm −2 . Each memory cell is based on a nanowire loop consisting of two temperature-dependent superconducting switches and a variable kinetic inductor. The arrays operate at 1.3 K, where we implement and characterize multiflux quanta state storage and destructive read-out. By optimizing the write- and read-pulse sequences, we minimize bit errors and maximize operating margins. We achieve a minimum bit error rate of 10 −5 . Here, we also use circuit-level simulations to understand the memory cell’s dynamics, performance limits and stability under varying pulse amplitudes.

Electrical and electronic engineering↗

Harnessing Quantum Computing for Energy Materials: Opportunities and Challenges

Developing high-performance materials is critical for diverse energy applications to increase efficiency, improve sustainability and reduce costs. Classical computational methods have enabled important breakthroughs in energy materials development, but they face scaling and time-complexity limitations, particularly for high-dimensional or strongly correlated material systems. Quantum computing (QC) promises to offer a paradigm shift by exploiting quantum bits with their superposition and entanglement to address challenging problems intractable for classical approaches. This Perspective discusses the opportunities in leveraging QC to advance energy materials research and the challenges QC faces in solving complex and high-dimensional problems. We present cases on how QC, when combined with classical computing methods, can be used for the design and simulation of practical energy materials. We also outline the outlook for error-corrected, fault-tolerant QC capable of achieving predictive accuracy and quantum advantage for complex material systems.

Algorithms↗

ML–Enabled FPGA Framework for Fast Quantum State Discrimination in Mid-Circuit Measurement Regimes

Accurate and low-latency quantum state discrimination is essential for protocols involving mid-circuit measurement (MCM) and conditional feed-forward. In superconducting quantum systems, conventional readout pipelines transfer measurement data to host processors for post-processing, introducing millisecond-scale delays that far exceed qubit coherence times. To overcome this bottleneck, we present an in-situ machine learning (ML) inference engine implemented on an FPGA for real-time quantum state discrimination. Our design performs inference directly on digitized readout signals with 40 ns latency, supports both qubit and qutrit readout, and enables conditional operations without host-side intervention. This capability is critical for MCM and for feedback-driven protocols such as quantum error correction. We validate the system on superconducting transmon hardware, demonstrating robust discrimination fidelity across multiple qubit and qutrit channels. We further demonstrate conditional qutrit logic driven by FPGA-resident classification, highlighting the potential of low-latency ML-on-FPGA control for NISQ applications and scalable fault-tolerant quantum computing.

Vora, Neel [Lawrence Berkeley National Laboratory ↗

Continuous operation of a coherent 3,000-qubit system

Neutral atoms are a promising platform for quantum science, enabling advances in areas ranging from quantum simulations and computation to metrology, atomic clocks and quantum networking. Although atom losses typically limit these systems to a pulsed mode, continuous operation could substantially enhance cycle rates, remove bottlenecks in metrology and enable deep-circuit quantum evolution through quantum error correction. Here we demonstrate an experimental architecture for high-rate reloading and continuous operation of a large-scale atom-array system while realizing coherent storage and manipulation of quantum information. Our approach utilizes a series of two optical lattice conveyor belts to transport atom reservoirs into the science region, where atoms are repeatedly extracted into optical tweezers without affecting the coherence of qubits stored nearby. Using a reloading rate of 300,000 atoms in tweezers per second, we create over 30,000 initialized qubits per second, which we leverage to assemble and maintain an array of over 3,000 atoms for more than 2 hours. Furthermore, we demonstrate persistent refilling of the array with atomic qubits in either a spin-polarized or a coherent superposition state while preserving the quantum state of stored qubits. Our results pave the way for the realization of large-scale continuously operated atomic clocks, sensors and fault-tolerant quantum computers.

atomic and molecular physics↗

Geometric Structure and Transversal Logic of Quantum Reed–Muller Codes

Designing efficient and noise-tolerant quantum computation protocols generally begins with an understanding of quantum error-correcting codes and their native logical operations. The simplest class of native operations are transversal gates, which are naturally fault-tolerant. Here, in this paper, we aim to characterize the transversal gates of quantum Reed–Muller (RM) codes by exploiting the well-studied properties of their classical counterparts. We start our work by establishing a new geometric characterization of quantum RM codes via the Boolean hypercube and its associated subcube complex. More specifically, a set of stabilizer generators for a quantum RM code can be described via transversal X and Z operators acting on subcubes of particular dimensions. This characterization leads us to define subcube operators composed of single-qubit π/2 k Z -rotations that act on subcubes of given dimensions. We first characterize the action of subcube operators on the code space: depending on the dimension of the subcube, these operators either (1) act as a logical identity on the code space, (2) implement non-trivial logic, or (3) rotate a state away from the code space. Second, and more remarkably, we uncover that the logic implemented by these operators corresponds to circuits of multi-controlled-Z gates that have an explicit and simple combinatorial description. Overall, this suite of results yields a comprehensive understanding of a class of natural transversal operators for quantum RM codes.

Reed–Muller (RM) codes↗

Virtual Metering for Monitoring Building Energy Consumption

The United States Department of Energy (DOE) has standard metering requirements of commercial buildings for optimizing energy performance. The guiding principles are to continuously track and optimize energy performance and install building-level meters for electricity, natural gas, and steam. Some buildings at Los Alamos National Laboratory (LANL) have physical submeters monitoring their energy consumption, but these meters have proven to be unreliable. And, in most cases, replacing them has proven to be a slow process. Installing new submeters also requires a temporary lockout of the circuit on which they are being installed. Many buildings at LANL contain laboratories with ongoing experiments or data centers, which makes an equipment power outage nearly impossible to plan. This inability to plan power outages results in long-term submeter failures. Although most submeters are eventually replaced, failures lead to missing consumption data for some unpredictable, extended time. A building automation system (BAS) is a system that provides control and monitoring on a building to maintain the operational performance of the building and occupancy comfort. Many buildings at LANL currently have a BAS, and all new renovations and installs will include installing a BAS if one does not already exist. The intended purpose for a BAS is primarily to monitor the health and efficiency of a building; however, it is also possible to calculate equipment power and energy consumption using BAS information. This project aims to use virtual meters to monitor building energy consumption as a cost-effective and minimally labor-intensive alternative to installing physical submeters. The fault detection and diagnostics tool, SkySpark, provides a centralized database for all the data from the various BAS that are active at LANL. This data includes the information that is needed to create virtual meters for heating, ventilating, and air conditioning (HVAC) systems in most buildings, including heating and cooling loads. 9 This report begins with a detailed summary of the project, including the reasoning, procedure, and results. The specific processes of creating the various virtual meters are then identified. Then the limitations are discussed. And, lastly, the results and future potential are presented.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

Better Than Worst-Case Decoding for Quantum Error Correction

The overheads of classical decoding for quantum error correction in cryogenic quantum systems grow rapidly with the number of logical qubits and their correction code distance. Decoding at room temperature is bottlenecked by refrigerator I/O bandwidth while cryogenic on-chip decoding is limited by area/power/thermal budget. To overcome these overheads, we are motivated by the observation that in the common case (over 90% of the time), error correction 'syndromes' are fairly trivial with high redundancy / sparsity, since the error correction codes are over-provisioned to be able to correct for uncommon worst-case complex scenarios (to ensure substantially low logical error rates). If suitably exploited, these trivial scenarios can be handled with insignificant overhead, thereby alleviating any bottlenecks towards handling the worst-case scenarios by state-of-the-art means. Here, we propose Better Than Worst-Case Decoding for Quantum Error Correction, targeting cryogenic quantum systems and Surface Code, consisting of: On-chip Clique Decoder: An extremely lightweight decoder for correcting trivial common-case errors, designed for the cryogenic domain. The decoder is implemented and evaluated for SFQ logic. Statistical Off-chip Bandwidth Allocation: A statistical confidence-based technique for allocation of off-chip decoding bandwidth, to efficiently handle the rare complex decodes that are not covered by the Clique Decoder. Decode-Overflow Execution Stalling: A method to stall circuit execution, for the worst-case scenarios in which the provisioned off-chip bandwidth is insufficient to complete all requested off-chip decodes. In all, BTWC decoding achieves 70-99+% off-chip bandwidth elimination across a range of logical and physical error rates, without significantly sacrificing the accuracy of a state-of-the-art off-chip decoder. Further, it achieves 10-1000x bandwidth reduction over prior bandwidth reduction techniques, as well as 15-37x resource overhead reduction compared to prior on-chip decoding.

cryogenic optimization↗

Q-Cluster: Quantum Error Mitigation Through Noise-Aware Unsupervised Learning

Quantum error mitigation (QEM) is critical in reducing the impact of noise in the pre-fault-tolerant era, and is expected to complement error correction in fault-tolerant quantum computing (FTQC). In this work, we propose a novel QEM approach, Q-Cluster, that uses unsupervised learning (clustering) to reshape the measured bit-string distribution. Our approach starts with a simplified bit-flip noise model. It first performs clustering on noisy measurement results, i.e., bit-strings, based on the Hamming distance. The centroid of each cluster is calculated using a qubit-wise majority vote. Next, the noisy distribution is adjusted with the clustering outcomes and the bitflip error rates using Bayesian inference. Our simulation results show that Q-Cluster can mitigate high noise rates (up to 40% per qubit) with the simple bit-flip noise model. However, real quantum computers do not fit such a simple noise model. To address the problem, we (a) apply Pauli twirling to tailor the complex noise channels to Pauli errors, and (b) employ a machine learning model, ExtraTrees regressor, to estimate an effective bit-flip error rate using a feature vector consisting of machine calibration data (gate & measurement error rates), circuit features (number of qubits, numbers of different types of gates, etc.) and the shape of the noisy distribution (entropy). Our experimental results show that our proposed Q-Cluster scheme improves the fidelity by a factor of 1.46x, on average, compared to the unmitigated output distribution, for a set of low-entropy benchmarks on five different IBM quantum machines. Our approach outperforms the state-of-art QEM approaches RZNE [28], M3 [24], Hammer [35], and QBEEP [33] by 1.26x,1.29x,1.47x, and 2.65 x, respectively.

42 ENGINEERING↗

Modular Quantum Processor with an All-to-All Reconfigurable Router

Superconducting qubits provide a promising approach to large-scale fault-tolerant quantum computing. However, qubit connectivity on a planar surface is typically restricted to only a few neighboring qubits. Achieving longer-range and more flexible connectivity, which is particularly appealing in light of recent developments in error-correcting codes, however, usually involves complex multilayer packaging and external cabling, which is resource intensive and can impose fidelity limitations. Here, we propose and realize a high-speed on-chip quantum processor that supports reconfigurable all-to-all coupling with a large on-off ratio. We implement the design in a four-node quantum processor, built with a modular design comprising a wiring substrate coupled to two separate qubit-bearing substrates, each including two single-qubit nodes. We use this device to demonstrate reconfigurable controlled-𝑍 gates across all qubit pairs, with a benchmarked average fidelity of 96.00% ± 0.08% and best fidelity of 97.14% ± 0.07%, limited mainly by dephasing in the qubits. We also generate multiqubit entanglement, distributed across the separate modules, demonstrating GHZ-3 and GHZ-4 states with fidelities of 88.15% ± 0.24% and 75.18% ± 0.11%, respectively. This approach promises efficient scaling to larger-scale quantum circuits and offers a pathway for implementing quantum algorithms and error-correction schemes that benefit from enhanced qubit connectivity.

Quantum circuits↗

Blockchain for Fault-Tolerant Grid Operations

Radial topology and vast geographic coverage make distribution systems prone to widespread power outages upon the failure of a single (or multiple) upstream component. Fault-handling algorithms depend heavily on correct estimations of the system’s state to effectively isolate the affected area and reduce the number of affected customers while maintaining operational safety. The work described here leverages the core features of distributed, consensus-based decision-making processes and the immutability of blockchain, and demonstrates their value in improving fault-tolerant grid operations. In this work, blockchain was used to create a trusted data-sharing platform that enables independent actors to reconstruct the system state; this enables distributed resources to make intelligent decisions with limited knowledge. Although the process requires data sharing, its algorithms have been designed to limit the amount of private information that is exchanged, which helps preserve business-sensitive data and maintain customer privacy. In addition, by reducing the information that must be shared, the communication requirements are also reduced; (however, an in-depth analysis of the communication requirements is beyond the scope of this project). The proposed use cases are intended to represent a foundational basis for third parties to develop functional solutions that can eventually be deployed in the field. To further provide guidance, the envisioned use cases have incorporated design requirements that consider the blockchain characteristics and a need to limit information from surrounding resources, which preserve the assumption and the possibility that such resources could belong to different entities. This report presents a detailed design of the three use cases with the tools needed to enable the analysis being tested. The implemented gross error detection method can detect mismatches when the error exceeds 3.8 times the sensor’s rated accuracy. Detection of the circuit breaker state successfully identified the correct states across all simulation tests. A distribution-system power-flow solution in the simulator OpenDSS generally possesses a convergency tolerance of 0.01% on the voltage magnitude. The evaluation of possible reconnection using voltage magnitude—preserving the data ownership—has a voltage magnitude difference smaller than 0.001% from the OpenDSS result. The results preserving data ownership have a difference within the expected power flow tolerance with full knowledge of the system, which surpasses expectations.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Concatenated dual displacement code for continuous-variable quantum error correction

The continuous-variable (CV) Gaussian no-go theorem fundamentally limits the suppression of Gaussian displacement errors using only Gaussian gates and states. Prior studies have employed Gottesman-Kitaev-Preskill (GKP) states as ancillary qumodes to suppress small Gaussian displacement errors. However, when the displacement magnitude becomes large, inevitable lattice-crossing errors arise beyond the correctable range of the GKP state. To address this issue, we concatenate the Gaussian-noise-suppression circuit with an outer analog Steane code that corrects such occasional lattice-crossing events as well as other abrupt displacement errors. Contrary to conventional concatenation, which primarily aims to reduce logical error rates, the Steane-GKP duality in encoding provides complementary protection against displacement errors at different scales: The inner GKP layer employs non-Gaussian resources to suppress continuous Gaussian noise and reduce residual variance, while the outer analog Steane code corrects discrete lattice-crossing events that exceed the GKP correctable range. It is precisely this separation of error-mitigation roles that enables CV error correction. In contrast to prior work on concatenating GKP and repetition codes to establish error correction for discrete qubit/qudit encoding, we provide correction in the continuous encoding space. Analytical studies show that, under infinite squeezing, the concatenated code suppresses the variance of Gaussian displacement errors acting on all qumodes by up to 50%, while enabling unbiased correction of lattice-crossing errors with a success probability determined by the ratio between the residual Gaussian error standard deviation and the lattice-crossing magnitude. Even with finite squeezing, the proposed architecture still provides Gaussian-error suppression and lattice-crossing correction. Moreover, the presence of the outer analog Steane code relaxes the squeezing requirement of the inner GKP states, indicating near-term experimental feasibility. This work establishes a viable route toward fault-tolerant continuous-variable quantum computation and provides insight into the design of concatenated CV error-correcting architectures.

quantum error correction↗

Scaling Superconducting Quantum Computers with Chiplet Architectures

Fixed-frequency transmon quantum computers (QCs) have advanced in coherence times, addressability, and gate fidelities. Unfortunately, these devices are restricted by the number of on-chip qubits, capping processing power and slowing progress toward fault-tolerance. Although emerging transmon devices feature over 100 qubits, building QCs large enough for meaningful demonstrations of quantum advantage requires overcoming many design challenges. For example, today’s transmon qubits suffer from significant variation due to limited precision in fabrication. As a result, barring significant improvements in current fabrication techniques, scaling QCs by building ever larger individual chips with more qubits is hampered by device variation. Severe device variation that degrades QC performance is referred to as a defect. Here, we focus on a specific defect known as a frequency collision. When transmon frequencies collide, their difference falls within a range that limits two-qubit gate fidelity. Frequency collisions occur with greater probability on larger QCs, causing collision-free yields to decline as the number of on-chip qubits increases. As a solution, we propose exploiting the higher yields associated with smaller QCs by integrating quantum chiplets within quantum multi-chip modules (MCMs). Yield, gate performance, and application-based analysis show the feasibility of QC scaling through modularity. Our results demonstrate that chiplet architectures, relative to monolithic designs, benefit from average yield improvements ranging from 9.6 – 92.6 × for ≲5 qubit machines. In addition, our simulations explore the design space of chiplet systems and discover configurations that demonstrate average two-qubit gate infidelity reductions that are at best 0.815 × their monolithic counterpart. Lastly, we observe that carefully-selected modular systems achieve fidelity improvements on a range of benchmark circuits.

quantum architecture↗

Evaluation of a Reduced-Order Model for IBR Fault Response Representation via OEM Blackbox Models: Preprint

Driven by the need to capture the electromagnetic transients of transmission lines, inverter switching behavior, and detailed control systems, electromagnetic transient (EMT) studies have become increasingly important in industry, such as IBR interconnection study and fault study. However, original equipment manufacturer (OEM) inverter models typically include extensive parameters and proprietary settings that are unavailable to protection engineers. This paper introduces a data-driven, reduced-order model (ROM) developed as a PSCAD library component for use in EMT-based fault studies. The ROM replicates key OEM model behaviors without requiring detailed knowledge of control design or parameterization. The accompanying Python automation scripts streamline data generation, parameter fitting, and validation. The ROM's performance is demonstrated through comparison with both IEEE 2800-compliant and non-compliant OEM models in a real-world power system. Relay responses show nearly identical results, while simulation runtime is reduced by an average of 32.8\%, highlighting the ROM's practicality for protection engineers.

14 SOLAR ENERGY↗

Improved multiline HVDC circuit breakers with asymmetric conducting branches

Here, this paper proposes two improved multiline HVDC circuit breakers (DCBs) for HVDC grid applications, including type-1 improved multiline DCB and type-2 improved multiline DCB. The two improved DCBs draw on the core idea of extended H-bridge. m adjacent DC transmission lines share a single main breaker (MB) and surge arrester. Due to the extended H-bridge design, bidirectional current flow can be achieved by a unidirectional MB. An upper conducting branch and a lower conducting branch are connected to a DC line. The upper and lower conducting branches in the two improved multiline DCBs are asymmetric. The upper conducting branch of both two improved DCBs is formed by a load commutation switch (LCS) and an ultra-fast disconnector (UFD). The lower conducting branch of the type-1 improved scheme is composed of a diode and a UFD; and of the type-2 improved scheme is made up of diode stack. Compared with other DCBs, the proposed type-1 DCB and type-2 DCB are more cost effective. Among the five DCBs, the type-2 improved scheme requires the least number of individual switching actions. The effectiveness and feasibility of the proposed schemes are verified through simulation of a bipolar three-terminal HVDC grid in PSCAD/EMTDC.

42 ENGINEERING↗

Demonstration of a Novel Technology to Manage Electricity Demand in Grid-Independent Military Microgrids

This research was conducted by the National Renewable Energy Laboratory (NREL) in collaboration with the S&C Electric Inc. through funding provided by the ESTCP. The project demonstrates use of cybersecure Automated Demand Response (ADR) technology to effectively manage microgrid loads during grid-independent, also known as "islanded," operation. When military microgrids become isolated from the main electrical grid, they are required to balance electricity supply and demand locally. Given that local generation may be constrained, the prevailing strategy involves shedding all but the most critical loads by tripping smart circuit breakers, which then necessitate manual resetting. This approach is generally implemented at the building level, which means that the buildings with mission-critical activities are exempt from load management and remain fully powered, whereas those deemed non-critical can experience a complete loss of service. In this research we developed a method that allows building automation systems to selectively control their assets in response to load shedding request from a microgrid controller, avoiding total loss of service in contrast to the conventional control approach. A commercial OpenADR client server by GridFabric is used for communication between the microgrid controller and the building management system (BMS). The microgrid controller monitors both generation capacity and various assets within the microgrid and issues a demand reduction request when necessary. This request is communicated to the OpenADR server via Modbus. Upon receiving the request, the OpenADR server forwards it to the BMS utilizing the OpenADR protocol. The BMS is pre-configured with various levels of load reduction strategies based on the controllable assets available, allowing for a nuanced approach to demand reduction. Both lab and field tests were performed that considered load shedding needed to achieve closed transition into island mode and to accommodate changing loads and power source availability while islanded. A commercial microgrid controller was used for these tests with normal programming within the expected constraints of the system capabilities. That is, the solution did not require any specialized modification to the code base of the controller. Given the latency of the round-trip communication path between the microgrid controller and the various devices involved with the load shed processes, there are certain scenarios for which the demonstrated solution are appropriate and some which are not. The methods described in this report can be used for load shedding/restoration during transitions between islanded and grid-tied modes of operation, as well as accommodating normal variations in load and the need to remove a power source from operation for maintenance. These methods should not be used for scenarios that require load shedding within a second or two such as sudden and unanticipated significant load increases or loss of power sources through equipment faults.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Detecting Short Circuits: Post Accident Electric Vehicle Battery Safety Check

Fast and accurate detection of soft short circuits (SCs) in the battery packs of damaged electric vehicles is needed by first responders and mechanics to mitigate the potential risk from battery fires that may occur hours, days, or weeks after an accident. Here, this paper presents an SC-detection algorithm for potentially damaged lithium-ion batteries that works quickly and without a priori knowledge of the battery-pack chemistry, capacity, state of charge, or state of health. The proposed universal SC-detection algorithm is designed to be implemented on an inexpensive handheld device that can connect to and monitor the voltages of all cells in a pack. Transient filtering and linear-quadratic state observation provide estimates of normalized SC current for every cell in the pack. Cells with SC-current estimates outside a sigma-based threshold are detected. Simulations, experiments, and electric vehicle (EV) crash data are used to verify the speed, sensitivity, and accuracy of the method, demonstrating 96% accurate detection of 0.0027 C SCs in under 1 h for 5S cell groups in the lab and no false positives for crashed Volkswagen, Chevrolet, and Tesla vehicles without SCs.

25 - ENERGY STORAGE↗