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At least 217 records · Page 12

Preemptive cache management policies for processing units

A processing system includes at least one central processing unit (CPU) core, at least one graphics processing unit (GPU) core, a main memory, and a coherence directory for maintaining cache coherence. The at least one CPU core receives a CPU cache flush command to flush cache lines stored in cache memory of the at least one CPU core prior to launching a GPU kernel. The coherence directory transfers data associated with a memory access request by the at least one GPU core from the main memory without issuing coherence probes to caches of the at least one CPU core.

Kayiran, Onur↗

Efficient thermo-mechanical simulation approaches for arc-and-wire based additive manufacturing

This study aims at the thermo-mechanical features inherent with the arc and wire metal deposition process to advance the structural simulation of additive manufacturing. Simulation approaches including iterative substructure method (ISM), dynamic mesh refining method (DMRM), and graphics processing unit (GPU) based explicit FEM code (GPU code) were developed for accelerating stress analysis and compared in terms of efficiency and accuracy. ISM and DMRM both take advantage of the strong nonlinearity phenomenon near the moving heat source, by reducing the global iterations and refining the local mesh respectively. The explicit FEM code was accelerated by a mass scaling technique based on the inherent strain concept. Two large parts by wire and arc additive manufacturing were analyzed, and the numerical results agreed very well with each other. The predicted distortion and residual stresses in the deposited layers were validated by experimental measurement. Compared with commercial software ABAQUS, the novel approaches reduced the computation cost substantially without compromising on accuracy. GPU code shows the highest computation efficiency (x30~70), while DMRM and ISM has an acceleration factor of x9 and x3 respectively. Owing to the minimum model simplification, such advanced simulation approaches will be very useful for structural analysis of additive manufacturing with complex deposition paths and product geometry.

Huang, Hui↗

Method and apparatus for temperature and voltage management control

A method and apparatus for managing processing power determine a supply voltage to supply to a processing unit, such as a central processing unit (CPU) or graphics processing unit (GPU), based on temperature inversion based voltage, frequency, temperature (VFT) data. The temperature inversion based VFT data includes supply voltages and corresponding operating temperatures that cause the processing unit's transistors to operate in a temperature inversion region. In one example, the temperature inversion based VFT data includes lower supply voltages and corresponding higher temperatures in a temperature inversion region of a processing unit. The temperature inversion based VFT data is based on an operating frequency of the processing unit. The apparatus and method adjust a supply voltage to the processing unit based on the temperature inversion based VFT data.

42 ENGINEERING↗

Apparatus and method for providing workload distribution of threads among multiple compute units

In some examples, thermal aware optimization logic determines a characteristic (e.g., a workload or type) of a wavefront (e.g., multiple threads). For example, the characteristic indicates whether the wavefront is compute intensive, memory intensive, mixed, and/or another type of wavefront. The thermal aware optimization logic determines temperature information for one or more compute units (CUs) in one or more processing cores. The temperature information includes predictive thermal information indicating expected temperatures corresponding to the one or more CUs and historical thermal information indicating current or past thermal temperatures of at least a portion of a graphics processing unit (GPU). The logic selects the one or more compute units to process the plurality of threads based on the determined characteristic and the temperature information. The logic provides instructions to the selected subset of the plurality of CUs to execute the wavefront.

Rao, Karthik↗

Apparatus and method for providing workload distribution of threads among multiple compute units

In some examples, thermal aware optimization logic determines a characteristic (e.g., a workload or type) of a wavefront (e.g., multiple threads). For example, the characteristic indicates whether the wavefront is compute intensive, memory intensive, mixed, and/or another type of wavefront. The thermal aware optimization logic determines temperature information for one or more compute units (CUs) in one or more processing cores. The temperature information includes predictive thermal information indicating expected temperatures corresponding to the one or more CUs and historical thermal information indicating current or past thermal temperatures of at least a portion of a graphics processing unit (GPU). The logic selects the one or more compute units to process the plurality of threads based on the determined characteristic and the temperature information. The logic provides instructions to the selected subset of the plurality of CUs to execute the wavefront.

Rao, Karthik↗

Investigation of Portable Event-Based Monte Carlo Transport Using the NVIDIA Thrust Library

Power consumption considerations are driving future high performance computing platforms toward many-core computing architectures. Los Alamos National Laboratory's Trinity machine, available in 2016, will use both Intel Xeon Haswell processors and Intel Xeon Phi Knights Landing many integrated core (MIC) architecture coprocessors. Lawrence Livermore National Laboratory's Sierra machine, available in 2018, will use an IBM PowerPC architecture along with Nvidia graphics processing unit (GPU) architecture accelerators. These different advanced architectures make the computing landscape in upcoming years complex. Traditional approaches to Monte Carlo transport do not work efficiently on these new computing platforms. MIC architectures require vectorization to operate efficiently, and vectorization is difficult to achieve in Monte Carlo transport. GPU architectures require additional code to explicitly use the hardware, requiring significant code changes or hardware specific branches in the source code. A significant challenge for Monte Carlo transport projects is to simultaneously support within a single source code base efficient simulations for both the current generation of architectures and the different advanced computing architectures. In order to address these challenges, two important changes are typically required: a new algorithmic approach for solving Monte Carlo transport, and explicit use of hardware specific software. In this paper, we describe initial research investigations of an event-based Monte Carlo transport algorithm implemented using the Nvidia Thrust library on a GPU for a Monte Carlo test code. The event-based algorithm targets many-core architectures by increasing SIMD (single instruction multiple data) parallelism, while Thrust potentially provides portable performance by allowing one source code base to compile code targeted for both CPUs and GPUs. We described preliminary investigations of portable event-based Monte Carlo algorithms implemented using the Nvidia Thrust library in a research Monte Carlo test code. We found that an explicit CUDA implementation of an event-based Monte Carlo algorithm performed significantly more efficiently than a Thrust implementation on GPU platforms, most likely as a result of additional flexibility in access to different memory spaces on the GPU. Additionally, we showed that on GPU platforms and at large enough problem sizes the event-based implementations perform more efficiently than the serial history-based implementation running on the host CPU. While investigating this problem, we also discovered that the performance of the event-based algorithm is affected by what tallies are being used. A zonal scalar flux tally requires atomic operations that significantly impacted the performance of the code, in some cases producing slowdowns instead of speedups. We decided to remove the tally in order to focus on the effectiveness of the event-based algorithm. Future work will be required to research more effective ways of handling such tallies. Additionally, we would like to consider new ways for optimizing both the Thrust and CUDA versions, in order to see how much performance we have yet to achieve. The potential trade-off between portability and performance was demonstrated in this investigation. Thrust provides both CPU and GPU versions of the code in one code base, but it does so at a cost. We discovered approximately a factor of 2-5 performance difference between Thrust and CUDA on each GPU platform we tested. Thrust provides a tool to access the GPUs with less effort and specialization, but it does so by giving up fine grained control where extra performance can be found for this application. Future work will be required to determine whether this performance differential between Thrust and CUDA can be reduced for event-based Monte Carlo transport. (authors)

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗

Development of ARCHER towards clinical use: modeling and simulation of Varian Linac for radiation therapy dose calculations - 25449

Monte Carlo particle transport methods are well recognized as the most accurate approach to dose calculations for radiation therapy treatment planning. However, the lengthy calculation time has prevented Monte Carlo methods from being applied to dose calculations in the planning of radiation therapy. Recently, the emerging parallel computing hardware accelerators, such as general-purpose Graphics Processing Unit (GPU), have significantly boosted the performance of Monte Carlo codes. The accuracy of a clinical dose engine depends greatly on the accuracy of source term modeling and the methodology of dose calculations. Hence, in this study, an efficient and accurate source model of the Varian TrueBeam{sup R} Linac is developed and integrated with a fast photon-electron transport module of the recently developed high-performance Monte Carlo code, ARCHER. The validity of the source model and the particle transport physics are verified with established dose calculation codes such as EGSnrc and validated with experimental measurements. To demonstrate the capability of the platform in clinical applications, three clinical treatment plans (the lung, breast, and prostate) are simulated and analyzed. From the perspective of performance, the entire simulation of each clinical plan, starting from the source modeling to the end of particle transport within the patient phantom, can be finished in less than one minute using a single Titan X GPU card with 1% statistical error. In comparison, the same cases take the EGSnrc code hundreds of CPU hours to finish. The results suggest that this new version of ARCHER code has been successfully developed and tested as a clinically deployable dose engine for external photon beam IMRT plans in the clinical setting. (authors)

61 RADIATION PROTECTION AND DOSIMETRY↗

Software engineering to sustain a high-performance computing scientific application: QMCPACK

We provide an overview of the software engineering efforts and their impact in QMCPACK, a production-level ab-initio Quantum MonteCarlo open-source code targeting high-performance computing (HPC) systems. Aspects included are: (i) strategic expansion ofcontinuous integration (CI) targeting CPU, using GitHub Actions runners, and graphics processing units (GPU) in pre-exascalesystems, using self-hosted hardware; (ii) incremental reduction of memory leaks using sanitizers, (iii) incorporation of Dockercontainers for CI and reproducibility, and (iv) refactoring efforts to improve maintainability, testing coverage, and memory lifetime management. We quantify the value of these improvements by providing metrics to illustrate the shift towards a predictive, rather than reactive, sustainable maintenance approach. Our goal, in documenting the impact of these efforts on QMCPACK, is to contribute to the body of knowledge on the importance of research software engineering (RSE) for the sustainability of community HPC codes and scientific discovery at scale.

Godoy, William↗

Comparisons of dosimetric accuracy and calculation time of ARCHER and MCNP5 codes for the Ir-192 brachytherapy case - Paper 1

In the last decade, the graphics processing unit (GPU) technology has emerged as a viable player in high-performance computing. A GPU card is designed to carry out thousands of single instructions simultaneously, showing unprecedented computing power when compared with the traditional CPU technology. It has been proved that some computationally intensive programs can be accelerated drastically on the GPUs including Monte Carlo simulations. Unfortunately, existing production Monte Carlo codes cannot be easily ported to the GPU environment. To address the needs, a new Monte Carlo code ARCHER (Accelerated Radiation-transport Computations in Heterogeneous Environment) is being developed at Rensselaer Polytechnic Institute, employing the latest GPU and the Intel Xeon Phi coprocessor technologies. We can execute the code which was written using C and C++ on both CPU and GPU platforms. The ARCHER GPU code was written in CUDA C 5.0 and was tested on the Tesla M2090. There have been a few studies testing the ARCHER GPU code on several different platforms. In particular, Su et al has tested the ARCHER for external-beam radiation treatment 20 MeV monoenergetic monodirectional parallel electron beam. The comparison of the calculation results between EGSnrc and ARCHERGPU was impressive. A remarkable 224- fold speed-up factor was obtained using a NVIDIA Tesla M2090 GPU compared to a CPU. In this study, we applied the ARCHER code to dose calculation for a relatively new procedure, called accelerated partial breast irradiation (APBI) brachytherapy. The APBI brachytherapy dose calculation was based on RPI-AF phantom which is a 3D heterogeneous patient model. We then compared the dosimetric accuracy and calculation times of ARCHER and MCNP5 to gain insight into the accuracy and speedup of the GPU-based ARCHER code. (authors)

61 RADIATION PROTECTION AND DOSIMETRY↗

Efficient Anomaly Detection Driven By Different Machine Learning Architectures And Models

The rapid growth and ubiquitous adoption of the internet and cyber-physical systems (CPS) have fundamentally transformed modern communication, work, and human-system interactions. While networks now form the backbone of critical digital ecosystems, enabling seamless data transmission across diverse, interconnected systems, this increased connectivity also expands the attack surface, making real-time detection of network intrusions and anomalies a pressing challenge. Detecting unusual activities within network infrastructure requires advanced data traffic analysis to differentiate between legitimate and malicious interactions. Traditional approaches to network anomaly detectionâ??such as rule-based and signature-based systemsâ??often depend on predefined patterns to identify known anomalies, limiting their effectiveness against emerging, stealthy, or previously unseen threats. These conventional methods suffer from high false alarm rates and fail to adapt to the ever-evolving nature of network traffic, particularly in large-scale, decentralized environments where data volume, velocity, and variety are constantly increasing. This dissertation presents artificial intelligence (AI)-driven approaches to anomaly detection that leverage graphics processing unit (GPU)-enabled high-performance computing (HPC) platforms for processing massive network traffic data and monitoring the components of cyber-physical systems (CPS) for potentially hazardous conditions. The research advances several key contributions: (1) Designing efficient machine learning techniques for CPS condition monitoring and anomaly detection; (2) enabling federated learning (FL) frameworks that enable distributed detection while preserving data privacy and system resilience; (3) exploring graph-based methodologies combining graph neural networks (GNN) and graph machine learning (ML) approaches for the Internet of Things (IoT) and automotive network security, and (4) performing distributed edge computing optimizations that integrate FL with scalable technologies for reduced communication overhead. Through extensive experiments, these methodologies demonstrate that complex anomaly detection and condition monitoring tasks can be achieved while balancing computational efficiency and detection accuracy through fine-grained network information processing. The frameworks developed in this research establish a robust foundation for network anomaly detection, providing scalable, adaptive, and privacy-preserving solutions for safeguarding CPS and IoT networks in an increasingly interconnected digital landscape. The practical implications of these research findings are significant, as they can inform the development of next-generation network security systems and contribute to the protection of critical infrastructure against sophisticated cyber attacks.

Marfo, William↗

Apparatus and method for implementing power saving techniques when processing floating point values

An apparatus and method are described for reducing power when reading and writing graphics data. For example, one embodiment of an apparatus comprises: a graphics processor unit (GPU) to process graphics data including floating point data; a set of registers, at least one of the registers of the set partitioned to store the floating point data; and encode/decode logic to reduce a number of binary 1 values being read from the at least one register by causing a specified set of bit positions within the floating point data to be read out as 0s rather than 1s.

97 MATHEMATICS AND COMPUTING↗

Leaky Buddies: Cross-Component Covert Channels on Integrated CPU-GPU Systems

Graphics Processing Units (GPUs) are ubiquitous components used across the range of today’s computing plat- forms, from phones and tablets, through personal computers, to high-end server class platforms. With the increasing importance of graphics and video workloads, recent processors are shipped with GPU devices that are integrated on the same chip. Integrated GPUs share some resources with the CPU and as a result, there is a potential for microarchitectural attacks from the GPU to the CPU or vice versa. We consider the potential for covert channel attacks that arise either from shared microarchitectural components (such as caches) or through shared contention domains (e.g., shared buses). We illustrate these two types of channels by developing two reliable covert channel attacks. The first covert channel uses the shared LLC cache in Intel’s integrated GPU architectures. The second is a contention based channel targeting the ring bus connecting the CPU and GPU to the LLC. This is the first demonstrated microarchitectural attack crossing the component boundary (GPU to CPU or vice versa). Cross-component channels introduce a number of new challenges that we had to overcome since they occur across heterogeneous components that use different computation models and are interconnected using asymmetric memory hierarchies. We also exploit GPU parallelism to increase the bandwidth of the communication, even without relying on a common clock. The LLC based channel achieves a bandwidth of 120 kbps with a low error rate of 2%, while the contention based channel delivers up to 400 kbps with a 0.8% error rate. We also demonstrate a proof- of-concept prime-and-probe side channel attack that probes the full LLC from the GPU.

Cyber secruity, high performance comptuing, Hetero↗

Brookhaven Lab Hosts Hackathon Focused on Graphics Processing Units (GPUs)

For five days in June 2017, Brookhaven Lab’s Computational Science Initiative hosted “Brookathon”—a programming workshop where teams of researchers, students, and software developers worked with mentors to accelerate scientific applications on GPUs for high-performance computing.

97 MATHEMATICS AND COMPUTING↗

Vidyut3d: A GPU accelerated fluid solver for non-equilibrium plasmas on adaptive grids

We present the numerical methods, programming methodology, verification, and performance assessment of a non-equilibrium plasma fluid solver that can effectively utilize current and upcoming central processing and graphics processing unit (CPU+GPU) architectures, in this work. Our plasma fluid model solves the coupled conservation equations for species transport, electrostatic Poisson and electron temperature on adaptive Cartesian grids. Our solver is written using performance portable adaptive-grid/particle management library, AMReX, and is portable over widely available vendor specific GPU architectures. We present verification of our solver using method of manufactured solutions that indicate formal second order accuracy with central diffusion and fifth-order weighted-essentially-non-oscillatory (WENO) advection scheme. We also verify our solver with published literature on capacitive discharges and atmospheric pressure streamer propagation. We demonstrate the use of our solver on two 3D simulation cases: an atmospheric streamer propagation in Ar-H2 mixtures and a low pressure three-electrode radio frequency reactor. Our performance studies on three different CPU+GPU architectures indicate ~ 150-400X speed-up using AMD and NVIDIA GPUs per time step compared to a single CPU core for a 4 million cell simulation with 15 species.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

A Survey Of Techniques for Managing and Leveraging Caches in GPUs

Initially introduced as special-purpose accelerators for graphics applications, graphics processing units (GPUs) have now emerged as general purpose computing platforms for a wide range of applications. To address the requirements of these applications, modern GPUs include sizable hardware-managed caches. However, several factors, such as unique architecture of GPU, rise of CPU–GPU heterogeneous computing, etc., demand effective management of caches to achieve high performance and energy efficiency. Recently, several techniques have been proposed for this purpose. In this paper, we survey several architectural and system-level techniques proposed for managing and leveraging GPU caches. We also discuss the importance and challenges of cache management in GPUs. The aim of this paper is to provide the readers insights into cache management techniques for GPUs and motivate them to propose even better techniques for leveraging the full potential of caches in the GPUs of tomorrow.

cache memory↗

Vidyut3d: A Gpu Accelerated Fluid Solver for Non-Equilibrium Plasmas on Adaptive Grids

We present the numerical methods, programming methodology, verification, and performance assessment of a non-equilibrium plasma fluid solver that can effectively utilize current and upcoming central processing and graphics processing unit (CPU+GPU) architectures, in this work. Our plasma fluid model solves the coupled conservation equations for species transport, electrostatic Poisson and electron temperature on adaptive Cartesian grids. Our solver is written using performance portable adaptive-grid/particle management library, AMReX, and is portable over widely available vendor specific GPU architectures. We present verification of our solver using method of manufactured solutions that indicate formal second order accuracy with central diffusion and fifth-order weighted-essentially-non-oscillatory (WENO) advection scheme. We also verify our solver with published literature on capacitive discharges and atmospheric pressure streamer propagation. We demonstrate the use of our solver on two 3D simulation cases: an atmospheric streamer propagation in Ar-H2 mixtures and a low pressure twin electrode radio frequency reactor. Our performance studies on three different CPU+GPU architectures indicate approximately 150-400X speed-up using AMD and NVIDIA GPUs per time step compared to a single CPU core for a 4 million cell simulation with 15 species.

Sitaraman, Hariswaran↗

Large-Scale Welding Process Simulation by GPU Parallelized Computing

The computational design of industrially relevant welded structures is extremely time consuming due to coupled physics and high nonlinearity. Previously, most welding distortion and residual stress simulations have been limited to small coupons and reduced order (from three-dimensional [3D] to two-dimensional [2D]), or inherent strain approximations were used for large structures. In this current study, an explicit finite element code based on a graphics processing unit was utilized to perform 3D transient thermomechanical simulation of structural components during welding. Laser brazing of aluminum alloy panels as representative of automotive manufacturing scenarios was simulated to predict out-of-plane distortion under different clamping conditions. The predicted deformation pattern and magnitude were validated by laser scanning data of physical assemblies. In addition, the code was used to investigate residual stresses developed during multipass arc welding of a nuclear industry pressurizer surge nozzle and subsequent welding repair where a 3D simulation was necessary. Taking the experimental data as reference, the 3D model predicted better residual stress distribution than a typical 2D asymmetrical model. Stress evolution in welding repair was also presented and discussed in this study. Furthermore, the efficient numerical model made it feasible to use integrated computational welding engineering to simulate welding processes for large-scale structures.

97 MATHEMATICS AND COMPUTING↗