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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 217 records · Page 12
All sourcesNASA NTRSDOE OSTI
DOE OSTI2015

Impact of total ionizing dose irradiation on Pt/SrBi{sub 2}Ta{sub 2}O{sub 9}/HfTaO/Si memory capacitors

In this work, metal-ferroelectric-insulator-semiconductor (MFIS) structure capacitors with SrBi{sub 2}Ta{sub 2}O{sub 9} (300 nm) as ferroelectric thin film and HfTaO (6 nm, 8 nm, 10 nm, and 12 nm) as insulating buffer layer were proposed and investigated. The prepared capacitors were fabricated and characterized before radiation and then subjected to {sup 60}Co gamma irradiation in steps of two dose levels. Significant irradiation-induced degradation of the electrical characteristics was observed. The radiation experimental results indicated that stability and reliability of as-fabricated MFIS capacitors for nonvolatile memory applications could become uncontrollable under strong irradiation dose and/or long irradiation time.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2015

Simulation of electron transmittance and tunnel current in n{sup +} Poly-Si/HfSiO{sub x}N/Trap/SiO{sub 2}/Si(100) capacitors using analytical and numerical approaches

In this paper, we discuss the electron transmittance and tunneling current in high-k-based-MOS capacitors with trapping charge by including the off-diagonal effective-mass tensor elements and the effect of coupling between transverse and longitudinal energies represented by an electron velocity in the gate. The HfSiO{sub x}N/SiO{sub 2} dual ultrathin layer is used as the gate oxide in an n{sup +} poly- Si/oxide/Si capacitor to replace SiO{sub 2}. The main problem of using HfSiO{sub x}N is the charge trapping formed at the HfSiO{sub x}N/SiO{sub 2} interface that can influence the performance of the device. Therefore, it is important to develop a model taking into account the presence of electron traps at the HfSiO{sub x}N/SiO{sub 2} interface in the electron transmittance and tunneling current. The transmittance and tunneling current in n{sup +} poly- Si/HfSiO{sub x}N/trap/SiO2/Si(100) capacitors are calculated by using Airy wavefunctions and a transfer matrix method (TMM) as analytical and numerical approaches, respectively. The transmittance and tunneling current obtained from the Airy wavefunction are compared to those computed by the TMM. The effects of the electron velocity on the transmittance and tunneling current are also discussed.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

Iodine encapsulation in CNTs and its application for electrochemical capacitor

We report the experimental results for new type electrochemical capacitor using iodine redox reaction in single-walled carbon nanotubes (SWCNTs). It was found that the energy density of the present redox capacitor using SWCNTs is almost three times larger than that of the normal electric double layer capacitor.

77 NANOSCIENCE AND NANOTECHNOLOGY↗
DOE OSTI2016

Fabrication of PVDF-TrFE based bilayered PbTiO{sub 3}/PVDF-TrFE films capacitor

Development of high performance capacitor is reaching towards new generation where the ferroelectric materials take places as the active dielectric layer. The motivation of this study is to produce high capacitance device with long life cycle. This was configured by preparing bilayered films where lead titanate as an active dielectric layer and stacked with the top dielectric layer, poly(vinyledenefluoride-trifluoroethylene). Both of them are being referred that have one in common which is ferroelectric behavior. Therefore the combination of ceramic and polymer ferroelectric material could perform optimum dielectric characteristic for capacitor applications. The fabrication was done by simple sol-gel spin coating method that being varied at spinning speed property for polymer layers, whereas maintaining the ceramic layer. The characterization of PVDF-TrFE/PbTiO3 was performed according to metal-insulator-metal stacked capacitor measurement which includes structural, dielectric, and ferroelectric measurement.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2016

High capacitance density MIS capacitor using Si nanowires by MACE and ALD alumina dielectric

High capacitance density three-dimensional (3D) metal-insulator-semiconductor (MIS) capacitors using Si nanowires (SiNWs) by metal-assisted chemical etching and atomic-layer-deposited alumina dielectric film were fabricated and electrically characterized. A chemical treatment was used to remove structural defects from the nanowire surface, in order to reduce the density of interface traps at the Al{sub 2}O{sub 3}/SiNW interface. SiNWs with two different lengths, namely, 1.3 μm and 2.4 μm, were studied. A four-fold capacitance density increase compared to a planar reference capacitor was achieved with the 1.3 μm SiNWs. In the case of the 2.4 μm SiNWs this increase was ×7, reaching a value of 4.1 μF/cm{sup 2}. Capacitance-voltage (C-V) measurements revealed that, following a two-cycle chemical treatment, frequency dispersion at accumulation regime and flat-band voltage shift disappeared in the case of the 1.3 μm SiNWs, which is indicative of effective removal of structural defects at the SiNW surface. In the case of the 2.4 μm SiNWs, frequency dispersion at accumulation persisted even after the two-step chemical treatment. This is attributed to a porous Si layer at the SiNW tops, which is not effectively removed by the chemical treatment. The electrical losses of MIS capacitors in both cases of SiNW lengths were studied and will be discussed.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2016

GeO{sub x} interfacial layer scavenging remotely induced by metal electrode in metal/HfO{sub 2}/GeO{sub x}/Ge capacitors

The metal gate electrodes of Ni, W, and Pt have been investigated for their scavenging effect: a reduction of the GeO{sub x} interfacial layer (IL) between HfO{sub 2} dielectric and Ge substrate in metal/HfO{sub 2}/GeO{sub x}/Ge capacitors. All the capacitors were fabricated using the same process except for the material used in the metal electrodes. Capacitance-voltage measurements, scanning transmission electron microscopy, and electron energy loss spectroscopy were conducted to confirm the scavenging of GeO{sub x} IL. Interestingly, these metals are observed to remotely scavenge the interfacial layer, reducing its thickness in the order of Ni, W, and then Pt. The capacitance equivalent thickness of these capacitors with Ni, W, and Pt electrodes are evaluated to be 2.7 nm, 3.0 nm, and 3.5 nm, and each final remnant physical thickness of GeO{sub x} IL layer is 1.1 nm 1.4 nm, and 1.9 nm, respectively. It is suggested that the scavenging effect induced by the metal electrodes is related to the concentration of oxygen vacancies generated by oxidation reaction at the metal/HfO{sub 2} interface.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2015

Metal-HfO{sub 2}-Ge capacitor: Its enhanced charge trapping properties with S-treated substrate and atomic-layer-deposited HfO{sub 2} layer

The charge trapping properties of metal-HfO{sub 2}-Ge capacitor as a nonvolatile memory have been investigated with (NH{sub 4}){sub 2}S-treated Ge substrate and atomic-layer-deposited HfO{sub 2} layer. The interfacial layer generated by (NH{sub 4}){sub 2}S-treated Ge substrate reveals a trace of -S- bonding, very sharp interface edges, and smooth surface morphology. The Ru-HfO{sub 2}-Ge capacitor with (NH{sub 4}){sub 2}S-treated Ge substrate shows an enhanced interface state with little frequency dispersion, a lower leakage current, and very reliable properties with the enhanced endurance and retention than Ru-HfO{sub 2}-Ge capacitor with cyclic-cleaned Ge substrate.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
DOE OSTI2025

DC-Link Capacitor Design for a Neutral-Point-Less Three-Level Dual-Phase Inverter for Traction Application

Conventional multilevel inverters, such as neutral￾point-clamped and T-type inverters, have gained popularity in electric vehicle applications due to their advantages, including high voltage range, high power capability, low switching losses, low total harmonic distortion, and low electromagnetic interference. However, these traditional multilevel inverters require a neutral point connection to generate a zero-voltage vector. The neutral point current oscillates at three times the fundamental frequency, leading to voltage imbalance and overvoltage stress on the power modules. Additionally, the use of two stacked DC-link capacitors increases the volume required for the same overall capacitance and complicates packaging due to ripple current and heat dissipation from separate components. This is a significant concern for traction drive units, where space is limited. In this paper, a neutral-point-less multilevel dual three￾phase inverter topology is investigated for traction inverter applications. Simulation results demonstrate that the proposed topology effectively retains the benefits of multilevel operation while utilizing a single DC-link capacitor. The inverter model was simulated in conjunction with an industry-standard battery model to evaluate the potential for capacitor size reduction compared to a conventional three-level inverter.

33 ADVANCED PROPULSION SYSTEMS↗
DOE OSTI2022

Array of Graphene Variable Capacitors on 100 mm Silicon Wafers for Vibration-Based Applications

Highly flexible, electrically conductive freestanding graphene membranes hold great promise for vibration-based applications. This study focuses on their integration into mainstream semiconductor manufacturing methods. We designed a two-mask lithography process that creates an array of freestanding graphene-based variable capacitors on 100 mm silicon wafers. The first mask forms long trenches terminated by square wells featuring cone-shaped tips at their centers. The second mask fabricates metal traces from each tip to its contact pad along the trench and a second contact pad opposite the square well. A graphene membrane is then suspended over the square well to form a variable capacitor. The same capacitor structures were also built on 5 mm by 5 mm bare dies containing an integrated circuit underneath. We used atomic force microscopy, optical microscopy, and capacitance measurements in time to characterize the samples.

36 MATERIALS SCIENCE↗
NASA NTRS2012

Low Temperature Double-layer Capacitors with Improved Energy Density: An Overview of Recent Development Efforts

Electrochemical double-layer capacitors are finding increased use in a wide range of energy storage applications, particularly where high pulse power capabilities are required. Double-layer capacitors store charge at a liquid/solid interface, making them ideal for low temperature power applications, due to the facile kinetic processes associated with the rearrangement of the electrochemical double-layer at these temperatures. Potential low temperature applications include hybrid and electric vehicles, operations in polar regions, high altitude aircraft and aerospace avionics, and distributed environmental and structural health monitoring. State-of-the-art capacitors can typically operate to -40 C, with a subsequent degradation in power performance below room temperature. However, recent efforts focused on advanced electrolyte and electrode systems can enable operation to temperatures as low as -70 C, with capacities similar to room temperature values accompanied by reasonably low equivalent series resistances. This presentation will provide an overview of recent development efforts to extend and improve the wide temperature performance of these devices.

Supercapacitors↗
NASA NTRS2014

Evaluation of Ferrite Chip Beads as Surge Current Limiters in Circuits with Tantalum Capacitors

Limiting resistors are currently required to be connected in series with tantalum capacitors to reduce the risk of surge current failures. However, application of limiting resistors decreases substantially the efficiency of the power supply systems. An ideal surge current limiting device should have a negligible resistance for DC currents and high resistance at frequencies corresponding to transients in tantalum capacitors. This work evaluates the possibility of using chip ferrite beads (FB) as such devices. Twelve types of small size FBs from three manufacturers were used to evaluate their robustness under soldering stresses and at high surge current spikes associated with transients in tantalum capacitors. Results show that FBs are capable to withstand current pulses that are substantially greater than the specified current limits. However, due to a sharp decrease of impedance with current, FBs do not reduce surge currents to the required level that can be achieved with regular resistors.

surge current testing↗
NASA NTRS2015

Insulation Resistance Degradation in Ni-BaTiO3 Multilayer Ceramic Capacitors

Insulation resistance (IR) degradation in NiBaTiO3 multilayer ceramic capacitors has been characterized by the measurement of both time to failure (TTF) and direct current leakage current as a function of stress time under highly accelerated life test conditions. The measured leakage current time dependence data fit well to an exponential form, and a characteristic growth time tau (sub SD) can be determined. A greater value of tau (sub SD) represents a slower IR degradation process. Oxygen vacancy migration and localization at the grain boundary region results in the reduction of the Schottky barrier height and has been found to be the main reason for IR degradation in NiBaTiO3 capacitors. The reduction of barrier height as a function oftime follows an exponential relation of phi (t ) = phi (0) e (exp -2Kt), where 13 the degradation rate constant K Koe (Ek/kT) is inversely proportional to the mean TTF (MTTF) and can be determined using an Arrhenius plot. For oxygen vacancy electromigration, a lower barrier height phi (0) will favor a slow IR degradation process, but a lower phi (0) will also promote electronic carrier conduction across the barrier and decrease the IR. As a result, a moderate barrier height phi (0) (and therefore a moderate IR value) with a longer MTTF (smaller degradation rate constant K) will result in a minimized IR degradation process and the most improved reliability in NiBaTiO3 multilayer ceramic capacitors.

reliability↗
NASA NTRS2015

Random Vibration Testing of Advanced Wet Tantalum Capacitors

Advanced wet tantalum capacitors allow for improved performance of power supply systems along with substantial reduction of size and weight of the systems that is especially beneficial for space electronics. Due to launch-related stresses, acceptance testing of all space systems includes random vibration test (RVT). However, many types of advanced wet tantalum capacitors cannot pass consistently RVT at conditions specified in MIL-PRF-39006, which impedes their use in space projects. This requires a closer look at the existing requirements, modes and mechanisms of failures, specifics of test conditions, and acceptance criteria. In this work, different lots of advanced wet tantalum capacitors from four manufacturers have been tested at step stress random vibration conditions while their currents were monitored before, during, and after the testing. It has been shown that the robustness of the parts and their reliability are mostly due to effective self-healing processes and limited current spiking or minor scintillations caused by RVT do not increase the risk of failures during operation. A simple model for scintillations events has been used to simulate current spiking during RVT and optimize test conditions. The significance of scintillations and possible effects of gas generation have been discussed and test acceptance criteria for limited current spiking have been suggested.

cracking↗
NASA NTRS2015

Ni-BaTiO3-Based Base-Metal Electrode (BME) Ceramic Capacitors for Space Applications

A multi-layer ceramic capacitor (MLCC) is a high-temperature (1350C typical) co-fired ceramic monolithic that is composed of many layers of alternately stacked oxide-based dielectric and internal metal electrodes. To make the dielectric layers insulating and the metal electrode layers conducting, only highly oxidation-resistant precious metals, such as platinum, palladium, and silver, can be used for the co-firing of insulating MLCCs in a regular air atmosphere. MLCCs made with precious metals as internal electrodes and terminations are called precious-metal electrode (PME) capacitors. Currently, all military and space-level applications only address the use of PME capacitors.

Ceramic Capacitors↗
NASA NTRS2015

Random Vibration Testing of Advanced Wet Tantalum Capacitors

Advanced wet tantalum capacitors allow for improved performance of power supply systems along with substantial reduction of size and weight of the systems that is especially beneficial for space electronics. Due to launch-related stresses, acceptance testing of all space systems includes random vibration test (RVT). However, many types of advanced wet tantalum capacitors cannot pass consistently RVT at conditions specified in MIL-PRF-39006, which impedes their use in space projects. This requires a closer look at the existing requirements, modes and mechanisms of failures, specifics of test conditions, and acceptance criteria. In this work, different lots of advanced wet tantalum capacitors from four manufacturers have been tested at step stress random vibration conditions while their currents were monitored before, during, and after the testing. It has been shown that the robustness of the parts and their reliability are mostly due to effective self-healing processes and limited current spiking or minor scintillations caused by RVT do not increase the risk of failures during operation. A simple model for scintillations events has been used to simulate current spiking during RVT and optimize test conditions. The significance of scintillations and possible effects of gas generation have been discussed and test acceptance criteria for limited current spiking have been suggested.

cracking↗
NASA NTRS2015

Insulation Resistance Degradation in Ni-BaTiO3 Multilayer Ceramic Capacitors

Insulation resistance (IR) degradation in Ni-BaTiO3 multilayer ceramic capacitors has been characterized by the measurement of both time to failure and direct-current (DC) leakage current as a function of stress time under highly accelerated life test conditions. The measured leakage current-time dependence data fit well to an exponential form, and a characteristic growth time SD can be determined. A greater value of tau(sub SD) represents a slower IR degradation process. Oxygen vacancy migration and localization at the grain boundary region results in the reduction of the Schottky barrier height and has been found to be the main reason for IR degradation in Ni-BaTiO3 capacitors. The reduction of barrier height as a function of time follows an exponential relation of phi (𝑡)=phi (0)e(exp -2Κt), where the degradation rate constant 𝐾=𝐾o𝑒(𝐸𝑘/𝑘𝑇) is inversely proportional to the mean time to failure (MTTF) and can be determined using an Arrhenius plot. For oxygen vacancy electromigration, a lower barrier height phi(0) will favor a slow IR degradation process, but a lower phi(0) will also promote electronic carrier conduction across the barrier and decrease the insulation resistance. As a result, a moderate barrier height phi(0) (and therefore a moderate IR value) with a longer MTTF (smaller degradation rate constant 𝐾) will result in a minimized IR degradation process and the most improved reliability in Ni-BaTiO3 multilayer ceramic capacitors.

dielectric degradation↗
NASA NTRS2015

Random Vibration Testing of Advanced Wet Tantalum Capacitors

Advanced wet tantalum capacitors allow for improved performance of power supply systems along with substantial reduction of size and weight of the systems that is especially beneficial for space electronics. Due to launch-related stresses, acceptance testing of all space systems includes random vibration test (RVT). However, many types of advanced wet tantalum capacitors cannot pass consistently RVT at conditions specified in MIL-PRF-39006, which impedes their use in space projects. This requires a closer look at the existing requirements, modes and mechanisms of failures, specifics of test conditions, and acceptance criteria. In this work, different lots of advanced wet tantalum capacitors from four manufacturers have been tested at step stress random vibration conditions while their currents were monitored before, during, and after the testing. It has been shown that the robustness of the parts and their reliability are mostly due to effective self-healing processes and limited current spiking or minor scintillations caused by RVT do not increase the risk of failures during operation. A simple model for scintillations events has been used to simulate current spiking during RVT and optimize test conditions. The significance of scintillations and possible effects of gas generation have been discussed and test acceptance criteria for limited current spiking have been suggested.

wet tantalum capacitors↗
NASA NTRS2017

Susceptibility to Cracking of Different Lots of CDR35 Capacitors

On-orbit flight anomalies that occurred after several months of operation were attributed to excessive leakage currents in CDR35 style 0.47 microF 50 V capacitors operating at 10 V. In this work, a lot of capacitors similar to the lot that caused the anomaly have been evaluated in parallel with another lot of similar parts to assess their susceptibility to cracking under manual soldering conditions and get insight into a possible mechanism of failure. Leakage currents in capacitors were monitored at different voltages and environmental conditions before and after terminal solder dip testing that was used to simulate thermal shock during manual soldering. Results of cross-sectioning, acoustic microscopy, and measurements of electrical and mechanical characteristics of the parts have been analyzed, and possible mechanisms of failures considered. It is shown that the susceptibility to cracking and failures caused by manual soldering is lot-related. Recommendations for testing that would help to select lots that are more robust against manual soldering stresses and mitigate the risk of failures suggested.

cracking↗