Engineering Papers⌕ Search

SEARCH · Engineering Papers

Results for “receiver synchronization”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 199 records · Page 11

Bit synchronization of differentially detected MSK and GMSK

The filter-square bit synchronizer has been previously proposed and shown to give near optimum performance for coherent PSK systems. In this paper, the same bit synchronization scheme is analyzed for a differentially detected GMSK system. It is shown that the filter-square bit synchronizer can successfully work in a differential phase detection receiver. By making linear approximations appropriate for high loop signal-to-noise ratio operation (the usual case of interest in tracking), it is demonstrated that the mean-square bit sync jitter of differentially detected GMSK system reveals striking similarities both qualitatively and quantitatively in comparison with that of a coherent PSK system.

Simon, M. K.↗

Interleaver design for trellis-coded differential 8-PSK modulation with non-coherent detection

The effect of finite interleaver size on bit error rate (BER) performance of coded 8-DPSK is determined by means of computer simulations. The losses evaluated in this way include the SNR degradation due to the timing and frequency errors of the symbol synchronizer and the automatic frequency control (AFC) of the receiver. BER measurements are presented using a conventional 2/3 rate convolutional 8-state trellis-code for typical Rayleigh and Rician fading channels. It is shown that for a Rician channel with a Rician parameter of 7 dB, a Doppler spread of 100 Hz and a data rate of 2400 bps, an interleaver with size 16 x 16 symbols performs nearly as well as a very large interleaver. It is also shown that for very fast Rayleigh channels, the BER-curves flatten out at large SNR.

Edbauer, Franz↗

A functional description of the advanced receiver

The breadboard Advanced Receiver 2 (ARX 2) that is currently being built for future use in NASA's Deep Space Network (DSN) is described. The hybrid analog/digital receiver performs multiple functions including carrier, subcarrier, and symbol synchronization. Tracking can be achieved for residual, suppressed, or hybrid carriers and for both sinusoidal and square-wave subcarriers. Other functions such as time-tagged Doppler extraction and monitor/control are also discussed, including acquisition algorithms and lock-detection schemes. System requirements are specified and a functional description of the ARX 2 is presented. The various digital signal-processing algorithms used are also discussed and illustrated with block diagrams.

Hinedi, S.↗

NASA's next generation all-digital deep space network breadboard receiver

This paper describes the breadboard advanced receiver (ARX) that is currently being built for future use in NASA's deep space network (DSN). This receiver has unique requirements in having to operate with very weak signals from deep space probes and provide high quality telemetry and tracking data. The hybrid analog/digital receiver performs multiple functions including carrier, subcarrier and symbol synchronization. Tracking can be achieved for either residual, suppressed or hybrid carriers and for both sinusoidal and square wave subcarriers. System requirements are specified and a functional description of the ARX is presented. The various digital signal processing algorithms used are also discussed and illustrated with block diagrams. Other functions such as time tagged Doppler extraction and monitor/control are also discussed including acquisition algorithms and lock detection schemes.

Hinedi, Sami↗

Detecting faults in turbine generators

Turbine generator faults can be detected by receiving a current signal from the turbine generator, and synchronously sampling the current signal to obtain a set of current signal samples that are evenly spaced in the phase domain, in which phase differences between adjacent current signal samples in the set of current signal samples are substantially the same. The process includes generating a frequency spectrum of the current signal samples, identifying one or more excitations in the frequency spectrum, and detecting a fault in the turbine generator based on the one or more excitations in the frequency spectrum.

Qiao, Wei↗

Current Trend Towards Using Soft Computing Approaches to Phase Synchronization in Communication Systems

This paper surveys recent advances in communications that utilize soft computing approaches to phase synchronization. Soft computing, as opposed to hard computing, is a collection of complementary methodologies that act in producing the most desirable control, decision, or estimation strategies. Recently, the communications area has explored the use of the principal constituents of soft computing, namely, fuzzy logic, neural networks, and genetic algorithms, for modeling, control, and most recently for the estimation of phase in phase-coherent communications. If the receiver in a digital communications system is phase-coherent, as is often the case, phase synchronization is required. Synchronization thus requires estimation and/or control at the receiver of an unknown or random phase offset.

Drake, Jeffrey T.↗

Word and frame synchronization with verification for PPM optical communications

A method for obtaining word and frame synchronization in pulse position modulated optical communication systems is described. The method uses a short sync sequence inserted at the beginning of each data frame and a verification procedure to distinguish between inserted and randomly occurring sequences at the receiver. This results in an easy to implement sync system which provides reliable synchronization even at high symbol error rates. Results are given for the application of this approach to a highly energy efficient 256-ary PPM test system.

Marshall, William K.↗

Sampling synchronization through GPS signals

A method uses a distributed data acquisition system with multiple, physically unconnected, data acquisition units, that can be in wireless communication with a remote host, to timestamp measurement data with sub-microsecond time base accuracy of sampling clock relative to an absolute timeframe. A current absolute time is derived from messages received from a satellite radio beacon positioning system (GPS). Measurement data is sampled by each unit at a specified sampling rate. Using hardware logic, batches of sampled data are associated with corresponding timestamps representing the absolute time at which the data was sampled. Data and timestamps may be transmitted to the host. A time offset bias is compensated by comparing timestamps against a nominal time based on start time and nominal sampling rate. The sampling clock rate may be disciplined using time pulses from the GPS receiver. An initial start of data sampling by all units can also be synchronized.

Zhuge, James Q.↗

Time synchronization via the transit satellite at Mizusawa

Time signals emitted from Transit satellites and received by the NAVICODE type receiver at Mizusawa, Japan are presented. The International Latitude Observatory of Mizusawa and the U. S. Naval Observatory were compared using the time signals. Propagation delays, a receiver delay, effects of relative motion of satellites, and effects of the ionosphere are discussed.

Hara, J.↗

Multi-purpose γ-Ray Interface to Auxiliary Detectors (MyRIAD) User Manual

The MyRIAD (Multipurpose γ-Ray Interface to Auxiliary Detectors) module provides a general-purpose interface to allow other detector systems that work in concert with the digital data acquisition (DAQ) sytems of Digital Gammasphere (DGS) and GRETINA to receive the timestamp and triggering information from those systems to synchronize the data acquisition system of an auxiliary detector used in concert with these large detector arrays. Additionally the MyRIAD may be used to transmit time-stamped trigger messages from the auxiliary detector to the main system so that the main system may filter its event readout based upon the presence or absence of a local trigger in the auxiliary detector. Finally, the MyRIAD provides signal interface capabilities designed to allow legacy CAMAC-based detector DAQ systems to be directly controlled and interfaced by the DAQ system of DGS or GRETINA.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗

Digital receiver study and implementation

Computer software was developed which makes it possible to use any general purpose computer with A/D conversion capability as a PSK receiver for low data rate telemetry processing. Carrier tracking, bit synchronization, and matched filter detection are all performed digitally. To aid in the implementation of optimum computer processors, a study of general digital processing techniques was performed which emphasized various techniques for digitizing general analog systems. In particular, the phase-locked loop was extensively analyzed as a typical non-linear communication element. Bayesian estimation techniques for PSK demodulation were studied. A hardware implementation of the digital Costas loop was developed.

Fogle, D. A.↗

Flight and ground tests of a GOES satellite time receiver for satellite communications applications

A satellite time receiver was tested in various environmental conditions during the past year. The commercial receiver designed to work with the National Oceanic and Atmospheric Administration's (NOAA) Geostationary Operational Environmental Satellites (GOES). The test program included operation at low elevation during flight in a military cargo aircraft and long term comparison with laboratory standards. The GOES satellite time receiver offers an opportunity to provide easy wide area coverage synchronization at low cost.

Swanson, R. L.↗

Integrated Performance of Next Generation High Data Rate Receiver and AR4JA LDPC Codec for Space Communications

Low-density parity-check (LDPC) codes are the state-of-the-art in forward error correction (FEC) technology that exhibits capacity approaching performance. The Jet Propulsion Laboratory (JPL) has designed a family of LDPC codes that are similar in structure and therefore, leads to a single decoder implementation. The Accumulate-Repeat-by-4-Jagged- Accumulate (AR4JA) code design offers a family of codes with rates 1/2, 2/3, 4/5 and lengths 1024, 4096, 16384 information bits. Performance is less than one dB from capacity for all combinations.Integrating a stand-alone LDPC decoder with a commercial-off-the-shelf (COTS) receiver faces additional challenges than building a single receiver-decoder unit from scratch. In this work, we outline the issues and show that these additional challenges can be over-come by simple solutions. To demonstrate that an LDPC decoder can be made to work seamlessly with a COTS receiver, we interface an AR4JA LDPC decoder developed on a field-programmable gate array (FPGA) with a modern high data rate receiver and mea- sure the combined receiver-decoder performance. Through optimizations that include an improved frame synchronizer and different soft-symbol scaling algorithms, we show that a combined implementation loss of less than one dB is possible and therefore, most of the coding gain evidence in theory can also be obtained in practice. Our techniques can benefit any modem that utilizes an advanced FEC code.

Cheng, Michael K.↗

A comparison of Manchester symbol tracking loops for block 5 applications

The linearized tracking errors of three Manchester (biphase coded) symbol tracking loops are compared to determine which is appropriate for Block 5 receiver applications. The first is a nonreturn to zero (NRZ) symbol synchronizer loop operating at twice the symbol rate (NRZ x 2) so that it operates on half symbols. The second near optimally processes the mid-symbol transitions and ignores the between symbol transitions. In the third configuration, the first two approaches are combined as a hybrid to produce the best performance. Although this hybrid loop is the best at low symbol signal to noise ratios (SNRs), it has about the same performance as the NRZ x 2 loop at higher SNRs (greater than 0-dB E sub s/N sub 0). Based on this analysis, it is tentatively recommended that the hybrid loop be implemented for Manchester data in the Block 5 receiver. However, the high data rate case and the hardware implications of each implementation must be understood and analyzed before the hybrid loop is recommended unconditionally.

Holmes, J. K.↗

Phase ambiguity resolution for offset QPSK modulation systems

A demodulator for Offset Quaternary Phase Shift Keyed (OQPSK) signals modulated with two words resolves eight possible combinations of phase ambiguity which may produce data error by first processing received I(sub R) and Q(sub R) data in an integrated carrier loop/symbol synchronizer using a digital Costas loop with matched filters for correcting four of eight possible phase lock errors, and then the remaining four using a phase ambiguity resolver which detects the words to not only reverse the received I(sub R) and Q(sub R) data channels, but to also invert (complement) the I(sub R) and/or Q(sub R) data, or to at least complement the I(sub R) and Q(sub R) data for systems using nontransparent codes that do not have rotation direction ambiguity.

Nguyen, Tien M.↗

Uncertainty Error Modeling for Non-Linear State Estimation With Unsynchronized SCADA and µPMU Measurements

Distribution systems of the future smart grid require enhancements to the reliability of distribution system state estimation (DSSE) in the face of low measurement redundancy, unsynchronized measurements, and dynamic load profiles. Micro phasor measurement units (µPMUs) facilitate co-synchronized measurements with high granularity, albeit at an often prohibitively expensive installation cost. Supervisory control and data acquisition (SCADA) measurements can supplement µPMU data, although they are received at a slower sampling rate. Further complicating matters is the uncertainty associated with load dynamics and unsynchronized measurements–not only are the SCADA and µPMU measurements not synchronized with each other, but the SCADA measurements themselves are received at different time intervals with respect to one another. This paper proposes a non-linear state estimation framework which models dynamic load uncertainty error by updating the variances of the unsynchronized measurements, leading to a time-varying system of weights in the weighted least squares state estimator. Case studies are performed on the 33-Bus Distribution System in MATPOWER, using Ornstein–Uhlenbeck stochastic processes to simulate dynamic load conditions.

Cooper, Austin↗

Flexible Data and Frame Synchronization Structure for the LunaNet PNT Signal

A LunaNet Lunar Augmented Navigation Service (LANS) is being developed to enable a position, navigation, and timing service for future Lunar operations. The signal includes two components. An in-phase data channel signal is spread by a 1.023 MCPS ranging code that provides a high-rate data message at 250 bps and is encoded by a strong Low Density Parity Check (LDPC) code. A pilot channel with a 5.115 MCPS spreading code is also provided. The pilot code is configured with a secondary (overlay) code that does not currently provide absolute time or frame Synchronization as is the case for L1C. This work shows the advantage of implementing an overlay structure that provides absolute time for the LunaNet LANS signal structure known as the Augmented Forward Signal (AFS). The LunaNet AFS structure was developed to service two classes of user receivers. The first class is a low-complexity user receiver that only receives the 1.023 MCPS signal and does not use the 5.115 MCPS pilot channel. For this class of user, a data frame Sync word is needed. The second class of receiver is a high-end receiver that can processes both data and pilot channels to take advantage of the higher chip rate pilot channel for enhanced robustness and improved accuracy. In the current draft LunaNet LANS AFS design, these users must employ the frame Sync word in the data channel and obtain absolute time after decoding the AFS navigation message. The signal structure would greatly benefit from the addition of a pilot overlay structure that provides absolute time and robust frame Sync for high-end users as done for L1C. To provide a more robust and interoperable AFS structure, this work summarizes a study and recommends alternatives for a new overlay code on the pilot channel that provides absolute time and a Sync word approach on the data channel. The overlay code and Sync word are designed to allow for flexible and robust data synchronization for both low- complexity and high-end user receivers. The new overlay code structure permits frame synchronization performance that is as good as or better than the L1 C signal, while enabling a determination of absolute time upon frame Sync to aid high-end assisted LANS AFS user receivers at low signal to noise levels. We also present the design of rate-matched 5G new radio (5GNR) LDPC codes that fit within the current 6000-symbol frame size along with a time of interval (TOI) word, frame ID (FID) word, and the remaining LunaNet AFS data message blocks. The paper describes and demonstrates robust frame Synchronization performance of the overlay code and Synch word approaches. The results are described in terms of probability of missed detection and probability of false alarm for a correct frame Synchronization at low Eb/No levels expected for decoding the TOI word and LDPC encoded data. Advantages of the proposed data Synchronization structure will be described along with use cases for low-end and high-end receivers. Practical implementation considerations will also be described.

LunaNet↗