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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 199 records · Page 11

Growing Aligned Carbon Nanotubes for Interconnections in ICs

A process for growing multiwalled carbon nanotubes anchored at specified locations and aligned along specified directions has been invented. Typically, one would grow a number of the nanotubes oriented perpendicularly to a silicon integrated-circuit (IC) substrate, starting from (and anchored on) patterned catalytic spots on the substrate. Such arrays of perpendicular carbon nanotubes could be used as electrical interconnections between levels of multilevel ICs. The process (see Figure 1) begins with the formation of a layer, a few hundred nanometers thick, of a compatible electrically insulating material (e.g., SiO(x) or Si(y)N(z) on the silicon substrate. A patterned film of a suitable electrical conductor (Al, Mo, Cr, Ti, Ta, Pt, Ir, or doped Si), having a thickness between 1 nm and 2 m, is deposited on the insulating layer to form the IC conductor pattern. Next, a catalytic material (usually, Ni, Fe, or Co) is deposited to a thickness between 1 and 30 nm on the spots from which it is desired to grow carbon nanotubes. The carbon nanotubes are grown by plasma-enhanced chemical vapor deposition (PECVD). Unlike the matted and tangled carbon nanotubes grown by thermal CVD, the carbon nanotubes grown by PECVD are perpendicular and freestanding because an electric field perpendicular to the substrate is used in PECVD. Next, the free space between the carbon nanotubes is filled with SiO2 by means of CVD from tetraethylorthosilicate (TEOS), thereby forming an array of carbon nanotubes embedded in SiO2. Chemical mechanical polishing (CMP) is then performed to remove excess SiO2 and form a flat-top surface in which the outer ends of the carbon nanotubes are exposed. Optionally, depending on the application, metal lines to connect selected ends of carbon nanotubes may be deposited on the top surface. The top part of Figure 2 is a scanning electron micrograph (SEM) of carbon nanotubes grown, as described above, on catalytic spots of about 100 nm diameter patterned by electron-beam lithography. These and other nanotubes were found to have lengths ranging from 2 to 10 m and diameters ranging from 30 to 200 nm, the exact values of length depending on growth times and conditions and the exact values of diameter depending on the diameters and thicknesses of the catalyst spots. The bottom part of Figure 2 is an SEM of an embedded array of carbon nanotubes after CMP.

Li, Jun↗

Desirements of Next Generation Spacecraft Interconnects : The JPL NEXUS Perspective

Objectives of NEXUS (NEXt bUS) (1) A research task funded by JPL R&TD program (2) Develop a common highly-capable next generation avionics interconnect with the following features: (a) Transparently compatible with wired, fiber-optic, and RF physical layers (b) A clear and feasible path-to-flight to ensure infusion into future NASA/JPL missions

fiber-optics↗

Stackable Form-Factor Peripheral Component Interconnect Device and Assembly

A stackable form-factor Peripheral Component Interconnect (PCI) device can be configured as a host controller or a master/target for use on a PCI assembly. PCI device may comprise a multiple-input switch coupled to a PCI bus, a multiplexor coupled to the switch, and a reconfigurable device coupled to one of the switch and multiplexor. The PCI device is configured to support functionality from power-up, and either control function or add-in card function.

Somervill, Kevin M.↗

Evidence of Processing Non-Idealities in 4H-SiC Integrated Circuits Fabricated With Two Levels of Metal Interconnect

The fabrication and prolonged 500 C electrical testing of 4H-SiC junction field effect transistor (JFET) integrated circuits (ICs) with two levels of metal interconnect is reported in another submission to this conference proceedings. While some circuits functioned more than 3000 hours at 500 C, the majority of packaged ICs from this wafer electrically failed after less than 200 hours of operation in the same test conditions. This work examines the root physical degradation and failure mechanisms believed responsible for observed large discrepancies in 500 C operating time. Evidence is presented for four distinct issues that significantly impacted 500 C IC operational yield and lifetime for this wafer.

JFET↗

Evidence of Processing Non-Idealities in 4H-SiC Integrated Circuits Fabricated with Two Levels of Metal Interconnect

The fabrication and prolonged 500 C electrical testing of 4H-SiC junction field effect transistor (JFET) integrated circuits (ICs) with two levels of metal interconnect is reported in another submission to this conference proceedings. While some circuits functioned more than 1000 hours at 500 C, the majority of packaged ICs from this wafer electrically failed after less than 200 hours of operation in the same test conditions. This work examines the root physical degradation and failure mechanisms believed responsible for observed large discrepancies in 500 C operating time. Evidence is presented for four distinct issues that significantly impacted 500 C IC operational yield and lifetime for this wafer.

Microelectronics↗

Analysis of Electrical Grid Capacity by Interconnection for Urban Air Mobility

A wide range of challenges must be overcome to conduct Urban Air Mobility (UAM)operations at scale with electric vertical take-off and landing aircraft as envisioned. This paper documents an analysis of one potential infrastructure challenge for UAM: available electrical grid power capacity. The success of UAM depends on the availability of electricity, which will be increasingly impacted by the proliferation of ground electric vehicles(EVs) over time. Under the best-case assumption that electricity can be transmitted and distributed as needed within each interconnection (i.e., electrical grid), it is estimated that the maximum number of UAM aircraft that can charge simultaneously in the continental United States will decrease by 20% from about 595 thousand in the year 2021 to about 475 thousand in the year 2050due to the projected increase in ground EVs.

electrical grid↗

Analysis of Electrical Grid Capacity by Interconnection for Urban Air Mobility

A wide range of challenges must be overcome to conduct Urban Air Mobility (UAM)operations at scale with electric vertical take-off and landing aircraft as envisioned. This paper documents an analysis of one potential infrastructure challenge for UAM: available electrical grid power capacity. The success of UAM depends on the availability of electricity, which will be increasingly impacted by the proliferation of ground electric vehicles(EVs) over time. Under the best-case assumption that electricity can be transmitted and distributed as needed within each interconnection (i.e., electrical grid), it is estimated that the maximum number of UAM aircraft that can charge simultaneously in the continental United States will decrease by 20% from about 595 thousand in the year 2021 to about 475 thousand in the year 2050due to the projected increase in ground EVs.

electrical grid↗

Development of an Adaptive Droop Control Method for Interconnected Lunar DC Microgrids Using Power Hardware-in-the-Loop

NASA’s Artemis Program outlines the need for a habitat capable of sustaining human life as well as mining and producing raw materials on the lunar surface. This mission is viewed as a means towards deeper space exploration, with plans for reaching Mars and beyond. Human presence on the moon is not possible without the ability to generate and distribute energy, namely electricity, through a network of energy sources, loads, and power converters called a microgrid. Multiple microgrids can be deployed on the moon based on location and need. Separate microgrids will require interconnection to increase resiliency and reliability given the mission’s high criticality. A method for adaptive control over power converters connecting two dc microgrids is proposed. A simulation is modeled after the lunar power system with two approaches to power converter droop control, allowing for a more flexible and adaptive microgrid architecture. Further experiments are conducted using the control methods in a power hardware-in-the-loop test environment to study the performance of hardware converter control used in this application.

dc microgrid↗

NASA EEE Parts and Advanced Interconnect Program (AIP)

none given From Program Objectives: I. Accelerate the readiness of new technologies through development of validation, assessment and test method/tools II. Provide NASA Projects infusion paths for emerging technologies III. Provide NASA Projects technology selection, application and validation guidelines for harware and processes IV. Disseminate quality assurance, reliability, validation, tools and availability information to the NASA community.

NASA EEE Parts Program Advanced Interconnect Progr↗

Limits on Interconnection Bandwidth for On-Board Processing

This viewgraph presentation reviews the constraints, and concerns of spacecraft design, in particular spacecraft instrumentation design and the issues concerning space communication. The advantages and disadvantages of several communication options are reviewed. Ultimately there will be spacecraft communication not between boxes on spacecraft, but between spacecraft. The future of spacecraft communication is interplanetary networks.

interconnects↗