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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 199 records · Page 11
All sourcesNASA NTRSDOE OSTI
NASA NTRS1972

High-performance low-power CMOS memories using silicon-on-sapphire technology.

MOS/silicon-on-sapphire (SOS) technology is shown to permit the realization of large-scale integrated arrays that combine the best features of monolithic bipolar and MOS technologies. The perfect isolation and reduced capacitance of SOS technology make possible static MOS circuits with nearly an order-of-magnitude improvement in speed and dynamic power dissipation over their monolithic counterparts. CMOS/SOS memory arrays have been fabricated with speeds comparable to TTL bipolar memory arrays even when operated at TTL compatible levels. Quiescent power dissipation of two described arrays is typically less than 1 microwatt/bit. The SOS/MOS technology is compatible with both aluminum and self-aligned silicon-gate processing.

Boleky, E. J.↗
NASA NTRS1972

Improvement of screening methods for silicon planar semiconductor devices

The results of the program for the development of a more sensitive method for selecting silicon planar semiconductor devices for long life applications are reported. The manufacturing technologies (MOS and Bipolar) are discussed along with the screening procedures developed as a result of the tests and evaluations, and the effectiveness of the MOS and Bilayer screening procedures are evaluated.

Berger, W. M.↗
NASA NTRS1973

Study of meteoroid detection systems applicable to the outer planets missions

Modifications to the Pioneer 10/11 meteoroid detection experiment to allow it to be used for outer planet missions were investigated. Both pressurized cells and metal-oxide silicon (MOS) penetration detectors are considered. Both the sensors systems and the electronics are treated. Investigation of the calibration and characterization of the MOS penetration detector is reported.

Brooks, A. D.↗
NASA NTRS1975

Self-scanned Digicon - A digital image tube for astronomical spectroscopy

We have successfully fabricated, tested, and operated a digital image tube consisting of a magnetically focused image intensifier tube in which a self-scanned linear array of 1024 silicon photodiodes operating in the EBS mode serves as the photoelectron image detector, amplifier, and intermediate image storage device. Integral on-chip MOS shift registers driven by an external clock sequentially interrogate the photodiodes through MOS FET multiplex switch arrays. Each output frame is a sequence of 256 analog pulses on each of four video lines. Laboratory and observing tests show that the output signal is photoelectron shot noise limited over at least a range of 1-100,000 detected photoelectrons per picture element, indicating that single photon detection is achieved. High-resolution astronomical spectroscopy has been carried out in the coude spectrograph of the 2.7-m telescope at McDonald Observatory. Examples are shown.

Tull, R. G.↗
NASA NTRS1976

Rapid and precise measurement of flatband voltage

The paper outlines the design, principles of operation, and calibration of a five-IC network intended to give a rapid, precise, and automatic determination of the flatband voltage of MOS capacitors. The basic principle of measurement is to compare the analog output voltage of a capacitance meter - which is directly proportional to the capacitance being measured - with a preset or dialed-in voltage proportional to the calculated flatband capacitance by means of a comparator circuit. The bias to the MOS capacitor supplied through the capacitance meter is provided by a ramp voltage going from a negative toward a positive voltage level and vice versa. The network employs two monostable multivibrators for reading and recording the flatband voltage and for resetting the initial conditions and restarting the ramp. The flatband voltage can be held and read on a digital voltmeter.

Li, S. P.↗
NASA NTRS1977

DIFMOS - A floating-gate electrically erasable nonvolatile semiconductor memory technology

Electrically alterable read-only memories (EAROM's) or reprogrammable read-only memories (RPROM's) can be fabricated using a single-level metal-gate p-channel MOS technology with all conventional processing steps. Given the acronym DIFMOS for dual-injector floating-gate MOS, this technology utilizes the floating-gate technique for nonvolatile storage of data. Avalanche injection of hot electrons through gate oxide from a special injector diode in each bit is used to charge the floating gates. A second injector structure included in each bit permits discharge of the floating gate by avalanche injection of holes through gate oxide. The overall design of the DIFMOS bit is dictated by the physical considerations required for each of the avalanche injector types. The end result is a circuit technology which can provide fully decoded bit-erasable EAROM-type circuits using conventional manufacturing techniques.

Gosney, W. M.↗
NASA NTRS1977

Impurity concentrations and surface charge densities on the heavily doped face of a silicon solar cell

Increased solar cell efficiencies are attained by reduction of surface recombination and variation of impurity concentration profiles at the n(+) surface of silicon solar cells. Diagnostic techniques are employed to evaluate the effects of specific materials preparation methodologies on surface and near surface concentrations. It is demonstrated that the MOS C-V method, when combined with a bulk measurement technique, yields more complete concentration data than are obtainable by either method alone. Specifically, new solar cell MOS C-V measurements are combined with bulk concentrations obtained by a successive layer removal technique utilizing measurements of sheet resistivity and Hall coefficient.

Weinberg, I.↗
NASA NTRS1978

Ionized dopant concentrations at the heavily doped surface of a silicon solar cell

Data are combined with concentrations obtained by a bulk measurement method using successive layer removal with measurements of Hall effect and resistivity. From the MOS (metal-oxide-semiconductor) measurements it is found that the ionized dopant concentration N has the value (1.4 + or - 0.1) x 10 to the 20th power/cu cm at distances between 100 and 220 nm from the n(+) surface. The bulk measurement technique yields average values of N over layers whose thickness is 2000 nm. Results show that, at the higher concentrations encountered at the n(+) surface, the MOS C-V technique, when combined with a bulk measurement method, can be used to evaluate the effects of materials preparation methodologies on the surface and near surface concentrations of silicon cells.

Weinberg, I.↗
NASA NTRS1979

Monolithic InSb imaging arrays with charge-coupled device /CCD/ readout

The paper demonstrates the detection of infrared radiation and signal readout on a monolithic InSb charge coupled infrared imaging device. The device is a 20-element linear imager with MOS detectors coupled to a four-phase, surface-channel, charge transfer structure. The charge transfer device is p-channel and has planar ion implanted diode structures for zero input and charge readout. Sensitivity measurements on the MOS infrared detectors were determined for the 20-element array. Data are presented on the operational characteristics of the 20-element linear imager under various conditions of electrical and optical inputs in both multiplexed and a time delay and integration (TDI) mode. Plans are discussed for a monolithic InSb 100-element linear imager and a 20 x 16 TDI linear imager.

Miller, W. E.↗
NASA NTRS1980

Study of GaAs-oxide interface by transient capacitance spectroscopy - Discrete energy interface states

Interface states and bulk GaAs energy levels were simultaneously investigated in GaAs MOS structures prepared by anodic oxidation. These two types of energy levels were successfully distinguished by carrying out a comparative analysis of deep level transient capacitance spectra of the MOS structures and MS structures prepared on the same samples of epitaxially grown GaAs. The identification and study of the interface states and bulk levels was also performed by investigating the transient capacitance spectra as a function of the filling pulse magnitude. It was found that in the GaAs-anodic oxide interface there are states present with a discrete energy rather than with a continuous energy distribution. The value of the capture cross section of the interface states was found to be 10 to the 14th to 10 to the 15th/sq cm, which is more accurate than the extremely large values of 10 to the -8th to 10 to the -9th/sq cm reported on the basis of conductance measurements.

Kamieniecki, E.↗
NASA NTRS1982

Annual Conference on Nuclear and Space Radiation Effects, 19th, Las Vegas, NV, July 20-22, 1982, Proceedings

The results of research concerning the effects of nuclear and space radiation are presented. Topics discussed include the basic mechanisms of nuclear and space radiation effects, radiation effects in devices, and radiation effects in microcircuits, including studies of radiation-induced paramagnetic defects in MOS structures, silicon solar cell damage from electrical overstress, radiation-induced charge dynamics in dielectrics, and the enhanced radiation effects on submicron narrow-channel NMOS. Also examined are topics in SGEMP/IEMP phenomena, hardness assurance and testing, energy deposition, desometry, and radiation transport, and single event phenomena. Among others, studies are presented concerning the limits to hardening electronic boxes to IEMP coupling, transient radiation screening of silicon devices using backside laser irradiation, the damage equivalence of electrons, protons, and gamma rays in MOS devices, and the single event upset sensitivity of low power Schottky devices.

Long, D. M.↗
NASA NTRS1983

Interface states and internal photoemission in p-type GaAs metal-oxide-semiconductor surfaces

An interface photodischarge study of p-type GaAs metal-oxide-semiconductor (MOS) structures revealed the presence of deep interface states and shallow donors and acceptors which were previously observed in n-type GaAs MOS through sub-band-gap photoionization transitions. For higher photon energies, internal photoemission was observed, i.e., injection of electrons to the conduction band of the oxide from either the metal (Au) or from the GaAs valence band; the threshold energies were found to be 3.25 and 3.7 + or - 0.1 eV, respectively. The measured photoemission current exhibited a thermal activation energy of about 0.06 eV, which is consistent with a hopping mechanism of electron transport in the oxide.

Kashkarov, P. K.↗
NASA NTRS1983

Preliminary description of the area navigation software for a microcomputer-based Loran-C receiver

The development of new software implementation of this software on a microcomputer (MOS 6502) to provide high quality navigation information is described. This software development provides Area/Route Navigation (RNAV) information from Time Differences (TDs) in raw form using an elliptical Earth model and a spherical model. The software is prepared for the microcomputer based Loran-C receiver. To compute navigation infomation, a (MOS 6502) microcomputer and a mathematical chip (AM 9511A) were combined with the Loran-C receiver. Final data reveals that this software does indeed provide accurate information with reasonable execution times.

Oguri, F.↗
NASA NTRS1986

Behavior of inversion layers in 3C silicon carbide

A study on the field-induced surface-charge region in 3C silicon carbide (SiC) using 1 MHz capacitance-voltage (C-V) measurements at room temperature is here reported. A double column mercury probe was used on oxidized SiC substrates to form metal-oxide-semiconductor (MOS) structures. These structures were characterized in terms of the substrate doping profile, effective fixed oxide charge, and interface trap density. A distinctive feature of the MOS C-V curves from accumulation to inversion is that after going into deep depletion the capacitance rises to its equilibrium inversion level during the voltage sweep. Capacitance transient measurements indicate that the minority-carrier generation occurs at the SiO2/SiC interface.

Avila, R. E.↗
NASA NTRS1986

1986 Annual Conference on Nuclear and Space Radiation Effects, 23rd, Providence, RI, July 21-23, 1986, Proceedings

The present conference on the effects of nuclear and space radiation on electronic hardware gives attention to topics in the basic mechanisms of radiation effects, dosimetry and energy-dependent effects, electronic device radiation hardness assurance, SOI/SOS radiation effects, spacecraft charging and space radiation, IC radiation effects and hardening, single-event upset (SEU) phenomena and hardening, and EMP/SGEMP/IEMP phenomena. Specific treatments encompass the generation of interface states by ionizing radiation in very thin MOS oxides, the microdosimetry of meson energy deposited on 1-micron sites in Si, total dose radiation and engineering studies, plasma interactions with biased concentrator solar cells, the transient imprint memory effect in MOS memories, mechanisms leading to SEU, and the vaporization and breakdown of thin columns of water.

Ellis, Thomas D.↗
NASA NTRS1988

Minority-carrier lifetime analysis of silicon epitaxy and bulk crystals with nonuniformly distributed defects

Existing analyses of the pulsed response of an MOS capacitor for minority-carrier lifetime determination result in a lifetime value averaged over most of the depletion region width. In this report, an analysis of MOS C-t data is presented that enables minority-carrier generation lifetime to be plotted as a function of depletion region depth. The technique is shown to be useful for samples with bulk or buried interfacial layer defects that have defect-free surfaces. Data are presented for intrinsically gettered bulk crystals and extrinsically gettered Si(2-pct Ge) epitaxial layers with misfit dislocations. In addition, for samples that do have uniform lifetimes, the measurement time required for determining carrier lifetime has been reduced by more than an order of magnitude.

Radzimski, Zbignew↗
NASA NTRS1988

Linear response theory for annealing of radiation damage in semiconductor devices

A theoretical study of the radiation/annealing response of MOS ICs is described. Although many experiments have been performed in this field, no comprehensive theory dealing with radiation/annealing response has been proposed. Many attempts have been made to apply linear response theory, but no theoretical foundation has been presented. The linear response theory outlined here is capable of describing a broad area of radiation/annealing response phenomena in MOS ICs, in particular, both simultaneous irradiation and annealing, as well as short- and long-term annealing, including the case when annealing is nearing completion. For the first time, a simple procedure is devised to determine the response function from experimental radiation/annealing data. In addition, this procedure enables us to study the effect of variable temperature and dose rate, effects which are of interest in spaceflight. In the past, the shift in threshold potential due to radiation/annealing has usually been assumed to depend on one variable: the time lapse between an impulse dose and the time of observation. While such a suggestion of uniformity in time is certainly true for a broad range of radiation annealing phenomena, it may not hold for some ranges of the variables of interest (temperature, dose rate, etc.). A response function is projected which is dependent on two variables: the time of observation and the time of the impulse dose. This dependence on two variables allows us to extend the theory to the treatment of a variable dose rate. Finally, the linear theory is generalized to the case in which the response is nonlinear with impulse dose, but is proportional to some impulse function of dose. A method to determine both the impulse and response functions is presented.

Litovchenko, Vitaly↗
NASA NTRS1989

A parallel algorithm for switch-level timing simulation on a hypercube multiprocessor

The parallel approach to speeding up simulation is studied, specifically the simulation of digital LSI MOS circuitry on the Intel iPSC/2 hypercube. The simulation algorithm is based on RSIM, an event driven switch-level simulator that incorporates a linear transistor model for simulating digital MOS circuits. Parallel processing techniques based on the concepts of Virtual Time and rollback are utilized so that portions of the circuit may be simulated on separate processors, in parallel for as large an increase in speed as possible. A partitioning algorithm is also developed in order to subdivide the circuit for parallel processing.

Rao, Hariprasad Nannapaneni↗