Design and Evaluation of GPU-FPX: A Low-Overhead tool forFloating-Point Exception Detection in NVIDIA GPUs
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Hardware-Conscious Optimization of the Quantum Toffoli Gate
While quantum computing holds great potential in combinatorial optimization, electronic structure calculation, and number theory, the current era of quantum computing is limited by noisy hardware. Many quantum compilation approaches can mitigate the effects of imperfect hardware by optimizing quantum circuits for objectives such as critical path length. Few approaches consider quantum circuits in terms of the set of vendor-calibrated operations (i.e., native gates) available on target hardware. This manuscript expands the analytical and numerical approaches for optimizing quantum circuits at this abstraction level. We present a procedure for combining the strengths of analytical native gate-level optimization with numerical optimization. Although we focus on optimizing Toffoli gates on the IBMQ native gate set, the methods presented are generalizable to any gate and superconducting qubit architecture. Our optimized Toffoli gate implementation demonstrates an 18% reduction in infidelity compared with the canonical implementation as benchmarked on IBM Jakarta with quantum process tomography. Assuming the inclusion of multi-qubit cross-resonance (MCR) gates in the IBMQ native gate set, we produce Toffoli implementations with only six multi-qubit gates, a 25% reduction from the canonical eight multi-qubit implementations for linearly connected qubits.
71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
Latency and Bandwidth Microbenchmarks of US Department of Energy Systems in the June 2023 Top 500 List
As a rule, Top 500 class supercomputers are extensively benchmarked as part of their acceptance testing process. However, barring publicly posted LINPACK / HPCG results, most benchmark results are often inaccessible outside the hosting institution. Moreover, these higher level benchmarks do not provide easy answers to common questions such as “What is the realizable memory bandwidth?” or “What is the launch latency on the accelerator?” To partially address these issues, we executed selected single-node micro-benchmarks — focused on latencies and memory bandwidth — on every US Department of Energy system above rank 150 of the June 2023 Top 500 list, excepting NERSC’s Cori and ORNL’s Frontier TDS (now decommissioned or repurposed). We hope to provide an easy “first stop” reference for users of current Top 500 systems and inspire users and administrators of other Top 500 systems to similarly compile and make available benchmark results for their systems.
Siefert, Christopher M.↗
QASMTrans: A QASM Quantum Transpiler Framework for NISQ Devices
In quantum computing, transpilation plays a crucial role in converting high-level, machine-independent quantum circuits into circuits specially for a quantum device, considering factors such as basis gate set, topology, error profile, etc. Yet, the efficiency of transpilation remains a significant bottleneck, particularly when dealing with very large QASM level input files. In this paper, we present QASMTrans, a C++ based high-performance quantum transpiler framework that can demonstrate on average 50-100× speedups compared to the internal transpiler of Qiskit. Particularly, for large dense circuits such as ’uccsd n24’ and ’qft n320’ incorporating millions of gates, QASMTrans can successfully transpile in 69s and 31s, respectively, while Qiskit failed to finish in one hour. Using QASMTrans as the baseline, it becomes more feasible to explore much larger design space and impose more comprehensive compiler optimizations.
Hua, Fei↗
Implementation and Synthesis of Math Library Functions
Achieving speed and accuracy for math library functions like exp, sin, and log is difficult. This is because low-level implementation languages like C do not help math library developers catch mathematical errors, build implementations incrementally, or separate high-level and low-level decision making. This ultimately puts development of such functions out of reach for all but the most experienced experts. To address this, we introduce MegaLibm, a domain-specific language for implementing, testing, and tuning math library implementations. MegaLibm is safe, modular, and tunable. Implementations in MegaLibm can automatically detect mathematical mistakes like sign flips via semantic wellformedness checks, and components like range reductions can be implemented in a modular, composable way, simplifying implementations. Once the high-level algorithm is done, tuning parameters like working precisions and evaluation schemes can be adjusted through orthogonal tuning parameters to achieve the desired speed and accuracy. MegaLibm also enables math library developers to work interactively, compiling, testing, and tuning their implementations and invoking tools like Sollya and type-directed synthesis to complete components and synthesize entire implementations. MegaLibm can express 8 state-of-the-art math library implementations with comparable speed and accuracy to the original C code, and can synthesize 5 variations and 3 from-scratch implementations with minimal guidance.
97 MATHEMATICS AND COMPUTING↗
A Formalization of Core Why3 in Coq
Intermediate verification languages like Why3 and Boogie have made it much easier to build program verifiers, transforming the process into a logic compilation problem rather than a proof automation one. Why3 in particular implements a rich logic for program specification with polymorphism, algebraic data types, recursive functions and predicates, and inductive predicates; it translates this logic to over a dozen solvers and proof assistants. Accordingly, it serves as a backend for many tools, including Frama-C, EasyCrypt, and GNATProve for Ada SPARK. But how can we be sure that these tools are correct? The alternate foundational approach, taken by tools like VST and CakeML, provides strong guarantees by implementing the entire toolchain in a proof assistant, but these tools are harder to build and cannot directly take advantage of SMT solver automation. As a first step toward enabling automated tools with similar foundational guarantees, we give a formal semantics in Coq for the logic fragment of Why3. We show that our semantics are useful by giving a correct-by-construction natural deduction proof system for this logic, using this proof system to verify parts of Why3's standard library, and proving sound two of Why3's transformations used to convert terms and formulas into the simpler logics supported by the backend solvers.
97 MATHEMATICS AND COMPUTING↗
SmartFuse: Reconfigurable Smart Switches to Accelerate Fused Collectives in HPC Applications
Communication switches have sometimes been augmented to process collectives (e.g., the IBM BlueGene project and the Mellanox SHArP switch). In this work, we find that there is a great acceleration opportunity through the further augmentation of switches to accelerate more complex functions that combine communication with computation. We consider three types of such functions. The first is fully-fused collectives built by fusing multiple existing collectives like Allreduce with Alltoall. The second is semi-fused collectives built by combining a collective with another computation. The third we refer to as higher-order collectives built by combining multiple computations and communications, such as to perform matrix-matrix multiply (PGEMM). In this work, we propose a framework called SmartFuse to accelerate fused collective functions. The core of SmartFuse is a reconfigurable smart switch to support these operations. The semi/fully fused collectives are implemented with a CGRAlike architecture, while higher-order collectives are implemented with a more specialized computational unit that can also schedule communication. Supporting our framework is software to evaluate and translate relevant parts of the input program, compile them into a control data flow graph, and then map this graph to the switch hardware. The proposed framework, once deployed, has the strong potential to accelerate existing HPC applications transparently by encapsulation within an MPI implementation. Experimental results show that this approach improves the performance of the PGEMM kernel, MINIFE, and AMG by, on average, 94%, 15%, and 13%, respectively.
Haghi, Pouya↗
QECC-Synth: A Layout Synthesizer for Quantum Error Correction Codes on Sparse Architectures
Quantum Error Correction (QEC) codes are essential for achieving fault-tolerant quantum computing (FTQC). However, their implementation faces significant challenges due to disparity between required dense qubit connectivity and sparse hardware architectures. Current approaches often either underutilize QEC circuit features or focus on manual designs tailored to specific codes and architectures, limiting their capability and generality. In response, we introduce QECC-Synth, an automated compiler for QEC code implementation that addresses these challenges. We leverage the ancilla bridge technique tailored to the requirements of QEC circuits and introduces a systematic classification of its design space flexibilities. We then formalize this problem using the MaxSAT framework to optimize these flexibilities. Evaluation shows that our method significantly outperforms existing methods while demonstrating broader applicability across diverse QEC codes and hardware architectures.
Yin, Keyi [University of California, San Diego]↗
Agentic AI vs ML-Based Autotuning: A Comparative Study for Loop Reordering Optimization
High Performance Computing (HPC) applications rely heavily on code optimizations to achieve good performance on modern CPU and GPU architectures. Traditional Machine Learning auto-tuning approaches have demonstrated success in exploring high-dimensional spaces, but they often require expensive compile-run evaluations and lack adaptability for large HPC applications. The recent advances in Large Language Models (LLMs) and Agentic AI systems raise intriguing questions about the potential of these approaches to address specific optimization methodologies. This work aims to answer an essential question for the HPC community: “How Agentic AI Systems Compare to Traditional ML Autotuning Techniques?” To address this question, we present a comparative analysis between a traditional ML-based optimization approach and an Agentic AI system, evaluating their respective capabilities and limitations for loop-level optimization. In addition, we introduced a new Agentic AI system named LoopGen-AI using three different Large Language Models: GPT-4.1, Claude 4.0, and Gemini 2.5. A key finding is that LoopGen-AI achieves competitive per-formance with only a few program runs, the reasoning logs from the agents revealed that their decisions rely heavily on the combination of semantic understanding of the target kernel with dynamic feedback from the environment, highlighting a promising new dimension in performance tuning. In contrast, ML-based autotuners focus on statistical exploration, and require orders of magnitude more runs to reach peak performance. Additionally, our analysis shows that prompt engineering, particularly using Persona + Context Manager patterns, significantly impacts the effectiveness of Agentic AI. Our results indicate that while Agentic AI systems are not yet a complete replacement for ML-based autotuners, it can effectively complement traditional methods.
Rosas, Miguel Romero↗
Emulator Generation Gadget
This software automates the production of standalone emulators for complex computer models. The end result of running the software is a piece of code called an emulator, a statistical approximation which predicts the output of complex computer simulation, but at a much faster speed. The emulator is built using a training set of inputs and outputs from the simulations. The input-output pairs are used in a Bayesian scheme to estimate the parameters of a Gaussian process based regression model that learns the input-output relationship. The estimated parameters are combined with a generic C skeleton to produce a compile-able instantiation of the emulator.
Sweeney, Christine↗
Berkeley Unified Parallel C (UPC) runtime library
This software comprises a portable, open-source implementation of a runtime library to support applications written in the Unified Parallel C (UPC) language. This library implements the UPC-specific functionality, including shared-memory allocation and distributed locks. The network-dependent functionality is implemented as a thin wrapper around the separate GASNet (Global-Address Space Networking) library, which is required for operation. This software implements the "Berkeley UPC Runtime Specification", which is targeted by at least four separate UPC compiler front-ends. The implementation is highly portable and runs over hardware ranging from laptops to custom supercomputers. An external library is required for certain local memory allocation operations; a well-defined interface allows for multiple implementations of this library, but at present the "umalloc" library from LBNL is the only compatible implementation.
Bonachea, Dan↗
Global-Address Networking (GASNet-1) Library
GASNet is a language-independent, networking middleware layer that provides network-independent, high-performance communication primitives including Remote Memory Access (RMA) and Active Messages (AM). It has been used to implement parallel programming models and libraries such as UPC, Co-Array Fortran, Titanium, Legion, Chapel, and many others. The interface is primarily intended as a compilation target and for use by runtime library writers (as opposed to end users), and the primary goals are high performance, interface portability, and expressiveness. GASNet stands for "Global-Address Space Networking".
SciDAC↗
Global-Address Space Networking for Exascale
GASNet-EX is a portable, open-source, high-performance communication library designed to efficiently support the networking requirements of Partitioned Global Address Space (PGAS) runtime systems and other alternative models in future exascale machines. The library is an evolution of the popular GASNet communication system, building upon over 15 years of lessons learned. GASNet is a language-independent, networking middleware layer that provides network-independent, high-performance communication primitives including Remote Memory Access (RMA) and Active Messages (AM). It has been used to implement parallel programming models and libraries such as UPC, Co-Array Fortran, Titanium, Legion, Chapel, and many others. The interface is primarily intended as a compilation target and for use by runtime library writers (as opposed to end users), and the primary goals are high performance, interface portability, and expressiveness. GASNet stands for "Global-Address Space Networking".
ECP↗
lalibe v1.0
This is top-level lattice QCD code developed by employees at LBNL and LLNL. It currently compiles on top of the USQCD Chroma software stack. This code contains high-performance routines that are used in our research, and we intend to release this code publicly to ensure reproducibility and to meet our obligations for complying with the DOE Digital Data rules.
Walker-Loud, Andre↗
SolTrace™ (Optical Analysis Software) [SWR-26-065 and SWR-01-45]
SolTrace™ is a software tool developed at the National Renewable Energy Laboratory (NREL) to model concentrating solar power (CSP) systems and analyze their optical performance. Although ideally suited for solar applications, the code can also be used to model and characterize many general optical systems. The creation of the code evolved out of a need to model more complex solar optical systems than could be modeled with existing tools. SolTrace can be installed either using the official NREL packaged distribution or from source code at the SolTrace open source project website. NREL welcomes contributions from programmers to the simulation engine or to the interface and encourages interested persons to get involved. More information on contributing, compiling the source code, and license requirements is available on the project website.(https://www.nrel.gov/csp/soltrace.html). For details on integration with SAM, see the SAM website. (https://sam.nrel.gov/)
Wendelin, Tim↗
SAFIRE : Scalable and Accurate Fault Injection for Parallel Multi-threaded Applications
The software SAFIRE implements a fault injection tool to evaluate the impact of soft errors on parallel, multi-threaded applications. It implements instruction-level fault models that emulate soft errors by flipping bits in the register operands of executed machine instructions. SAFIRE is based on the LLVM compiler and utilizes novel techniques to optimize instruction instrumentation and fault injection. By detailed measurements, SAFIRE is multiple times faster than other state-of-the-art fault injection techniques, while having the same accuracy.
Georgakoudis, Giorgis↗
Multispecies Hypersonic Flow Simulator
MHYSA is a conservative finite-difference code to solve the 1D, 2D, and 3D multispecies Navier-Stokes equations for hypersonic flow applications. It supports Cartesian grids only and has the option of including immersed boundaries. - Solves 1D Euler and 2D and 3D Navier-Stokes equations. - Solves the PDEs over Cartesian grids. - Written entirely in C and uses the MPICH library. It also uses OpenMP threads but this is a work-inprogress. - Can be compiled with PETSc (http://www.mcs.anl.gov/petsc/), if available, where it can use PETSc's time integration module TS (http://www.mcs.anl.gov/petsc/petsc-current/src/ts/). - For 3-dimensional simulations, the immersed boundaries can be used to solve over non-Cartesian geometries. MHYSA has been developed to be scalable, and apart from the usual functionalities to solve a system of PDEs on distributed architectures, it provides scalable file I/O functions.
Ghosh, Debojyoti↗
PV_ICE: PV in the Circular Economy, Dynamic Energy and Materials Tool (PV ICE)
This open-source tool implements Circular Economy metrics for photovoltaic (PV) materials. It can be used to quantify and assign a value framework to efforts on re-design, reduction, replacement, reuse, recycling, and lifetime and reliability increases in the PV value chain. The PV_ICE is leveraging published data from different sources on PV manufacturing and predicted technological changes. Input data is being compiled here This tool will help implement circularity metrics, quantify and assign a value framework to efforts on re-design, reduction, replacement, reusage, recycling, and lifetime and reliability increases on PV.
Ovaitt, nee Ayala Pelaez, Silvana↗
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