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Results for “hardware in the loop”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Performance Testing and Assessment of Protection Scheme Using Real-Time Hardware-in-the-Loop and IEC 61850 Standard
The main challenge of the microgrid is to design a suitable protection scheme due to the complexity of the architecture of the microgrid. The importance of the proposed protection technique is threefold. First, it presents a co-simulation platform to integrate between a simulated model on power system computer aided design (PSCAD)/real time digital simulator computer aided design (RSCAD) software’s and physical devices schweitzer engineering laboratories (SEL) 421-7 relays to protect the microgrid that includes different resources connected based on inverter interface. Second, it presents a comprehensive hardware/software setup to test the protective relays in a closed loop system and shows how to configure the protective relay’s International Electrotechnical Commission 61850 communications. Third, IEEE 1588 standard is used to provide sub nanoseconds latency between the simulated model that emulated on real time digital simulator (RTDS) and the external devices. Also, the measurement signals are synchronized between RTDS and the external devices using giga-transceiver synchronization card (GTSYNC) interface card and SEL-2488 satellite-synchronized network clock. The results showed that the co-simulation infrastructure introduces a highly dependable design, analysis, and testing environment for cyber and physical data flow in the system. Besides that, the voltages at ac/dc sides and frequency at fault condition were maintained due to the energy storage device contributions at different modes of operation.
Low Power Hardware-In-The-Loop Neuromorphic Training Accelerator
The training process for spiking neural networks can be very computationally intensive. Approaches such as evolutionary algorithms may require evaluating thousands or millions of candidate solutions. In this work, we propose using neuromorphic cores implemented on a Xilinx Zynq system on chip to accelerate and improve the energy efficiency of the evaluation step of an evolutionary training approach. We demonstrate this can significantly reduce the required energy to evolve a network with some cases showing greater than 10 times improvement as compared to a CPU-only system.
Hardware In the Loop for Demand Flexibility (HIL4DF) v1.0
The software package in question is a collection of simulation models in the Modelica language, representing a variety of mechanical system designs and envelope conditions related to LBL's FLEXLAB facility. The collection of models also features multiple controls sequences that can be simulated with the FLEXLAB model to simulate different demand flexibility scenarios. Additionally, this package will feature datasets from 3 experimental tests, used for calibration, validation and comparison against the Modelica models, this includes weather data that can be used to replicate different scenarios in simulation across the same weather conditions experienced in real experiments. Given FLEXLAB high level of instrumentation and available data, the models are calibrated across multiple measurement points, and thus results from the extension of this model to other climate zones or control sequences, would provide high level of confidence.
Power Hardware-in-the-Loop Research at Sandia National Laboratories: Devices-to-Systems.
Abstract not provided.
PVSC 2022 Poster Development of Hierarchical Control for a Lunar Habitat DC Microgrid Model Using Power Hardware-in-the-Loop.
Abstract not provided.
Impact of Modeling Assumptions on Traveling Wave Protective Relays in Hardware in the Loop.
Abstract not provided.
Impact of Modeling Assumptions on Traveling Wave Protective Relays in Hardware in the Loop.
Abstract not provided.
Accelerating Deployment of Grid-Connected Energy Storage through Hardware-in-the-Loop Simulation and Testing
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Verification of Adaptive Protection in Hardware in the Loop for Coordination with Solar Variability
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Scaling Orbital Dynamics to the Laboratory: An Industrial Robot Hardware-in-the-Loop Testbed for Small Satellites
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First Results from a Hardware-in-the-Loop Demonstration of Closed-Loop Autonomous Formation Flying
A closed-loop system for the demonstration of formation flying technologies has been developed at NASA s Goddard Space Flight Center. Making use of a GPS signal simulator with a dual radio frequency outlet, the system includes two GPS space receivers as well as a powerful onboard navigation processor dedicated to the GPS-based guidance, navigation, and control of a satellite formation in real-time. The closed-loop system allows realistic simulations of autonomous formation flying scenarios, enabling research in the fields of tracking and orbit control strategies for a wide range of applications. A sample scenario has been set up where the autonomous transition of a satellite formation from an initial along-track separation of 800 m to a final distance of 100 m has been demonstrated. As a result, a typical control accuracy of about 5 m has been achieved which proves the applicability of autonomous formation flying techniques to formations of satellites as close as 50 m.
Use of ILTV Control Laws for LaNCETS Flight Research
A report discusses the Lift and Nozzle Change Effects on Tail Shock (LaNCETS) test to investigate the effects of lift distribution and nozzle-area ratio changes on tail shock strength of an F-15 aircraft. Specific research objectives are to obtain inflight shock strength for multiple combinations of nozzle-area ratio and lift distribution; compare results with preflight prediction tools; and update predictive tools with flight results. The objectives from a stability and control perspective are to ensure adequate aircraft stability for the changes in lift distribution and plume shape, and ensure manageable transient from engaging and disengaging the ILTV research control laws. In order to change the lift distribution and plume shape of the F-15 aircraft, a decade-old Inner Loop Thrust Vectoring (ILTV) research control law was used. Flight envelope expansion was performed for the test configuration and flight conditions prior to the probing test points. The approach for achieving the research objectives was to utilize the unique capabilities of NASA's NF-15B-837 aircraft to allow the adjustment of the nozzle-area ratio and/or canard positions by engaging the ILTV research control laws. The ILTV control laws provide the ability to add trim command biases to canard positions, nozzle area ratios, and thrust vectoring through the use of datasets. Datasets consist of programmed test inputs (PTIs) that define trims to change the nozzle-area ratio and/or canard positions. The trims are applied as increments to the normally commanded positions. A LaNCETS non-linear, six-degrees-of-freedom simulation capable of realtime pilot-in-the-loop, hardware-in-the-loop, and non-real-time batch support was developed and validated. Prior to first flight, extensive simulation analyses were performed to show adequate stability margins with the changes in lift distribution and plume shape. Additionally, engagement/disengagement transient analysis was also performed to show manageable transients.
Multi-Spacecraft Autonomous Positioning System: Low Earth Orbit Demo Development and Hardware-in-the-Loop Simulation
No abstract available
Real-Time Hardware-in-the-Loop Simulation and Test Conductor Platforms
No abstract available
Development of an Adaptive Droop Control Method for Interconnected Lunar DC Microgrids Using Power Hardware-in-the-Loop
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Hardware-in-the-Loop Simulation of Modular Antenna Assembly
Robots are playing an increasing role in space exploration and in-space servicing. Robotic arms are good for performing in-space tasks such as modular assembly. The SPIDER arm (SPace Infrastructure Dexterous Robot) of the OSAM-1 mission represents an example of a system that can perform modular antenna assembly tasks in environmental conditions that would be dangerous for astronauts. One of the WVRTC activities is to perform independent verification and validation of the SPIDER assembly operations.
Hardware in the Loop Performance of Terrestrial Powered Descent Dual Quaternion Guidance With A Custom First-Order Solver
The Safe & Precise Landing Integrated Capabilities Evolution (SPLICE) program continues to push the development of advanced descent and landing technologies. This paper will focus on the improvements made to the SPLICE Dual Quaternion Guidance (DQG) algorithm, which is a critical software component for generating approach phase and hazard avoidance trajectories. The trajectory performance of SPLICE DQG will be evaluated in preparation for a terrestrial flight test that incorporates a hazard avoidance maneuver. Additionally, the implementation of a customized first order Proportional-Integral Projected Gradient solver will be reviewed, along with preliminary execution results on the SPLICE Descent and Landing Computer (DLC).