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At least 181 records · Page 10

All sources NASA NTRS DOE OSTI

NASA NTRS1971

Design, development, fabrication and delivery of register and multiplexer units

Two complementary MOS monolithic chip types were developed, which contain a register and multiplexer unit to be used in the central processing unit of a digital computer. The partition of the logic into a chip size consistent with the characteristics of the packages is discussed. The logic was implemented by specially configured circuitry designed to layout, as well as to optimize, performance by taking advantage of the properties of CMOS logic. Of several approaches considered for generating LSI CMOS arrays, the CMOS standard cell array design technique was selected. These design automation techniques were used to generate the chip layout, art work and working master plates, followed by the fabrication and testing of the two chip types. Sixty functional LSI arrays were delivered.

Feller, A.↗

NASA NTRS1973

Some questions of an optimum probability synthesis of dynamic metalworking machine systems

Attempts were made to develop a dynamic metal working machine tool system using probability information on external factors and independent disturbances of the parameters. The problem was optimized in two stages: (1) creation of mathematical models under conditions determined by input influences, and (2) processing the results of calculations obtained on such models. Data were obtained on the patterns of distribution of dynamic quality characteristics of the tool, vibration frequencies and amplitudes, attenuation coefficients, and duration of a transition process. These data were obtained using a digital computer, statistical test methods, or logical possibility trees.

Dobrynin, S. A.↗

NASA NTRS1979

Simple digital pulse-programing circuit

Pulse-sequencing circuit uses only shift register and Exclusive-OR gates. Circuit also serves as date-transition edge detector (for rising or falling edges). It is used in sample-and-hold, analog-to-digital conversion sequence control, multiphase clock logic, precise delay control computer control logic, edge detectors, other timing applications, and provides simple means to generate timing and control signals for data transfer, addressing, or mode control in microprocessors and minicomputers.

Langston, J. L.↗

NASA NTRS1981

Microchannel spatial light modulator

The Microchannel Spatial Light Modulator (MSLM), a versatile, highly sensitive, and optically addressed device being developed for real time optical information processing is discussed. The MSLM operates by converting an input optical image into a charge distribution at the surface of an electro-optic crystal. The charge distribution generates an electric field which modulates the refractive index of the crystal and thereby the phase or intensity of an image readout beam. Prototype devices employing 250 micron thick crystals exhibited a spatial resolution of 5 cycles/mm at 50% contrast, an exposure sensitivity of 2.2 nJ/cu cm and framing rates of 40 Hz with full modulation depth. The image processing operations that have been achieved using the internal processing mode of the MSLM include contrast reversal, contrast enhancement, edge enhancement, image addition and subtraction, analog and digital intensity thresholding, and binary level logic operations such as AND, OR, EXCLUSIVE OR, and NOR.

Warde, C.↗

NASA NTRS1993

Testing of the on-board attitude determination and control algorithms for SAMPEX

Algorithms for on-board attitude determination and control of the Solar, Anomalous, and Magnetospheric Particle Explorer (SAMPEX) have been expanded to include a constant gain Kalman filter for the spacecraft angular momentum, pulse width modulation for the reaction wheel command, an algorithm to avoid pointing the Heavy Ion Large Telescope (HILT) instrument boresight along the spacecraft velocity vector, and the addition of digital sun sensor (DSS) failure detection logic. These improved algorithms were tested in a closed-loop environment for three orbit geometries, one with the sun perpendicular to the orbit plane, and two with the sun near the orbit plane - at Autumnal Equinox and at Winter Solstice. The closed-loop simulator was enhanced and used as a truth model for the control systems' performance evaluation and sensor/actuator contingency analysis. The simulations were performed on a VAX 8830 using a prototype version of the on-board software.

Mccullough, Jon D.↗

NASA NTRS1976

Two-dimensional radiant energy array computers and computing devices

Two dimensional digital computers and computer devices operate in parallel on rectangular arrays of digital radiant energy optical signal elements which are arranged in ordered rows and columns. Logic gate devices receive two input arrays and provide an output array having digital states dependent only on the digital states of the signal elements of the two input arrays at corresponding row and column positions. The logic devices include an array of photoconductors responsive to at least one of the input arrays for either selectively accelerating electrons to a phosphor output surface, applying potentials to an electroluminescent output layer, exciting an array of discrete radiant energy sources, or exciting a liquid crystal to influence crystal transparency or reflectivity.

Schaefer, D. H.↗

NASA NTRS2000

Digital Channel Simulator Developed and Tested

The Digital Channel Simulator (DCS) is a real-time test set developed in-house by the NASA Glenn Research Center at Lewis Field that simulates the characteristics of the modulator, demodulator, and transmission medium in a typical communications system to enable controlled laboratory testing of codec pairs. The DCS can support data rates up to 100 megasymbols per second (Msymbols/sec) with symbol sizes up to 10 bits and is compatible with both TTL (transistor transistor logic) and ECL (emitter coupled logic) interfaces. Because of its use of digital integrated circuits (IC's), the DCS offers the user accurate and repeatable testing while maintaining a simple reconfiguration of the modulation scheme and noise characteristics. The PC-based graphical user interface (GUI) assures user friendly operation for configuring, controlling, and monitoring the DCS and system during tests. In a typical communications system, the modulator places a symbol in constellation space and puts it on a carrier to be sent to the demodulator. Because of noise on the channel, the I and Q position in constellation space cannot be recovered exactly, and the received coordinates shift. To mimic this process in the laboratory, the DCS uses a mapper to place the symbol in constellation space. It simulates the shift in coordinates by digitally adding "noise" to the I and Q values. The mapper and noise source are implemented in lookup tables. Modulation schemes and noise characteristics are set by the values loaded in these tables. The mapper also has a pass-through mode to facilitate modulator testing, allowing noise to be added to 8-bit I and Q values of modulated data without a second mapping. To achieve high symbol rates, eight processing circuits are placed in parallel between an ECL demultiplexer and multiplexer. A graphical user interface was developed to calculate, load, and verify the values for the lookup tables. This interface can also be used to debug and verify proper operation of the channel simulator or to control an experiment. Operation of the DCS has been verified through three tests: a low-speed comprehensive system test, a high-speed (20 Msymbols/sec) test of the TTL interface, and a high-speed (100 Msymbols/sec) test of the ECL interface. The DCS is now ready for use by NASA and external customers.

Bizon, Thomas P.↗

NASA NTRS1981

Flight test of a full authority Digital Electronic Engine Control system in an F-15 aircraft

The Digital Electronic Engine Control (DEEC) system considered is a relatively low cost digital full authority control system containing selectively redundant components and fault detection logic with capability for accommodating faults to various levels of operational capability. The DEEC digital control system is built around a 16-bit, 1.2 microsecond cycle time, CMOS microprocessor, microcomputer system with approximately 14 K of available memory. Attention is given to the control mode, component bench testing, closed loop bench testing, a failure mode and effects analysis, sea-level engine testing, simulated altitude engine testing, flight testing, the data system, cockpit, and real time display.

Barrett, W. J.↗

NASA NTRS1972

Design and flight experience with a digital fly-by-wire control system using Apollo guidance system hardware on an F-8 aircraft.

This paper discusses the design and initial flight tests of the first digital fly-by-wire system to be flown in an aircraft. The system, which used components from the Apollo guidance system, was installed in an F-8 aircraft. A lunar module guidance computer is the central element in the three-axis, single-channel, multimode, digital, primary control system. An electrohydraulic triplex system providing unaugmented control of the F-8 aircraft is the only backup to the digital system. Emphasis is placed on the digital system in its role as a control augmentor, a logic processor, and a failure detector. A sampled-data design synthesis example is included to demonstrate the role of various analytical and simulation methods. The use of a digital system to implement conventional control laws was shown to be practical for flight. Logic functions coded as an integral part of the control laws were found to be advantageous. Verification of software required an extensive effort, but confidence in the software was achieved. Initial flight results showed highly successful system operation, although quantization of pilot's stick and trim were areas of minor concern from the piloting standpoint.

Deets, D. A.↗

NASA NTRS1969

Reliability in digital systems with asymmetrical failure modes

Digital network reliability with redundancy to mask logic modules failure for asymmetric failure modes

Meisel, W. S.↗

NASA NTRS1972

Optimal horizontal guidance law for aircraft in the terminal area.

A complete nonlinear control law is derived for guiding an aircraft in minimum time from an arbitrary initial position and heading to a prescribed terminal position and heading in the horizontal plane. The solution is obtained with the aid of the maximum principle, and is implemented by constructing a digital-computer program for the resulting switching logic.

Pecsvaradi, T.↗

NASA NTRS1977

A high-speed computer link for moderate distances and noisy environments

To satisfy the need for a fully duplex high-speed computer data link for the antenna automation project at DSS 13, a very simple and inexpensive scheme was employed. The link requires two coaxial cables over which is sent a unipolar digital frequency modulated signal in which a logical 1 has twice the frequency of a logical 0. Optical isolators and filters reduce ground loop effects and increase noise immunity. Tests conducted in various environments and over different cable lengths at JPL, DSS 14 and DSS 13 have indicated that the link is highly effective.

Sievers, M. W.↗

NASA NTRS1977

Turbulence simulation mechanization for Space Shuttle Orbiter dynamics and control studies

The current version of the NASA turbulent simulation model in the form of a digital computer program, TBMOD, is described. The logic of the program is discussed and all inputs and outputs are defined. An alternate method of shear simulation suitable for incorporation into the model is presented. The simulation is based on a von Karman spectrum and the assumption of isotropy. The resulting spectral density functions for the shear model are included.

Tatom, F. B.↗

NASA NTRS2017

Software Defined Radios - Architectures, Systems and Functions

Software Defined Radio (SDR) technology has been proven in the commercial sector since the early 90's. Today's rapid advancement in mobile telephone reliability and power management capabilities exemplifies the effectiveness of the SDR technology for the modern communications market. SDR technology offers potential to revolutionize satellite transponder technology by increasing science data through-put capability by at least an order of magnitude. While the SDR is adaptive in nature and is "One-size-fits-all" by design, conventional transponders are built to a specific platform and must be redesigned for every new bus. The SDR uses a minimum amount of analog/Radio Frequency (RF) components to up/down-convert the RF signal to/from a digital format. Once analog data is digitized, all processing is performed using hardware logic. Typical SDR processes include; filtering, modulation, up/down converting and demodulation. These innovations have reduced the cost of transceivers, a decrease in power requirements and a commensurate reduction in volume. An additional pay-off is the increased flexibility of the SDR: allowing the same hardware to implement multiple transponder types by altering hardware logic -no change of analog hardware is required -all of which can be ultimately accomplished in orbit.

Sims, Herb↗

NASA NTRS2017

Software Defined Radios - Architectures, Systems and Functions

Software Defined Radio is an industry term describing a method of utilizing a minimum amount of Radio Frequency (RF)/analog electronics before digitization takes place. Upon digitization all other functions are performed in software/firmware. There are as many different types of SDRs as there are data systems. Software Defined Radio (SDR) technology has been proven in the commercial sector since the early 90's. Today's rapid advancement in mobile telephone reliability and power management capabilities exemplifies the effectiveness of the SDR technology for the modern communications market. In contrast the foundations of transponder technology presently qualified for satellite applications were developed during the early space program of the 1960's. SDR technology offers potential to revolutionize satellite transponder technology by increasing science data through-put capability by at least an order of magnitude. While the SDR is adaptive in nature and is "One-size-fits-all" by design, conventional transponders are built to a specific platform and must be redesigned for every new bus. The SDR uses a minimum amount of analog/Radio Frequency components to up/down-convert the RF signal to/from a digital format. Once analog data is digitized, all processing is performed using hardware logic. Typical SDR processes include; filtering, modulation, up/down converting and demodulation. This presentation will show how the emerging SDR market has leveraged the existing commercial sector to provide a path to a radiation tolerant SDR transponder. These innovations will reduce the cost of transceivers, a decrease in power requirements and a commensurate reduction in volume. A second pay-off is the increased flexibility of the SDR by allowing the same hardware to implement multiple transponder types by altering hardware logic - no change of analog hardware is required - all of which can be ultimately accomplished in orbit. This in turn would provide high capability and low cost transponder to programs of all sizes.

Sims, William H.↗

NASA NTRS2017

Software Defined Radios - Architectures, Systems and Functions

Sims, Herb↗

NASA NTRS1971

A description of the thruster attitude control simulation and its application to the HEAO-C study

During the design and evaluation of a reaction control system (RCS), it is desirable to have a digital computer program simulating vehicle dynamics, disturbance torques, control torques, and RCS logic. The thruster attitude control simulation (TACS) is just such a computer program. The TACS is a relatively sophisticated digital computer program that includes all the major parameters involved in the attitude control of a vehicle using an RCS for control. It includes the effects of gravity gradient torques and HEAO-C aerodynamic torques so that realistic runs can be made in the areas of fuel consumption and engine actuation rates. Also, the program is general enough that any engine configuration and logic scheme can be implemented in a reasonable amount of time. The results of the application of the TACS in the HEAO-C study are included.

Brandon, L. B.↗

NASA NTRS2004

Superconducting Digital Multiplexers for Sensor Arrays

Arrays of cryogenic microbolometers and other cryogenic detectors are being developed for infrared imaging. If the signal from each sensor is amplified, multiplexed, and digitized using superconducting electronics, then this data can be efficiently read out to ambient temperature with a minimum of noise and thermal load. HYPRES is developing an integrated system based on SQUID amplifiers, a high-resolution analog-to-digital converter (ADC) based on RSFQ (rapid single flux quantum) logic, and a clocked RSFQ multiplexer. The ADC and SQUIDs have already been demonstrated for other projects, so this paper will focus on new results of a digital multiplexer. Several test circuits have been fabricated using Nb Josephson technology and are about to be tested at T = 4.2 K, with a more complete prototype in preparation.

Kadin, Alan M.↗