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At least 181 records · Page 10

Improved Transient Stability Analysis of Multi-loop Droop-Controlled Grid Forming Inverters with Current Reference Limiter

Grid-forming control is regarded as a promising technology for achieving high levels of renewable energy integration in future power grids. To fulfill this role, grid-forming devices is expected to possess fault ride through capability. This paper focuses on the transient stability of a droop control-based grid-forming inverter that utilizes current reference saturation as a current limiting strategy. The objective of this work is to investigate the fault recovery process of the grid-forming inverter and analyze the criterion for transitioning the inverter out of the current limiting mode. The theoretical analysis in this study is validated through time-domain simulations, which compare the results obtained using the circuit current limiting method and the d-axis priority-based current limiting method. Various operational conditions are considered to comprehensively evaluate the performance of the grid-forming inverter during a three-phase short circuit scenario. The simulation results confirm the effectiveness of the proposed theoretical approach.

Lyu, Xue↗

Soft error-mitigating semiconductor design system and associated methods

A soft error-mitigating semiconductor design system and associated methods that tailor circuit design steps to mitigate corruption of data in storage elements (e.g., flip flops) due to Single Events Effects (SEEs). Required storage elements are automatically mapped to triplicated redundant nodes controlled by a voting element that enforces majority-voting logic for fault-free output (i.e., Triple Modular Redundancy (TMR)). Storage elements are also optimally positioned for placement in keeping with SEE-tolerant spacing constraints. Additionally, clock delay insertion (employing either a single global clock or clock triplication) in the TMR specification may introduce useful skew that protects against glitch propagation through the designed device. The resultant layout generated from the TMR configuration may relax constraints imposed on register transfer level (RTL) engineers to make rad-hard designs, as automation introduces TMR storage registers, memory element spacing, and clock delay/triplication with minimal designer input.

Miryala, Sandeep↗

Quantum error thresholds for gauge-redundant digitizations of lattice field theories

In the quantum simulation of lattice gauge theories, gauge symmetry can be either fixed or encoded as a redundancy of the Hilbert space. While gauge-fixing reduces the number of qubits, keeping the gauge redundancy can provide code space to mitigate and correct quantum errors by checking and restoring Gauss’s law. In this work, we consider the correctable errors for generic finite gauge groups and design the quantum circuits to detect and correct them. We calculate the error thresholds below which the gauge-redundant digitization with Gauss’s law error correction has better fidelity than the gauge-fixed digitization involving only gauge-invariant states. Our results provide guidance for fault-tolerant quantum simulations of lattice gauge theories. Published by the American Physical Society 2024

97 MATHEMATICS AND COMPUTING↗

Design considerations of series type hybrid circuit breaker (S‐HCB)

Abstract The series‐type direct current (DC) hybrid circuit breaker (S‐HCB) concept was previously reported to offer better performance than solid‐state circuit breakers (SSCB) and hybrid circuit breakers (HCB). S‐HCB offers low conduction power loss like an HCB and ‐scale interruption time, which is even faster than an SSCB. It uses a pulse transformer to isolate the lower‐voltage high‐inductance power electronic circuit from the high‐voltage, low‐inductance main power loop. This paper provides analysis of the impact of the S‐HCB circuit components on the overall system performance and a scalable S‐HCB design guide for different DC system voltage and current ratings. In addition, system energy flow analysis is performed in the time domain to provide an understanding of how energy is delivered, dissipated, and released throughout the entire fault interruption process. The S‐HCB prototype was experimentally tested at 3 kV/30 A and 6 kV/150A with the results showing the interruption of the low fault current of 30 A and the high fault current of 150 A within 8 and maintaining the fault current at a near zero value for 300 to enable an arcless opening of a series mechanical switch. The key design challenges of S‐HCB at high voltage and high current ratings were discussed and possible solutions to mitigate those challenges were introduced.

Alashi, Mahmoud↗

Monocrystalline CdSeTe/MgCdTe Double‐Heterostructure Solar Cells

This article reports monocrystalline CdSeTe/MgCdTe double‐heterostructure (DH) solar cells with varying Se compositions in the absorber layers that are grown on InSb substrates by using molecular beam epitaxy. The Se composition in the samples studied is determined to be 4%–11% through high‐resolution X‐ray diffraction (XRD) and photoluminescence measurements. Increased Se incorporation induces higher defect density attributed to increased lattice mismatch, and mixed‐phase formation due to the small difference in formation energies between the wurtzite and zinc blende phases of CdSe, which causes stacking faults and grain boundaries. Devices are fabricated by directly depositing an n‐type indium tin oxide (ITO) layer on the CdSeTe/MgCdTe DHs followed by Ag metal contacts. Reduced bandgap is observed in solar cells with increased Se composition. The devices with an absorber containing 4% Se exhibit an average open‐circuit voltage ( V OC ) of 0.925 V, a short‐circuit current density ( J SC ) of 23.4 mA/cm 2 , a fill factor ( FF ) of 0.650 and an efficiency of 14.1% without anti‐reflection coating. Absorbers with higher Se compositions result in poor device performance, mainly attributed to high defect density in the materials.

Ju, Zheng [Center for Photonics Innovation Arizona↗

Determining quantum phase diagrams of topological Kitaev-inspired models on NISQ quantum hardware

Topological protection is employed in fault-tolerant error correction and in developing quantum algorithms with topological qubits. But, topological protection intrinsic to models being simulated , also robustly protects calculations, even on NISQ hardware. We leverage it by simulating Kitaev-inspired models on IBM quantum computers and accurately determining their phase diagrams. This requires constructing conventional quantum circuits for Majorana braiding to prepare the ground states of Kitaev-inspired models. The entanglement entropy is then measured to calculate the quantum phase boundaries. We show how maintaining particle-hole symmetry when sampling through the Brillouin zone is critical to obtaining high accuracy. This work illustrates how topological protection intrinsic to a quantum model can be employed to perform robust calculations on NISQ hardware, when one measures the appropriate protected quantum properties. It opens the door for further simulation of topological quantum models on quantum hardware available today.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Improved Charge Sensing on a SiMOS Double Quantum Dot using a Cryogenic Skipper Readout ASIC (Quandarum)

Major outstanding questions in high-energy physics such as the nature of dark matter and the existence of interactions beyond the standard model require new measurement techniques which are extremely sensitive to minute electromagnetic fields. An array of entangled spin qubits is a promising system for building novel detectors due to its combination of sensitivity and controllability. CMOS-based electron spin qubits, which have demonstrated the operational requirements for fault-tolerant quantum computing [1], offer a particular opportunity due to their compatibility with classical electronics, which allows the leveraging of decades of development of low-noise cryogenic detectors for physics. In this work, we combine a SiMOS double-quantum dot device architecture with a state-of-the-art cryoelectronic readout circuit [2-3] aimed to demonstrate improved charge readout using a single-electron transistor (SET). We identify the design characteristics for an SET that facilitate the use of on-chip classical electronics as a low-power, high-bandwidth first amplification stage and explore opportunities for sensor-readout co-design to minimize noise. This is the first of a series of steps to demonstrate high-fidelity readout of a large array of spin qubit with enough sensitivity to probe processes of interest for the investigation of beyond-standard-model physics.

Quinn, Adam [Fermilab]↗

Design of BLDC Motor Diagnostic Device Based on Surge Test for Phase to Ground Fault

BLDC motor is essential in the industrial world, especially it been used for an electric vehicle. The benefit of using BLDC motor is that it has high rate efficiency and low mechanical losses. However, to know the isolation condition of winding and increase reliability, it needs to be tested. With the implementation of surge test based fault detection device of BLDC motor, the condition of BLDC motor can be monitored and maintained according to analysis of its condition. The surge test method used because it is sensitive in detecting the initial damage in the isolation failure process on stator winding. A surge voltage is generated from the Cockroft-Walton and switching circuit with capacitors. The result is analyzed using Error Area Ratio (EAR). The test result shows that the higher the value of resistance and inductance, the smaller the frequency of the surge wave. When the BLDC motor in a parallel short circuit condition, the threshold value of the EAR test-reff has a minimum value of 5.28%, an average of 13.52%, and a maximum of 28.55%.

BLDC motor↗

Realizing string-net condensation: Fibonacci anyon braiding for universal gates and sampling chromatic polynomials

Abstract The remarkable complexity of a topologically ordered many-body quantum system is encoded in the characteristics of its anyons. Quintessential predictions emanating from this complexity employ the Fibonacci string net condensate (Fib SNC) and its anyons: sampling Fib-SNC would estimate chromatic polynomials while exchanging its anyons would implement universal quantum computation. However, physical realizations remained elusive. We introduce a scalable dynamical string net preparation (DSNP) that constructs Fib SNC and its anyons on reconfigurable graphs suitable for near-term superconducting processors. Coupling the DSNP approach with composite error-mitigation on deep circuits, we create, measure, and braids Fibonacci anyons; charge measurements show 94% accuracy, and exchanging the anyons yields the expected golden ratioϕwith 98% average accuracy. We then sample the Fib SNC to estimate chromatic polynomial atϕ + 2 for several graphs. Our results establish the proof of principle for using Fib-SNC and its anyons for fault-tolerant universal quantum computation and aim at a classically hard problem.

Science & Technology - Other Topics↗

Noisy-Intermediate-Scale Quantum Electromagnetic Transients Program

Quantum-empowered electromagnetic transients program (QEMTP) is a promising paradigm for tackling EMTP's computational burdens. Nevertheless, no existing studies truly achieve a practical and scalable QEMTP operable on today's noisy-intermediate-scale quantum (NISQ) computers. The strong reliance on noise-free and fault-tolerant quantum devices--which appears to be decades away--hinder practical applications of current QEMTP methods. Here, we devise a NISQ-QEMTP methodology which for the first time transitions the QEMTP operations from ideal, noise-free quantum simulators to real, noisy quantum computers. The main contributions lie in: (1) a shallow-depth QEMTP quantum circuit for mitigating noises on NISQ quantum devices; (2) practical QEMTP linear solvers incorporating executable quantum state preparation and measurements for nodal voltage computations; (3) a noise-resilient QEMTP algorithm leveraging quantum resources logarithmically scaled with power system dimension; (4) a quantum shifted frequency analysis (QSFA) for accelerating QEMTP by exploiting dynamic phasor simulations with larger time steps; (5) a systematical analysis on QEMTPs performance under various noisy quantum environments. Extensive experiments systematically verify the accuracy, efficacy, universality and noise-resilience of QEMTP on both noise-free simulators and IBM real quantum computers.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗

A Computational Framework for Simulations of Dissipative Nonadiabatic Dynamics on Hybrid Oscillator-Qubit Quantum Devices

Here, we introduce a computational framework for simulating nonadiabatic vibronic dynamics on circuit quantum electrodynamics (cQED) platforms. Our approach leverages hybrid oscillator-qubit quantum hardware with midcircuit measurements and resets, enabling the incorporation of environmental effects such as dissipation and dephasing. To demonstrate its capabilities, we simulate energy transfer dynamics in a triad model of photosynthetic chromophores inspired by natural antenna systems. We specifically investigate the role of dissipation during the relaxation dynamics following photoexcitation, where electronic transitions are coupled to the evolution of quantum vibrational modes. Our results indicate that hybrid oscillator-qubit devices, operating with noise levels below the intrinsic dissipation rates of typical molecular antenna systems, can achieve the simulation fidelity required for practical computations on near-term and early fault-tolerant quantum computing platforms.

Hamiltonians↗

Nearly optimal state preparation for quantum simulations of lattice gauge theories

Here, we present several improvements to the recently developed ground-state preparation algorithm based on the quantum eigenvalue transformation for unitary matrices (QETU), apply this algorithm to a lattice formulation of U(1) gauge theory in (2+1) dimensions, as well as propose an alternative application of QETU, a highly efficient preparation of Gaussian distributions. The QETU technique was originally proposed as an algorithm for nearly optimal ground-state preparation and ground-state energy estimation on early fault-tolerant devices. It uses the time-evolution input model, which can potentially overcome the large overall prefactor in the asymptotic gate cost arising in similar algorithms based on the Hamiltonian input model. We present modifications to the original QETU algorithm that significantly reduce the cost for the cases of both exact and Trotterized implementation of the time evolution circuit. We use QETU to prepare the ground state of a U(1) lattice gauge theory in two spatial dimensions, explore the dependence of computational resources on the desired precision and system parameters, and discuss the applicability of our results to general lattice gauge theories. We also demonstrate how the QETU technique can be utilized for preparing Gaussian distributions and wave packets in a way which outperforms existing algorithms for as little as n q ≳ 2–5 qubits.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Discrete and Integrated Solutions for Hybrid PV Plants Without Momentary Cessation in Low SCR and High Penetration PE Grids

With the increased penetration of power electronic (PE) based loads and sources, advanced solutions may be required for the enhancement of grid stability in regions with low short circuit ratio (SCR) and high penetration PE grids. The requirement of advanced solutions arises from the gradual paradigm shift of the electric grid from the traditional electric machine dominant system to a high penetration of PE-based system. One of the major challenges with such systems in recent times is the momentary cessation during alternating current (ac) grid transmission faults. During momentary cessation, PE-based resources cease to operate, thus creating probable reliability challenges for the grid. In this paper, potential feasible options to provide continuity of operation during such scenarios are presented. The options are considered through identifying upgrades in existing and upcoming discrete development of photovoltaic (PV) and energy storage systems (ESS) termed as discrete hybrid PV plants. Additionally, an advanced concept of integrated development of PV and ESS connecting to ac transmission grid links called multi-port autonomous reconfigurable solar power plant (MARS) is evaluated. The developed new solutions are evaluated for different grid use cases and scenarios in PSCAD.

Marthi, Phani Ratna Vanamali↗

Power Module Precursors and Prognostics

This project focuses on finding and utilizing electrical properties (precursors) of power electronic devices and modules whose changes have strong correlations with different modes and levels of degradations in order to realize online and lightweight state of health evaluation and fault diagnosis. Results from this project will contribute to higher safety, reliability, and power density of power electronic components. The approaches mainly include reviewing academic literature and industry practices for state of the art precursor identification and extraction, accelerated life cycles (ALC) of various power modules to create different degradations in-house, and developing techniques for gate-driver-integratable precursor detection circuit. In FY24, the results includes two sets of definitively detected aging precursors (on-state resistance and gate threshold voltage) for two sets of power modules respectively, controlled accelerated lifetime cycling of multiple silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) modules, and the development and validation of a gate voltage detection system.

ADVANCED PROPULSION SYSTEMS↗

Autonomous quantum error correction and fault-tolerant quantum computation with squeezed cat qubits

We propose an autonomous quantum error correction scheme using squeezed cat (SC) code against excitation loss in continuous-variable systems. Through reservoir engineering, we show that a structured dissipation can stabilize a two-component SC while autonomously correcting the errors. The implementation of such dissipation only requires low-order nonlinear couplings among three bosonic modes or between a bosonic mode and a qutrit. While our proposed scheme is device independent, it is readily implementable with current experimental platforms such as superconducting circuits and trapped-ion systems. Compared to the stabilized cat, the stabilized SC has a much lower dominant error rate and a significantly enhanced noise bias. Furthermore, the bias-preserving operations for the SC have much lower error rates. In combination, the stabilized SC leads to substantially better logical performance when concatenating with an outer discrete-variable code. The surface-SC scheme achieves more than one order of magnitude increase in the threshold ratio between the loss rate κ 1 and the engineered dissipation rate κ 2 . Under a practical noise ratio κ 1 /κ 2 = 10 -3 , the repetition-SC scheme can reach a 10 -15 logical error rate even with a small mean excitation number of 4, which already suffices for practically useful quantum algorithms.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Majorana pair based qubits for fault tolerant quantum computing architecture using superconducting gold surface states

Under certain conditions, a fermion in a superconductor can separate in space into two parts known as Majorana zero modes, which are immune to decoherence from local noise sources and are attractive building blocks for quantum computers. Here we disclose a metal-based heterostructure platform to produce these Majorana zero modes which utilizes the surface states of certain metals in combination with a ferromagnetic insulator and a superconductor. This platform has the advantage of having a robust energy scale and the possibility of realizing complex circuit designs using lithographic methods. The Majorana zero modes are interrogated using planar tunnel junctions and electrostatic gates to selectively tunnel into designated pairs of Majorana zero modes. We give example of qubit designs and circuits that are particularly suitable for the metal-based heterostructures.

Moodera, Jagadeesh S.↗

Enhancing quantum utility: Simulating large-scale quantum spin chains on superconducting quantum computers

We present the quantum simulation of the frustrated quantum spin- 1 2 antiferromagnetic Heisenberg spin chain with competing nearest-neighbor ( J 1 ) and next-nearest-neighbor ( J 2 ) exchange interactions in the real superconducting quantum computer with qubits ranging up to 100. In particular, we implement the Hamiltonian with the next-nearest neighbor exchange interaction in conjunction with the nearest-neighbor interaction on IBM's superconducting quantum computer and carry out the time evolution of the spin chain by employing the first-order Trotterization. Furthermore, our implementation of the second-order Trotterization for the isotropic Heisenberg spin chain, involving only nearest-neighbor exchange interaction, enables precise measurement of the expectation values of staggered magnetization observable across a range of up to 100 qubits. Notably, in both cases, our approach results in a constant circuit depth in each Trotter step, independent of the number of qubits. Our demonstration of the accurate measurement of expectation values for the large-scale quantum system using superconducting quantum computers designates the quantum utility of these devices for investigating various properties of many-body quantum systems. This will be a stepping stone to achieving the quantum advantage over classical ones in simulating quantum systems before the fault tolerance quantum era. Published by the American Physical Society 2024

97 MATHEMATICS AND COMPUTING↗

Automating NISQ Application Design with Meta Quantum Circuits with Constraints (MQCC)

Near-term intermediate scale quantum (NISQ) computers are likely to have very restricted hardware resources, where precisely controllable qubits are expensive, error-prone, and scarce. Programmers of such computers must therefore balance trade-offs among a large number of (potentially heterogeneous) factors specific to the targeted application and quantum hardware. To assist them, we propose Meta Quantum Circuits with Constraints (MQCC), a meta-programming framework for quantum programs. Programmers express their application as a succinct collection of normal quantum circuits stitched together by a set of (manually or automatically) added meta-level choice variables, whose values are constrained according to a programmable set of quantitative optimization criteria. MQCC’s compiler generates the appropriate constraints and solves them via an SMT solver, producing an optimized, runnable program. We showcase a few MQCC’s applications for its generality including an automatic generation of efficient error syndrome extraction schemes for fault-tolerant quantum error correction with heterogeneous qubits and an approach to writing approximate quantum Fourier transformation and quantum phase estimation that smoothly trades off accuracy and resource use. We also illustrate that MQCC can easily encode prior one-off NISQ application designs-–multi-programming (MP), crosstalk mitigation (CM)—as well as a combination of their optimization goals (i.e., a combined MP-CM).

97 MATHEMATICS AND COMPUTING↗