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Application-specific integrated circuit (ASIC) performs 24-bit, fixed-point arithmetic operations on arrays of complex-valued input data. High-performance, wide-band arithmetic logic unit (ALU) designed for use in computing fast Fourier transforms (FFTs) and for performing ditigal filtering functions. Other applications include general computations involved in analysis of spectra and digital signal processing.
Frequency multipliers are required as local oscillator sources for frequencies up to 2.7 THz for FIRST and airborne applications. Multipliers at these frequencies have not previously been demonstrated, and the object of this work was to show whether such circuits are really practical. A practical circuit is one which not only performs as well as is required, but also can be replicated in a time that is feasible. As the frequency of circuits is increased, the difficulties in fabrication and assembly increase rapidly. Building all of the circuit on GaAs as a monolithic circuit is highly desirable to minimize the complexity of assembly, but at the highest frequencies, even a complete monolithic circuit is extremely small, and presents serious handling difficulty. This is compounded by the requirement for a very thin substrate. Assembly can become very difficult because of handling problems and critical placement. It is very desirable to make the chip big enough to that it can be seen without magnification, and strong enough that it may be picked up with tweezers. Machined blocks to house the chips present an additional challenge. Blocks with complex features are very expensive, and these also imply very critical assembly of the parts. It would be much better if the features in the block were as simple as possible and non-critical to the function of the chip. In particular, grounding and other electrical interfaces should be done in a manner that is highly reproducible.
Abstract Our recent work (Ayral et al. in Proceedings of IEEE computer society annual symposium on VLSI, ISVLSI, pp 138–140, 2020. 10.1109/ISVLSI49217.2020.00034 ) showed the first implementation of the Quantum Divide and Compute (QDC) method, which allows to break quantum circuits into smaller fragments with fewer qubits and shallower depth. This accommodates the limited number of qubits and short coherence times of quantum processors. This article investigates the impact of different noise sources—readout error, gate error and decoherence—on the success probability of the QDC procedure. We perform detailed noise modeling on the Atos Quantum Learning Machine, allowing us to understand tradeoffs and formulate recommendations about which hardware noise sources should be preferentially optimized. We also describe in detail the noise models we used to reproduce experimental runs on IBM’s Johannesburg processor. This article also includes a detailed derivation of the equations used in the QDC procedure to compute the output distribution of the original quantum circuit from the output distribution of its fragments. Finally, we analyze the computational complexity of the QDC method for the circuit under study via tensor-network considerations, and elaborate on the relation the QDC method with tensor-network simulation methods.
We present an efficient quantum circuit for block encoding a pairing Hamiltonian often studied in nuclear physics. Our block encoding scheme does not require mapping the creation and annihilation operators to the Pauli operators and representing the Hamiltonian as a linear combination of unitaries. Instead, we show how to encode the Hamiltonian directly using controlled swap operations. We analyze the gate complexity of the block encoding circuit and show that it scales polynomially with respect to the number of qubits required to represent a quantum state associated with the pairing Hamiltonian. We also show how the block encoding circuit can be combined with the quantum singular value transformation to construct an efficient quantum circuit for approximating the density of states of a pairing Hamiltonian. The techniques presented can be extended to encode more general second-quantized Hamiltonians.
Metal oxide semiconductor (MOS) circuits for measuring spatially varying intensities of beams of low-energy charged particles have been developed. These circuits are intended especially for use in measuring fluxes of ions with spatial resolution along the focal planes of mass spectrometers. Unlike prior mass spectrometer focal-plane detectors, these MOS circuits would not be based on ion-induced generation of electrons, and photons; instead, they would be based on direct detection of the electric charges of the ions. Hence, there would be no need for microchannel plates (for ion-to-electron conversion), phosphors (for electron-to-photon conversion), and photodetectors (for final detection) -- components that degrade spatial resolution and contribute to complexity and size. The developmental circuits are based on linear arrays of charge-coupled devices (CCDs) with associated readout circuitry (see figure). They resemble linear CCD photodetector arrays, except that instead of a photodetector, each pixel contains a capacitive charge sensor. The capacitor in each sensor comprises two electrodes (typically made of aluminum) separated by a layer of insulating material. The exposed electrode captures ions and accumulates their electric charges during signal-integration periods.
This project evaluated the pulse shaping capabilities of next-generation pulsed power (NGPP) architectures. NGPP architectures share several common attributes including multiple independent pulse-generation lines, a radial water-insulated impedance transformer, and a central vacuum insulated load region. A multi-module circuit model was developed, incorporating independent pulse-generation lines and a 2-D transmission line mesh of the radial impedance transformer to assess the effects of azimuthal asymmetry in pulse-shaped experiments. Circuit model simulations demonstrated that NGPP architectures are able to produce the the desired current pulse shapes for exemplar NGPP experiments. Additionally, the project explored automated methods for experiment design, including derivative -ree optimization and machine learning. Pulse-shaped experiments require designers to determine machine parameters that reliably produce the desired current pulse at the load, a process that typically relies on expert knowledge and iterative adjustments using the Z circuit model. Given the increased complexity of NGPP systems, this manual approach may be impractical. While the evaluated methods do not eliminate the need for manual iteration, they can reduce the time required for experiment design. Derivative-free optimization automates much of the trial-and-error process, providing a close starting point for manual adjustments or making small modifications to near-final designs. Meanwhile, deep neural network methods can generate a good qualitative match to the desired current pulse in under one second without requiring circuit model simulations.
Multi-objective transmission switching (MO-TS) problems involve the strategic reconfiguration of network topology to simultaneously optimize multiple objectives. As the system scale increases, finding feasible solutions becomes increasingly challenging due to the problem's nonlinearity and high computational complexity. To address these challenges, this paper proposes a two-stage quantum reinforcement learning method that leverages potential quantum advantages for MO-TS. In the first stage, candidate switching lines are identified using a graph-theoretical approach to reduce the problem's dimensionality. The second stage introduces a quantum-classical reinforcement learning framework, where a learnable measurement-based CNN-ResVQC architecture is developed to effectively reduce the input dimension for quantum processing, mitigate vanishing gradients, and enhance trainability while improving the quantum circuit's flexibility in modeling complex decision policies for MO-TS. Numerical studies on IEEE 14-bus, 57-bus, and 118-bus systems demonstrate that the proposed algorithm achieves superior training stability and faster convergence with approximately 1% of the network parameters required by classical algorithms, highlighting its effectiveness, efficiency, and scalability. Furthermore, the practicality is validated through its stable convergence under three common quantum noise channels.
Classical shadow tomography is a sample-efficient technique for characterizing quantum systems and predicting many of their properties. Circuit cutting is a technique for dividing large quantum circuits into smaller fragments that can be executed more robustly using fewer quantum resources. We introduce a divide-and-conquer circuit cutting method for estimating the expectation values of observables using classical shadows. We derive a general formula for making predictions using the classical shadows of circuit fragments from arbitrarily cut circuits and provide the sample complexity analysis for the case when observables factorize across fragments. Then, we numerically show that our divide-and-conquer method outperforms traditional uncut shadow tomography when estimating high-weight observables that act non-trivially on many qubits and discuss the mechanisms for this advantage.
Circuit generates a pulse of high interval stability with a complexity level considerably below systems of comparable stability. This circuit is being used as a linear frequency discriminator in the signal conditioner of the Apollo command module.
Advances in materials science and engineering have played a central role in the development of classical computers and will undoubtedly be critical in propelling the maturation of quantum information technologies. In approaches to quantum computation based on superconducting circuits, as one goes from bulk materials to functional devices, amorphous films and non-equilibrium excitations — electronic and phononic — are introduced, leading to dissipation and fluctuations that limit the computational power of state-of-the-art qubits and processors. In this Review, the major sources of decoherence in superconducting qubits are identified through an exploration of seminal qubit and resonator experiments. The proposed microscopic mechanisms associated with these imperfections are summarized, and directions for future research are discussed. The trade-offs between simple qubit primitives based on a single Josephson tunnel junction and more complex designs that use additional circuit elements, or new junction modalities, to reduce sensitivity to local noise sources are discussed, particularly in the context of materials optimization strategies for each architecture.
An ultrafast 32-bit pipeline correlator has been implemented using resonant tunneling diodes (RTD) and hetero-junction bipolar transistors (HBT). The negative differential resistance (NDR) characteristics of RTD's is the basis of logic gates with the self-latching property that eliminates pipeline area and delay overheads which limit throughput in conventional technologies. The circuit topology also allows threshold logic functions such as minority/majority to be implemented in a compact manner resulting in reduction of the overall complexity and delay of arbitrary logic circuits. The parallel correlator is an essential component in code division multi-access (CDMA) transceivers used for the continuous calculation of correlation between an incoming data stream and a PN sequence. Simulation results show that a nano-pipelined correlator can provide and effective throughput of one 32-bit correlation every 100 picoseconds, using minimal hardware, with a power dissipation of 1.5 watts. RTD plus HBT based logic gates have been fabricated and the RTD plus HBT based correlator is compared with state of the art complementary metal oxide semiconductor (CMOS) implementations.
Quantum optimization algorithms, such as QAOA, that implement parametrized stochastic optimization solvers attempt to identify low-energy solutions of Ising systems by exploiting available quantum effects in noisy-intermediate scale machines. Engineering a well-performing parametrized quantum optimization circuit is indeed an exercise in balancing the trade-off between expressivity and implementation complexity. We show that, for MaxCut QAOA circuits defined on native hardware topology (Rigetti’s Aspen Quantum Processors), error-mitigation techniques recover simulated features of the noiseless theory. Moreover, we explore a design space for QAOA-like ansatze that perform well in theory as well as in hardware for fully-connected problems. We also discuss how efficient coherence and entanglement detection methods that could be coupled with quantum optimization experiments require only linear overhead in benchmarking time.
Two 90 deg, fixed geometry, turning vane cascades were replaced in the 40- by 80-foot wind tunnel circuit of the National Full-Scale Aerodynamic Complex as a part of a major facility upgrade. Prior to the replacement of these vanes, small-scale, two-dimensional tests were conducted to assess the aerodynamic performance of the original, 1930's technology vane geometry and a new vane geometry which was developed using a modern cascade design code. The small scale tests were conducted in the 1/10th-Scale Cascade Test Facility and included measurements of total pressure, static pressure, and flow angularity distributions in the wake of the cascade and static pressure distributions along the vane profiles. Test results and a detailed comparison of the two vanes designs are presented. Based on these results, the new design was chosen and subsequently installed in the wind tunnel. During the integrated systems test of the upgraded facility, two of the 52 vanes in the first cascade were instrumented near midspan. The full-scale test results are presented, these show the cascade pressure loss coefficient to be slightly larger than obtained in the small-scale tests. Elements of the three-dimensional flow field upstream of the cascade, which effect can impact cascade performance, are discussed and recommendations for future research are given.
We introduce a quantum-inspired approximation algorithm for MaxCut based on low-depth Clifford circuits. We start by showing that the solution unitaries found by the adaptive quantum approximation optimization algorithm (ADAPT-QAOA) for the MaxCut problem on weighted fully connected graphs are (almost) Clifford circuits. Motivated by this observation, we devise an approximation algorithm for MaxCut, ADAPT-Clifford, that searches through the Clifford manifold by combining a minimal set of generating elements of the Clifford group. Our algorithm finds an approximate solution of MaxCut on an N -vertex graph by building a depth O ( N ) Clifford circuit. The algorithm has runtime complexity O ( N 2 ) and O ( N 3 ) for sparse and dense graphs, respectively, and space complexity O ( N 2 ) , with improved solution quality achieved at the expense of more demanding runtimes. We implement ADAPT-Clifford and characterize its performance on graphs with positive and signed weights. The case of signed weights is illustrated with the paradigmatic Sherrington-Kirkpatrick model, for which our algorithm finds solutions with ground-state mean energy density corresponding to ∼ 94 % of the Parisi value in the thermodynamic limit. The case of positive weights is investigated by comparing the cut found by ADAPT-Clifford with the cut found with the Goemans-Williamson (GW) algorithm. For both sparse and dense instances we provide copious evidence that, up to hundreds of nodes, ADAPT-Clifford finds cuts of lower energy than GW. Published by the American Physical Society 2024
Gallium nitride (GaN), a wide bandgap semiconductor, has vast potential to address two environment conditions associated with the application of electronics to nuclear power: elevated temperatures, and high levels of radiation. A process was developed at The Ohio State University (OSU) to enable fabrication of complex digital and analog electronics circuits for application to nuclear power environments such as locations near or in the reactor core or in spent nuclear fuel casks. Radio frequency (RF)-grade GaN high electron mobility transistor (HEMT) devices were fabricated as part of this process. These were fabricated as depletion mode and enhancement mode devices. They have been electrically characterized and have demonstrated the expected performance. Behavioral models (Verilog-A) were developed from these device measurements to enable electrical simulation of GaN HEMT devices and circuits using common electronics simulation tools based on Simulation Program with Integrated Circuit Emphasis (SPICE). A similar set of GaN HEMT devices is being developed to provide lower speed devices for logic and analog functions. These accomplishments position this technology for effective application to sensor interfacing, signal processing, and data communications in nuclear power plants, including operation in or near the reactor core.
Enhanced polarization of target nuclei can be measured via the complex impedance of a resonant circuit coupled to the target while sweeping the circuit through the nuclear Larmor frequency, observing the absorption or emission of energy by the spins in the material. For decades, solid polarized targets at Jefferson Lab have relied upon continuous-wave Nuclear Magnetic Resonance polarization measurements using Liverpool Q-meter systems. These Liverpool Q-meters are no longer produced, and replacing the aging components is becoming increasingly difficult. The polarized target group at Bochum has produced replacement Q-meters in the Liverpool style using modern components, and we are following their example while researching improvemnts to the technique. We discuss our efforts to produce improved Q-meters for upcoming experiments utilizing solid polarized targets in Jefferson Lab's Hall B.
System design and system analysis and simulation are slightly behind schedule, while design verification testing has improved. Input/output circuit design has improved, but digital computer unit (DCU) and mechanical design continue to lag. Part procurement was impacted by delays in printed circuit board, assembly drawing releases. These are the result of problems in generating suitable printed circuit artwork for the very complex and high density multilayer boards.
Memory storage requirements in space systems have steadily increased, much like storage requirements in terrestrial systems. Large arrays of dynamic memories (DRAMs) have been used in solid-state recorders, relying on a combination of shielding and error-detection-and correction (EDAC) to overcome the extreme sensitivity of DRAMs to space radiation. For example, a 2-Gbit memory (with 4-Mb DRAMs) used on the Clementine mission functioned perfectly during its moon mapping mission, in spite of an average of 71 memory bit flips per day from heavy ions. Although EDAC worked well with older types of memory circuits, newer DRAMs use extremely complex internal architectures which has made it increasingly difficult to implement EDAC. Some newer DRAMs have also exhibited catastrophic latchup. Flash memories are an intriguing alternative to DRAMs because of their nonvolatile storage and extremely high storage density, particularly for applications where writing is done relatively infrequently. This paper discusses radiation effects in advanced flash memories, including general observations on scaling and architecture as well as the specific experience obtained at the Jet Propulsion Laboratory in evaluating high-density flash memories for use on the NASA mission to Europa, one of Jupiter's moons. This particular mission must pass through the Jovian radiation belts, which imposes a very demanding radiation requirement.