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At least 181 records · Page 10
All sourcesNASA NTRSDOE OSTI
NASA NTRS1991

Design of a communications system for multiple telemetry data channels operating simultaneously with a coherent turn-around ranging channel

This paper presents a simple technique to design a phase-modulated residual carrier communications link for optimum performance. The emphasis is on two data channels which are operated simultaneously with a ranging signal. The data channels employ PCM/PM and PCM/PSK/PM modulation schemes for high and low data rate channels, respectively. The technique proposed here selects the optimum (1) subcarrier frequency to minimize the interference between the two data channels, and (2) modulation indices for optimum balance of power between the two telemetry data channels and the coherent turn around ranging channel. The selected set of optimum modulation indices will allow for the specified bit error rate (BER) degradations in the two data channels. Although this technique is proposed to optimize the performance degradation for two data channels, generalizations can be made for more than two data channels.

Nguyen, Tien M.↗
NASA NTRS1995

On the design of turbo codes

In this article, we design new turbo codes that can achieve near-Shannon-limit performance. The design criterion for random interleavers is based on maximizing the effective free distance of the turbo code, i.e., the minimum output weight of codewords due to weight-2 input sequences. An upper bound on the effective free distance of a turbo code is derived. This upper bound can be achieved if the feedback connection of convolutional codes uses primitive polynomials. We review multiple turbo codes (parallel concatenation of q convolutional codes), which increase the so-called 'interleaving gain' as q and the interleaver size increase, and a suitable decoder structure derived from an approximation to the maximum a posteriori probability decision rule. We develop new rate 1/3, 2/3, 3/4, and 4/5 constituent codes to be used in the turbo encoder structure. These codes, for from 2 to 32 states, are designed by using primitive polynomials. The resulting turbo codes have rates b/n (b = 1, 2, 3, 4 and n = 2, 3, 4, 5, 6), and include random interleavers for better asymptotic performance. These codes are suitable for deep-space communications with low throughput and for near-Earth communications where high throughput is desirable. The performance of these codes is within 1 dB of the Shannon limit at a bit-error rate of 10(exp -6) for throughputs from 1/15 up to 4 bits/s/Hz.

Divsalar, D.↗
NASA NTRS1989

Quantization effects in Viterbi decoding rate 1/n convolutional codes

A Viterbi decoder's performance loss due to quantizing data from the additive white Gaussian noise (AWGN) channel is studied. An optimal quantization scheme and branch metric calculation method are presented. The uniformly quantized channel capacity C(sub u)(q) is used to determine the smallest number of quantization bits q that does not cause a significant loss. The quantizer stepsize which maximizes C(sub u)(q) almost minimizes the decoder bit error rate (BER). However, a slightly larger stepsize is better, like the value that minimizes the Bhattacharyya bound. The range and renormalization of state metrics is analyzed, in particular for K = 15 decoders such as the Big Viterbi Decoder (BVD) for the Galileo mission. These results are required to design reduced hardware complexity Viterbi decoders with a negligible quantization loss.

Onyszchuk, I. M.↗
NASA NTRS1996

CW Interference Effects on High Data Rate Transmission Through the ACTS Wideband Channel

Satellite communications channels are susceptible to various sources of interference. Wideband channels have a proportionally greater probability of receiving interference than narrowband channels. NASA's Advanced Communications Technology Satellite (ACTS) includes a 900 MHz bandwidth hardlimiting transponder which has provided an opportunity for the study of interference effects of wideband channels. A series of interference tests using two independent ACTS ground terminals measured the effects of continuous-wave (CW) uplink interference on the bit-error rate of a 220 Mbps digitally modulated carrier. These results indicate the susceptibility of high data rate transmissions to CW interference and are compared to results obtained with a laboratory hardware-based system simulation and a computer simulation.

Kerczewski, Robert J.↗
NASA NTRS1991

A software control system for the ACTS high-burst-rate link evaluation terminal

Control and performance monitoring of NASA's High Burst Rate Link Evaluation Terminal (HBR-LET) is accomplished by using several software control modules. Different software modules are responsible for controlling remote radio frequency (RF) instrumentation, supporting communication between a host and a remote computer, controlling the output power of the Link Evaluation Terminal and data display. Remote commanding of microwave RF instrumentation and the LET digital ground terminal allows computer control of various experiments, including bit error rate measurements. Computer communication allows system operators to transmit and receive from the Advanced Communications Technology Satellite (ACTS). Finally, the output power control software dynamically controls the uplink output power of the terminal to compensate for signal loss due to rain fade. Included is a discussion of each software module and its applications.

Reinhart, Richard C.↗
NASA NTRS1998

Remote Observing with the Keck Telescope Using the ACTS Satellite

As a technical demonstration project for the NASA Advanced Communications Technology Satellite (ACTS), we have implemented remote observing on the 10-meter Keck II telescope on Mauna Kea in Hawaii from the California Institute of Technology campus in Pasadena. The data connection consists of optical fiber networks in Hawaii and California, connecting the end-points to high data rate (HDR) ACTS satellite antennae at JPL in Pasadena and at the Tripler Army Medical Center in Honolulu. The terrestrial fiber networks run the asynchronous transfer mode (ATM) protocol at DS-3 (45 Mbit/sec) speeds, providing ample bandwidth to enable remote observing with a software environment identical to that used for on-site observing in Hawaii. This experiment has explored the data requirements of remote observing with a modern research telescope and large-format detector arrays. While the maximum burst data rates are lower than those required for many other applications (e.g., HDTV), the network reliability and data integrity requirements are critical. As we show in this report, the former issue particularly may be the greatest challenge for satellite networks for this class of application. We have also experimented with the portability of standard TCP/IP applications to satellite networks, demonstrating the need for alternative TCP congestion algorithms and minimization of bit error rates (BER). Reliability issues aside, we have demonstrated that true remote observing over high-speed networks provides several important advantages over standard observing paradigms. Technical advantages of the high-speed network access include more rapid download of data to a user's home institution and the opportunity for alternative communication facilities between members of an observing team, such as audio- and videoconferencing.

SATELLITE COMMUNICATIONS↗
NASA NTRS1988

A new code for Galileo

Over the past six to eight years, an extensive research effort was conducted to investigate advanced coding techniques which promised to yield more coding gain than is available with current NASA standard codes. The delay in Galileo's launch due to the temporary suspension of the shuttle program provided the Galileo project with an opportunity to evaluate the possibility of including some version of the advanced codes as a mission enhancement option. A study was initiated last summer to determine if substantial coding gain was feasible for Galileo and, is so, to recommend a suitable experimental code for use as a switchable alternative to the current NASA-standard code. The Galileo experimental code study resulted in the selection of a code with constant length 15 and rate 1/4. The code parameters were chosen to optimize performance within cost and risk constraints consistent with retrofitting the new code into the existing Galileo system design and launch schedule. The particular code was recommended after a very limited search among good codes with the chosen parameters. It will theoretically yield about 1.5 dB enhancement under idealizing assumptions relative to the current NASA-standard code at Galileo's desired bit error rates. This ideal predicted gain includes enough cushion to meet the project's target of at least 1 dB enhancement under real, non-ideal conditions.

Dolinar, S.↗
NASA NTRS1975

Design of a digital voice data compression technique for orbiter voice channels

Candidate techniques were investigated for digital voice compression to a transmission rate of 8 kbps. Good voice quality, speaker recognition, and robustness in the presence of error bursts were considered. The technique of delayed-decision adaptive predictive coding is described and compared with conventional adaptive predictive coding. Results include a set of experimental simulations recorded on analog tape. The two FM broadcast segments produced show the delayed-decision technique to be virtually undegraded or minimally degraded at .001 and .01 Viterbi decoder bit error rates. Preliminary estimates of the hardware complexity of this technique indicate potential for implementation in space shuttle orbiters.

Source record↗
NASA NTRS1982

Analysis of space telescope data collection system

An analysis of the expected performance for the Multiple Access (MA) system is provided. The analysis covers the expected bit error rate performance, the effects of synchronization loss, the problem of self-interference, and the problem of phase ambiguity. The problem of false acceptance of a command word due to data inversion is discussed. A mathematical determination of the probability of accepting an erroneous command word due to a data inversion is presented. The problem is examined for three cases: (1) a data inversion only, (2) a data inversion and a random error within the same command word, and a block (up to 256 48-bit words) containing both a data inversion and a random error.

Ingels, F. M.↗
NASA NTRS1991

Pi/4-QPSK modems for satellite sound/data broadcast systems

The use of pi/4-quadrature phase-shift keying (QPSK) modems for satellite sound broadcast systems (SSBS) broadcasting to mobile or portable receivers is proposed. Three different differential detectors (including the FM-discriminator followed by integrate-sample-and-dump filter) and a novel coherent detector are discussed. The degradation caused by the frequency offset between the local oscillator (LO) and the unmodulated carrier (CR) in the baseband differential detector is studied. The performance of both coherently and differentially detected pi/4-QPSK in a Gaussian channel is also studied. It is shown that with a frequency offset of more than 3 percent of the symbol rate, the performance degradation is more than 1 dB at 0.0001. The out-of-band power of the nonlinearly amplified bandlimited pi/4-QPSK signals is reduced from -13 dB to -37 dB if a 2-dB output back-off amplifier is used instead of a hardlimiter. The performance of the pi/4-QPSK is equivalent to that of QPSK, although the pi/4-QPSK has the advantage of less spectrum restoration after nonlinear amplification. The coherent demodulator and differential decoder avoid the three-level detection and achieve the same bit-error-rate performance as DEQPSK with a simple circuit.

Liu, Chia-Liang↗
NASA NTRS1991

Space Communications Artificial Intelligence for Link Evaluation Terminal (SCAILET)

A software application to assis end-users of the Link Evaluation Terminal (LET) for satellite communication is being developed. This software application incorporates artificial intelligence (AI) techniques and will be deployed as an interface to LET. The high burst rate (HBR) LET provides 30 GHz transmitting/20 GHz receiving, 220/110 Mbps capability for wideband communications technology experiments with the Advanced Communications Technology Satellite (ACTS). The HBR LET and ACTS are being developed at the NASA Lewis Research Center. The HBR LET can monitor and evaluate the integrity of the HBR communications uplink and downlink to the ACTS satellite. The uplink HBR transmission is performed by bursting the bit-pattern as a modulated signal to the satellite. By comparing the transmitted bit pattern with the received bit pattern, HBR LET can determine the bit error rate BER) under various atmospheric conditions. An algorithm for power augmentation is applied to enhance the system's BER performance at reduced signal strength caused by adverse conditions. Programming scripts, defined by the design engineer, set up the HBR LET terminal by programming subsystem devices through IEEE488 interfaces. However, the scripts are difficult to use, require a steep learning curve, are cryptic, and are hard to maintain. The combination of the learning curve and the complexities involved with editing the script files may discourage end-users from utilizing the full capabilities of the HBR LET system. An intelligent assistant component of SCAILET that addresses critical end-user needs in the programming of the HBR LET system as anticipated by its developers is described. A close look is taken at the various steps involved in writing ECM software for a C&P, computer and at how the intelligent assistant improves the HBR LET system and enhances the end-user's ability to perform the experiments.

Shahidi, Anoosh↗
NASA NTRS2001

Infrared Communications for Small Spacecraft: From a Wireless Bus to Cluster Concepts

Nanosatellites operating singly or in clusters are anticipated for future space science missions. To implement this new communications paradigm, we are approaching cluster communications by first developing an infrared (IR) intra-craft wireless bus capability, following initially the MIL-STD-1553B protocol. Benefits of an IR wireless bus are low mass, size, power, and cost, simplicity of implementation, ease of use, minimum EMI, and efficient and reliable data transfer. Our goals are to maximize the reliable link margin in order to afford greater flexibility in receiver placement, which will ease technology insertion. We have developed a concept demonstration using a high-speed visible-band silicon PIN photodiode and a high-efficiency visible LED operating at a data rate up to 4 Mb/sec. In designing an internal IR wireless bus, we have characterized various candidate materials, emitters, and geometries, assuming a single reflection. Thus, we have measured the bidirectional reflectance distribution function (BRDF) for five different materials characteristic of typical spacecraft structures, which range from nearly Lambertian to highly specular. We have fit our data to empirical BRDF functions and modeled the detected irradiance anywhere in the plane of incidence for a divergent (LED) emitter. We have also determined the angular limits on the link geometry to remain within the required bit error rate by determining the received signal-to-noise ratio (SNR) for minimum values of irradiance received at the detector.

Webb, Suzanne C.↗
NASA NTRS2012

Root Raised Cosine (RRC) Filters and Pulse Shaping in Communication Systems

This presentation briefly discusses application of the Root Raised Cosine (RRC) pulse shaping in the space telecommunication. Use of the RRC filtering (i.e., pulse shaping) is adopted in commercial communications, such as cellular technology, and used extensively. However, its use in space communication is still relatively new. This will possibly change as the crowding of the frequency spectrum used in the space communication becomes a problem. The two conflicting requirements in telecommunication are the demand for high data rates per channel (or user) and need for more channels, i.e., more users. Theoretically as the channel bandwidth is increased to provide higher data rates the number of channels allocated in a fixed spectrum must be reduced. Tackling these two conflicting requirements at the same time led to the development of the RRC filters. More channels with wider bandwidth might be tightly packed in the frequency spectrum achieving the desired goals. A link model with the RRC filters has been developed and simulated. Using 90% power Bandwidth (BW) measurement definition showed that the RRC filtering might improve spectrum efficiency by more than 75%. Furthermore using the matching RRC filters both in the transmitter and receiver provides the improved Bit Error Rate (BER) performance. In this presentation the theory of three related concepts, namely pulse shaping, Inter Symbol Interference (ISI), and Bandwidth (BW) will be touched upon. Additionally the concept of the RRC filtering and some facts about the RRC filters will be presented

Cubukcu, Erkin↗
NASA NTRS1979

Pre-A/D filter and AGC requirements for multimegabit telemetry data detection

A candidate pre-Analog to Digital filter bandwidth versus data rate design is presented for the multimegabit telemetry demodulator/detector. The design is based on considerations of Analog to Digital bias, quantization errors, and automatic gain control effects, as well as the deleterious effects of filtering. Two methods of gain control of the input level to the analog to Digital converter are considered. The first method uses a particular value of gain, according to which bandwidth is selected. The second method uses a second narrowband noncoherent Automatic Gain Controls (in the LPF bandwidth) to attempt to keep the Analog to Digital input level constant. This second method reduces the bit error rate degradation slightly but appears to be more difficult to implement.

Holmes, J. K.↗
NASA NTRS1996

High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

In this research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing, a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study, which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating, and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

Lin, Shu↗
NASA NTRS1996

Circuit Design Approaches for Implementation of a Subtrellis IC for a Reed-Muller Subcode

In this research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these subtrellises.

Lin, Shu↗
NASA NTRS1996

High-Speed Soft-Decision Decoding of Two Reed-Muller Codes

In his research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RNI subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second (Mbps). The combination of a large number of states and a hi ch data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high-speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these sub-trellises.

Lin, Shu↗
NASA NTRS1996

Circuit Design Approaches for Implementation of a Subtrellis IC for a Reed-Muller Subcode

In his research, we have proposed the (64, 40, 8) subcode of the third-order Reed-Muller (RM) code to NASA for high-speed satellite communications. This RM subcode can be used either alone or as an inner code of a concatenated coding system with the NASA standard (255, 233, 33) Reed-Solomon (RS) code as the outer code to achieve high performance (or low bit-error rate) with reduced decoding complexity. It can also be used as a component code in a multilevel bandwidth efficient coded modulation system to achieve reliable bandwidth efficient data transmission. This report will summarize the key progress we have made toward achieving our eventual goal of implementing a decoder system based upon this code. In the first phase of study, we investigated the complexities of various sectionalized trellis diagrams for the proposed (64, 40, 8) RM subcode. We found a specific 8-trellis diagram for this code which requires the least decoding complexity with a high possibility of achieving a decoding speed of 600 M bits per second(Mbps). The combination of a large number of states and a high data rate will be made possible due to the utilization of a high degree of parallelism throughout the architecture. This trellis diagram will be presented and briefly described. In the second phase of study which was carried out through the past year, we investigated circuit architectures to determine the feasibility of VLSI implementation of a high- speed Viterbi decoder based on this 8-section trellis diagram. We began to examine specific design and implementation approaches to implement a fully custom integrated circuit (IC) which will be a key building block for a decoder system implementation. The key results will be presented in this report. This report will be divided into three primary sections. First, we will briefly describe the system block diagram in which the proposed decoder is assumed to be operating and present some of the key architectural approaches being used to implement the system at high speed. Second, we will describe details of the 8-trellis diagram we found to best meet the trade-offs between chip and overall system complexity. The chosen approach implements the trellis for the (64, 40, 8) RM subcode with 32 independent sub-trellises. And third, we will describe results of our feasibility study on the implementation of such an IC chip in CMOS technology to implement one of these subtrellises.

Lin, Shu↗